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authorAndrew Waterman <waterman@cs.berkeley.edu>2015-09-03 20:40:09 -0700
committerAndrew Waterman <waterman@cs.berkeley.edu>2015-09-03 20:40:09 -0700
commitf04fc7bdbb5443929b8645cd5087a3442b757bbe (patch)
tree95a70566487eaed4e631470e898506c16a9743fd /gcc
parent7166f472e2f9a3621402d28f50f6b1dcb5983c37 (diff)
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gcc: #define __riscv_compressed when -mrvc passed
Also, fix some whitespace errors.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/gcc/config/riscv/riscv.h23
1 files changed, 13 insertions, 10 deletions
diff --git a/gcc/gcc/config/riscv/riscv.h b/gcc/gcc/config/riscv/riscv.h
index f4d432c..6fb52c5 100644
--- a/gcc/gcc/config/riscv/riscv.h
+++ b/gcc/gcc/config/riscv/riscv.h
@@ -30,20 +30,21 @@ along with GCC; see the file COPYING3. If not see
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
- builtin_assert ("machine=riscv"); \
+ builtin_assert ("machine=riscv"); \
\
builtin_assert ("cpu=riscv"); \
- builtin_define ("__riscv__"); \
- builtin_define ("__riscv"); \
+ builtin_define ("__riscv__"); \
+ builtin_define ("__riscv"); \
builtin_define ("_riscv"); \
+ builtin_define ("__riscv"); \
\
if (TARGET_64BIT) \
{ \
builtin_define ("__riscv64"); \
- builtin_define ("_RISCV_SIM=_ABI64"); \
+ builtin_define ("_RISCV_SIM=_ABI64"); \
} \
- else \
- builtin_define ("_RISCV_SIM=_ABI32"); \
+ else \
+ builtin_define ("_RISCV_SIM=_ABI32"); \
\
builtin_define ("_ABI32=1"); \
builtin_define ("_ABI64=3"); \
@@ -54,10 +55,12 @@ along with GCC; see the file COPYING3. If not see
builtin_define_with_int_value ("_RISCV_SZPTR", POINTER_SIZE); \
builtin_define_with_int_value ("_RISCV_FPSET", 32); \
\
- if (TARGET_ATOMIC) { \
- builtin_define ("__riscv_atomic"); \
- } \
- \
+ if (TARGET_RVC) \
+ builtin_define ("__riscv_compressed"); \
+ \
+ if (TARGET_ATOMIC) \
+ builtin_define ("__riscv_atomic"); \
+ \
/* These defines reflect the ABI in use, not whether the \
FPU is directly accessible. */ \
if (TARGET_HARD_FLOAT_ABI) { \