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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-11-16 19:24:55 -0800 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-11-16 19:24:55 -0800 |
| commit | 3cf7d19af885e7f3c94a16df7e82068539c1dc5d (patch) | |
| tree | a1af1f04cd86b810c915ea2b8536d9becc55c92e /gcc | |
| parent | 852c44fd72a7c7bababb0a2e022fa48e47a8a5a3 (diff) | |
| download | riscv-gnu-toolchain-3cf7d19af885e7f3c94a16df7e82068539c1dc5d.zip riscv-gnu-toolchain-3cf7d19af885e7f3c94a16df7e82068539c1dc5d.tar.gz riscv-gnu-toolchain-3cf7d19af885e7f3c94a16df7e82068539c1dc5d.tar.bz2 | |
fix some whitespace errors
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/gcc/config/riscv/peephole.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/gcc/config/riscv/peephole.md b/gcc/gcc/config/riscv/peephole.md index 95dd0a2..beeed6c 100644 --- a/gcc/gcc/config/riscv/peephole.md +++ b/gcc/gcc/config/riscv/peephole.md @@ -9,11 +9,11 @@ [(match_operand:DI 1 "register_operand") (match_operand:DI 2 "arith_operand")])) (set (match_operand:SI 3 "register_operand") - (truncate:SI (match_dup 0)))] + (truncate:SI (match_dup 0)))] "TARGET_64BIT && (REGNO (operands[0]) == REGNO (operands[3]) || peep2_reg_dead_p (2, operands[0])) && (GET_CODE (operands[4]) != ASHIFT || (CONST_INT_P (operands[2]) && INTVAL (operands[2]) < 32))" [(set (match_dup 3) - (truncate:SI + (truncate:SI (match_op_dup:DI 4 [(match_operand:DI 1 "register_operand") (match_operand:DI 2 "arith_operand")])))]) @@ -21,7 +21,7 @@ ;; Simplify (int)a + 1, etc. (define_peephole2 [(set (match_operand:SI 0 "register_operand") - (truncate:SI (match_operand:DI 1 "register_operand"))) + (truncate:SI (match_operand:DI 1 "register_operand"))) (set (match_operand:SI 3 "register_operand") (match_operator:SI 4 "modular_operator" [(match_dup 0) @@ -33,7 +33,7 @@ ;; Simplify -(int)a, etc. (define_peephole2 [(set (match_operand:SI 0 "register_operand") - (truncate:SI (match_operand:DI 2 "register_operand"))) + (truncate:SI (match_operand:DI 2 "register_operand"))) (set (match_operand:SI 3 "register_operand") (match_operator:SI 4 "modular_operator" [(match_operand:SI 1 "reg_or_0_operand") @@ -46,27 +46,27 @@ ;; These will go away once we figure out how to emit auipc discretely. (define_insn "*local_pic_load<mode>" [(set (match_operand:ANYI 0 "register_operand" "=r") - (mem:ANYI (match_operand 1 "absolute_symbolic_operand" "")))] + (mem:ANYI (match_operand 1 "absolute_symbolic_operand" "")))] "flag_pic && SYMBOL_REF_LOCAL_P (operands[1])" "<load>\t%0,%1" [(set (attr "length") (const_int 8))]) (define_insn "*local_pic_load<mode>" [(set (match_operand:ANYF 0 "register_operand" "=f") - (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) + (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) (clobber (match_scratch:DI 2 "=&r"))] "TARGET_HARD_FLOAT && TARGET_64BIT && flag_pic && SYMBOL_REF_LOCAL_P (operands[1])" "<load>\t%0,%1,%2" [(set (attr "length") (const_int 8))]) (define_insn "*local_pic_load<mode>" [(set (match_operand:ANYF 0 "register_operand" "=f") - (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) + (mem:ANYF (match_operand 1 "absolute_symbolic_operand" ""))) (clobber (match_scratch:SI 2 "=&r"))] "TARGET_HARD_FLOAT && !TARGET_64BIT && flag_pic && SYMBOL_REF_LOCAL_P (operands[1])" "<load>\t%0,%1,%2" [(set (attr "length") (const_int 8))]) (define_insn "*local_pic_loadu<mode>" [(set (match_operand:SUPERQI 0 "register_operand" "=r") - (zero_extend:SUPERQI (mem:SUBDI (match_operand 1 "absolute_symbolic_operand" ""))))] + (zero_extend:SUPERQI (mem:SUBDI (match_operand 1 "absolute_symbolic_operand" ""))))] "flag_pic && SYMBOL_REF_LOCAL_P (operands[1])" "<load>u\t%0,%1" [(set (attr "length") (const_int 8))]) |