diff options
author | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-03 17:00:26 -0800 |
---|---|---|
committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2016-03-03 17:01:11 -0800 |
commit | 235e1fae5fba6fa639b8164b5093c1df9a6a9e31 (patch) | |
tree | f575d9381a556ba062a362d2da39130939a407f7 /binutils | |
parent | f2a2c878e7f69d268f6267dc7a08529ffb3e947b (diff) | |
download | riscv-gnu-toolchain-235e1fae5fba6fa639b8164b5093c1df9a6a9e31.zip riscv-gnu-toolchain-235e1fae5fba6fa639b8164b5093c1df9a6a9e31.tar.gz riscv-gnu-toolchain-235e1fae5fba6fa639b8164b5093c1df9a6a9e31.tar.bz2 |
binutils: update CSR/privileged instruction encoding
Diffstat (limited to 'binutils')
-rw-r--r-- | binutils/include/opcode/riscv-opc.h | 488 | ||||
-rw-r--r-- | binutils/opcodes/riscv-opc.c | 1 |
2 files changed, 72 insertions, 417 deletions
diff --git a/binutils/include/opcode/riscv-opc.h b/binutils/include/opcode/riscv-opc.h index 76e94ea..ad20f63 100644 --- a/binutils/include/opcode/riscv-opc.h +++ b/binutils/include/opcode/riscv-opc.h @@ -217,18 +217,12 @@ #define MASK_SCALL 0xffffffff #define MATCH_SBREAK 0x100073 #define MASK_SBREAK 0xffffffff -#define MATCH_SRET 0x10000073 +#define MATCH_SRET 0x10200073 #define MASK_SRET 0xffffffff -#define MATCH_SFENCE_VM 0x10100073 +#define MATCH_SFENCE_VM 0x10400073 #define MASK_SFENCE_VM 0xfff07fff -#define MATCH_WFI 0x10200073 +#define MATCH_WFI 0x10500073 #define MASK_WFI 0xffffffff -#define MATCH_MRTH 0x30600073 -#define MASK_MRTH 0xffffffff -#define MATCH_MRTS 0x30500073 -#define MASK_MRTS 0xffffffff -#define MATCH_HRTS 0x20500073 -#define MASK_HRTS 0xffffffff #define MATCH_CSRRW 0x1073 #define MASK_CSRRW 0x707f #define MATCH_CSRRS 0x2073 @@ -449,248 +443,6 @@ #define MASK_C_LDSP 0xe003 #define MATCH_C_SDSP 0xe002 #define MASK_C_SDSP 0xe003 -#define MATCH_VLD 0x600205b -#define MASK_VLD 0xfff0707f -#define MATCH_VLW 0x400205b -#define MASK_VLW 0xfff0707f -#define MATCH_VLWU 0xc00205b -#define MASK_VLWU 0xfff0707f -#define MATCH_VLH 0x200205b -#define MASK_VLH 0xfff0707f -#define MATCH_VLHU 0xa00205b -#define MASK_VLHU 0xfff0707f -#define MATCH_VLB 0x205b -#define MASK_VLB 0xfff0707f -#define MATCH_VLBU 0x800205b -#define MASK_VLBU 0xfff0707f -#define MATCH_VFLD 0x1600205b -#define MASK_VFLD 0xfff0707f -#define MATCH_VFLW 0x1400205b -#define MASK_VFLW 0xfff0707f -#define MATCH_VLSTD 0x600305b -#define MASK_VLSTD 0xfe00707f -#define MATCH_VLSTW 0x400305b -#define MASK_VLSTW 0xfe00707f -#define MATCH_VLSTWU 0xc00305b -#define MASK_VLSTWU 0xfe00707f -#define MATCH_VLSTH 0x200305b -#define MASK_VLSTH 0xfe00707f -#define MATCH_VLSTHU 0xa00305b -#define MASK_VLSTHU 0xfe00707f -#define MATCH_VLSTB 0x305b -#define MASK_VLSTB 0xfe00707f -#define MATCH_VLSTBU 0x800305b -#define MASK_VLSTBU 0xfe00707f -#define MATCH_VFLSTD 0x1600305b -#define MASK_VFLSTD 0xfe00707f -#define MATCH_VFLSTW 0x1400305b -#define MASK_VFLSTW 0xfe00707f -#define MATCH_VSD 0x600207b -#define MASK_VSD 0xfff0707f -#define MATCH_VSW 0x400207b -#define MASK_VSW 0xfff0707f -#define MATCH_VSH 0x200207b -#define MASK_VSH 0xfff0707f -#define MATCH_VSB 0x207b -#define MASK_VSB 0xfff0707f -#define MATCH_VFSD 0x1600207b -#define MASK_VFSD 0xfff0707f -#define MATCH_VFSW 0x1400207b -#define MASK_VFSW 0xfff0707f -#define MATCH_VSSTD 0x600307b -#define MASK_VSSTD 0xfe00707f -#define MATCH_VSSTW 0x400307b -#define MASK_VSSTW 0xfe00707f -#define MATCH_VSSTH 0x200307b -#define MASK_VSSTH 0xfe00707f -#define MATCH_VSSTB 0x307b -#define MASK_VSSTB 0xfe00707f -#define MATCH_VFSSTD 0x1600307b -#define MASK_VFSSTD 0xfe00707f -#define MATCH_VFSSTW 0x1400307b -#define MASK_VFSSTW 0xfe00707f -#define MATCH_VSETCFG 0x200b -#define MASK_VSETCFG 0x7fff -#define MATCH_VSETVL 0x600b -#define MASK_VSETVL 0xfff0707f -#define MATCH_VGETCFG 0x400b -#define MASK_VGETCFG 0xfffff07f -#define MATCH_VGETVL 0x200400b -#define MASK_VGETVL 0xfffff07f -#define MATCH_VMVV 0x200002b -#define MASK_VMVV 0xfff0707f -#define MATCH_VMSV 0x200202b -#define MASK_VMSV 0xfff0707f -#define MATCH_VFMVV 0x1000002b -#define MASK_VFMVV 0xfff0707f -#define MATCH_VFMVV 0x1000002b -#define MASK_VFMVV 0xfff0707f -#define MATCH_VFMSV_S 0x1000202b -#define MASK_VFMSV_S 0xfff0707f -#define MATCH_VFMSV_D 0x1200202b -#define MASK_VFMSV_D 0xfff0707f -#define MATCH_VF 0x10202b -#define MASK_VF 0x1f0707f -#define MATCH_VXCPTCAUSE 0x402b -#define MASK_VXCPTCAUSE 0xfffff07f -#define MATCH_VXCPTAUX 0x200402b -#define MASK_VXCPTAUX 0xfffff07f -#define MATCH_VXCPTSAVE 0x302b -#define MASK_VXCPTSAVE 0xfff07fff -#define MATCH_VXCPTRESTORE 0x200302b -#define MASK_VXCPTRESTORE 0xfff07fff -#define MATCH_VXCPTKILL 0x400302b -#define MASK_VXCPTKILL 0xffffffff -#define MATCH_VXCPTEVAC 0x600302b -#define MASK_VXCPTEVAC 0xfff07fff -#define MATCH_VXCPTHOLD 0x800302b -#define MASK_VXCPTHOLD 0xfff07fff -#define MATCH_VENQCMD 0xa00302b -#define MASK_VENQCMD 0xfe007fff -#define MATCH_VENQIMM1 0xc00302b -#define MASK_VENQIMM1 0xfe007fff -#define MATCH_VENQIMM2 0xe00302b -#define MASK_VENQIMM2 0xfe007fff -#define MATCH_VENQCNT 0x1000302b -#define MASK_VENQCNT 0xfe007fff -#define MATCH_VLSEGD 0x600205b -#define MASK_VLSEGD 0x1ff0707f -#define MATCH_VLSEGW 0x400205b -#define MASK_VLSEGW 0x1ff0707f -#define MATCH_VLSEGWU 0xc00205b -#define MASK_VLSEGWU 0x1ff0707f -#define MATCH_VLSEGH 0x200205b -#define MASK_VLSEGH 0x1ff0707f -#define MATCH_VLSEGHU 0xa00205b -#define MASK_VLSEGHU 0x1ff0707f -#define MATCH_VLSEGB 0x205b -#define MASK_VLSEGB 0x1ff0707f -#define MATCH_VLSEGBU 0x800205b -#define MASK_VLSEGBU 0x1ff0707f -#define MATCH_VFLSEGD 0x1600205b -#define MASK_VFLSEGD 0x1ff0707f -#define MATCH_VFLSEGW 0x1400205b -#define MASK_VFLSEGW 0x1ff0707f -#define MATCH_VLSEGSTD 0x600305b -#define MASK_VLSEGSTD 0x1e00707f -#define MATCH_VLSEGSTW 0x400305b -#define MASK_VLSEGSTW 0x1e00707f -#define MATCH_VLSEGSTWU 0xc00305b -#define MASK_VLSEGSTWU 0x1e00707f -#define MATCH_VLSEGSTH 0x200305b -#define MASK_VLSEGSTH 0x1e00707f -#define MATCH_VLSEGSTHU 0xa00305b -#define MASK_VLSEGSTHU 0x1e00707f -#define MATCH_VLSEGSTB 0x305b -#define MASK_VLSEGSTB 0x1e00707f -#define MATCH_VLSEGSTBU 0x800305b -#define MASK_VLSEGSTBU 0x1e00707f -#define MATCH_VFLSEGSTD 0x1600305b -#define MASK_VFLSEGSTD 0x1e00707f -#define MATCH_VFLSEGSTW 0x1400305b -#define MASK_VFLSEGSTW 0x1e00707f -#define MATCH_VSSEGD 0x600207b -#define MASK_VSSEGD 0x1ff0707f -#define MATCH_VSSEGW 0x400207b -#define MASK_VSSEGW 0x1ff0707f -#define MATCH_VSSEGH 0x200207b -#define MASK_VSSEGH 0x1ff0707f -#define MATCH_VSSEGB 0x207b -#define MASK_VSSEGB 0x1ff0707f -#define MATCH_VFSSEGD 0x1600207b -#define MASK_VFSSEGD 0x1ff0707f -#define MATCH_VFSSEGW 0x1400207b -#define MASK_VFSSEGW 0x1ff0707f -#define MATCH_VSSEGSTD 0x600307b -#define MASK_VSSEGSTD 0x1e00707f -#define MATCH_VSSEGSTW 0x400307b -#define MASK_VSSEGSTW 0x1e00707f -#define MATCH_VSSEGSTH 0x200307b -#define MASK_VSSEGSTH 0x1e00707f -#define MATCH_VSSEGSTB 0x307b -#define MASK_VSSEGSTB 0x1e00707f -#define MATCH_VFSSEGSTD 0x1600307b -#define MASK_VFSSEGSTD 0x1e00707f -#define MATCH_VFSSEGSTW 0x1400307b -#define MASK_VFSSEGSTW 0x1e00707f -#define MATCH_STOP 0x5077 -#define MASK_STOP 0xffffffff -#define MATCH_UTIDX 0x6077 -#define MASK_UTIDX 0xfffff07f -#define MATCH_MOVZ 0x7077 -#define MASK_MOVZ 0xfe00707f -#define MATCH_MOVN 0x2007077 -#define MASK_MOVN 0xfe00707f -#define MATCH_FMOVZ 0x4007077 -#define MASK_FMOVZ 0xfe00707f -#define MATCH_FMOVN 0x6007077 -#define MASK_FMOVN 0xfe00707f -#define MATCH_FADD_H 0x4000053 -#define MASK_FADD_H 0xfe00007f -#define MATCH_FSUB_H 0xc000053 -#define MASK_FSUB_H 0xfe00007f -#define MATCH_FMUL_H 0x14000053 -#define MASK_FMUL_H 0xfe00007f -#define MATCH_FDIV_H 0x1c000053 -#define MASK_FDIV_H 0xfe00007f -#define MATCH_FSQRT_H 0x24000053 -#define MASK_FSQRT_H 0xfff0007f -#define MATCH_FSGNJ_H 0x2c000053 -#define MASK_FSGNJ_H 0xfe00707f -#define MATCH_FSGNJN_H 0x34000053 -#define MASK_FSGNJN_H 0xfe00707f -#define MATCH_FSGNJX_H 0x3c000053 -#define MASK_FSGNJX_H 0xfe00707f -#define MATCH_FCVT_H_L 0x64000053 -#define MASK_FCVT_H_L 0xfff0007f -#define MATCH_FCVT_H_LU 0x6c000053 -#define MASK_FCVT_H_LU 0xfff0007f -#define MATCH_FCVT_H_W 0x74000053 -#define MASK_FCVT_H_W 0xfff0007f -#define MATCH_FCVT_H_WU 0x7c000053 -#define MASK_FCVT_H_WU 0xfff0007f -#define MATCH_FCVT_L_H 0x44000053 -#define MASK_FCVT_L_H 0xfff0007f -#define MATCH_FCVT_LU_H 0x4c000053 -#define MASK_FCVT_LU_H 0xfff0007f -#define MATCH_FCVT_W_H 0x54000053 -#define MASK_FCVT_W_H 0xfff0007f -#define MATCH_FCVT_WU_H 0x5c000053 -#define MASK_FCVT_WU_H 0xfff0007f -#define MATCH_FCVT_S_H 0x84000053 -#define MASK_FCVT_S_H 0xfff0007f -#define MATCH_FCVT_H_S 0x90000053 -#define MASK_FCVT_H_S 0xfff0007f -#define MATCH_FCVT_D_H 0x8c000053 -#define MASK_FCVT_D_H 0xfff0007f -#define MATCH_FCVT_H_D 0x92000053 -#define MASK_FCVT_H_D 0xfff0007f -#define MATCH_FEQ_H 0xac000053 -#define MASK_FEQ_H 0xfe00707f -#define MATCH_FLT_H 0xb4000053 -#define MASK_FLT_H 0xfe00707f -#define MATCH_FLE_H 0xbc000053 -#define MASK_FLE_H 0xfe00707f -#define MATCH_FMIN_H 0xc4000053 -#define MASK_FMIN_H 0xfe00707f -#define MATCH_FMAX_H 0xcc000053 -#define MASK_FMAX_H 0xfe00707f -#define MATCH_FMV_X_H 0xe4000053 -#define MASK_FMV_X_H 0xfff0707f -#define MATCH_FMV_H_X 0xf4000053 -#define MASK_FMV_H_X 0xfff0707f -#define MATCH_FLH 0x1007 -#define MASK_FLH 0x707f -#define MATCH_FSH 0x1027 -#define MASK_FSH 0x707f -#define MATCH_FMADD_H 0x4000043 -#define MASK_FMADD_H 0x600007f -#define MATCH_FMSUB_H 0x4000047 -#define MASK_FMSUB_H 0x600007f -#define MATCH_FNMSUB_H 0x400004b -#define MASK_FNMSUB_H 0x600007f -#define MATCH_FNMADD_H 0x400004f -#define MASK_FNMADD_H 0x600007f #define MATCH_CUSTOM0 0xb #define MASK_CUSTOM0 0x707f #define MATCH_CUSTOM0_RS1 0x200b @@ -763,49 +515,63 @@ #define CSR_UARCH14 0xcce #define CSR_UARCH15 0xccf #define CSR_SSTATUS 0x100 -#define CSR_STVEC 0x101 #define CSR_SIE 0x104 +#define CSR_STVEC 0x105 #define CSR_SSCRATCH 0x140 #define CSR_SEPC 0x141 +#define CSR_SCAUSE 0x142 +#define CSR_SBADADDR 0x143 #define CSR_SIP 0x144 #define CSR_SPTBR 0x180 #define CSR_SASID 0x181 -#define CSR_CYCLEW 0x900 -#define CSR_TIMEW 0x901 -#define CSR_INSTRETW 0x902 +#define CSR_SCYCLE 0xd00 #define CSR_STIME 0xd01 -#define CSR_SCAUSE 0xd42 -#define CSR_SBADADDR 0xd43 -#define CSR_STIMEW 0xa01 +#define CSR_SINSTRET 0xd02 #define CSR_MSTATUS 0x300 -#define CSR_MTVEC 0x301 -#define CSR_MTDELEG 0x302 +#define CSR_MEDELEG 0x302 +#define CSR_MIDELEG 0x303 #define CSR_MIE 0x304 +#define CSR_MTVEC 0x305 #define CSR_MTIMECMP 0x321 #define CSR_MSCRATCH 0x340 #define CSR_MEPC 0x341 #define CSR_MCAUSE 0x342 #define CSR_MBADADDR 0x343 #define CSR_MIP 0x344 -#define CSR_MTIME 0x701 -#define CSR_MCPUID 0xf00 -#define CSR_MIMPID 0xf01 -#define CSR_MHARTID 0xf10 -#define CSR_MTOHOST 0x780 -#define CSR_MFROMHOST 0x781 -#define CSR_MRESET 0x782 -#define CSR_MIPI 0x783 -#define CSR_MIOBASE 0x784 +#define CSR_MIPI 0x345 +#define CSR_MUCOUNTEREN 0x310 +#define CSR_MSCOUNTEREN 0x311 +#define CSR_MUCYCLE_DELTA 0x700 +#define CSR_MUTIME_DELTA 0x701 +#define CSR_MUINSTRET_DELTA 0x702 +#define CSR_MSCYCLE_DELTA 0x704 +#define CSR_MSTIME_DELTA 0x705 +#define CSR_MSINSTRET_DELTA 0x706 +#define CSR_MCYCLE 0xf00 +#define CSR_MTIME 0xf01 +#define CSR_MINSTRET 0xf02 +#define CSR_MISA 0xf10 +#define CSR_MVENDORID 0xf11 +#define CSR_MARCHID 0xf12 +#define CSR_MIMPID 0xf13 +#define CSR_MCFGADDR 0xf14 +#define CSR_MHARTID 0xf15 +#define CSR_MTOHOST 0x7c0 +#define CSR_MFROMHOST 0x7c1 +#define CSR_MRESET 0x7c2 #define CSR_CYCLEH 0xc80 #define CSR_TIMEH 0xc81 #define CSR_INSTRETH 0xc82 -#define CSR_CYCLEHW 0x980 -#define CSR_TIMEHW 0x981 -#define CSR_INSTRETHW 0x982 -#define CSR_STIMEH 0xd81 -#define CSR_STIMEHW 0xa81 #define CSR_MTIMECMPH 0x361 -#define CSR_MTIMEH 0x741 +#define CSR_MUCYCLE_DELTAH 0x780 +#define CSR_MUTIME_DELTAH 0x781 +#define CSR_MUINSTRET_DELTAH 0x782 +#define CSR_MSCYCLE_DELTAH 0x784 +#define CSR_MSTIME_DELTAH 0x785 +#define CSR_MSINSTRET_DELTAH 0x786 +#define CSR_MCYCLEH 0xf80 +#define CSR_MTIMEH 0xf81 +#define CSR_MINSTRETH 0xf82 #define CAUSE_MISALIGNED_FETCH 0x0 #define CAUSE_FAULT_FETCH 0x1 #define CAUSE_ILLEGAL_INSTRUCTION 0x2 @@ -931,9 +697,6 @@ DECLARE_INSN(sbreak, MATCH_SBREAK, MASK_SBREAK) DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM) DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI) -DECLARE_INSN(mrth, MATCH_MRTH, MASK_MRTH) -DECLARE_INSN(mrts, MATCH_MRTS, MASK_MRTS) -DECLARE_INSN(hrts, MATCH_HRTS, MASK_HRTS) DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW) DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS) DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC) @@ -1044,127 +807,6 @@ DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD) DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW) DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP) DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP) -DECLARE_INSN(vld, MATCH_VLD, MASK_VLD) -DECLARE_INSN(vlw, MATCH_VLW, MASK_VLW) -DECLARE_INSN(vlwu, MATCH_VLWU, MASK_VLWU) -DECLARE_INSN(vlh, MATCH_VLH, MASK_VLH) -DECLARE_INSN(vlhu, MATCH_VLHU, MASK_VLHU) -DECLARE_INSN(vlb, MATCH_VLB, MASK_VLB) -DECLARE_INSN(vlbu, MATCH_VLBU, MASK_VLBU) -DECLARE_INSN(vfld, MATCH_VFLD, MASK_VFLD) -DECLARE_INSN(vflw, MATCH_VFLW, MASK_VFLW) -DECLARE_INSN(vlstd, MATCH_VLSTD, MASK_VLSTD) -DECLARE_INSN(vlstw, MATCH_VLSTW, MASK_VLSTW) -DECLARE_INSN(vlstwu, MATCH_VLSTWU, MASK_VLSTWU) -DECLARE_INSN(vlsth, MATCH_VLSTH, MASK_VLSTH) -DECLARE_INSN(vlsthu, MATCH_VLSTHU, MASK_VLSTHU) -DECLARE_INSN(vlstb, MATCH_VLSTB, MASK_VLSTB) -DECLARE_INSN(vlstbu, MATCH_VLSTBU, MASK_VLSTBU) -DECLARE_INSN(vflstd, MATCH_VFLSTD, MASK_VFLSTD) -DECLARE_INSN(vflstw, MATCH_VFLSTW, MASK_VFLSTW) -DECLARE_INSN(vsd, MATCH_VSD, MASK_VSD) -DECLARE_INSN(vsw, MATCH_VSW, MASK_VSW) -DECLARE_INSN(vsh, MATCH_VSH, MASK_VSH) -DECLARE_INSN(vsb, MATCH_VSB, MASK_VSB) -DECLARE_INSN(vfsd, MATCH_VFSD, MASK_VFSD) -DECLARE_INSN(vfsw, MATCH_VFSW, MASK_VFSW) -DECLARE_INSN(vsstd, MATCH_VSSTD, MASK_VSSTD) -DECLARE_INSN(vsstw, MATCH_VSSTW, MASK_VSSTW) -DECLARE_INSN(vssth, MATCH_VSSTH, MASK_VSSTH) -DECLARE_INSN(vsstb, MATCH_VSSTB, MASK_VSSTB) -DECLARE_INSN(vfsstd, MATCH_VFSSTD, MASK_VFSSTD) -DECLARE_INSN(vfsstw, MATCH_VFSSTW, MASK_VFSSTW) -DECLARE_INSN(vsetcfg, MATCH_VSETCFG, MASK_VSETCFG) -DECLARE_INSN(vsetvl, MATCH_VSETVL, MASK_VSETVL) -DECLARE_INSN(vgetcfg, MATCH_VGETCFG, MASK_VGETCFG) -DECLARE_INSN(vgetvl, MATCH_VGETVL, MASK_VGETVL) -DECLARE_INSN(vmvv, MATCH_VMVV, MASK_VMVV) -DECLARE_INSN(vmsv, MATCH_VMSV, MASK_VMSV) -DECLARE_INSN(vfmvv, MATCH_VFMVV, MASK_VFMVV) -DECLARE_INSN(vfmvv, MATCH_VFMVV, MASK_VFMVV) -DECLARE_INSN(vfmsv_s, MATCH_VFMSV_S, MASK_VFMSV_S) -DECLARE_INSN(vfmsv_d, MATCH_VFMSV_D, MASK_VFMSV_D) -DECLARE_INSN(vf, MATCH_VF, MASK_VF) -DECLARE_INSN(vxcptcause, MATCH_VXCPTCAUSE, MASK_VXCPTCAUSE) -DECLARE_INSN(vxcptaux, MATCH_VXCPTAUX, MASK_VXCPTAUX) -DECLARE_INSN(vxcptsave, MATCH_VXCPTSAVE, MASK_VXCPTSAVE) -DECLARE_INSN(vxcptrestore, MATCH_VXCPTRESTORE, MASK_VXCPTRESTORE) -DECLARE_INSN(vxcptkill, MATCH_VXCPTKILL, MASK_VXCPTKILL) -DECLARE_INSN(vxcptevac, MATCH_VXCPTEVAC, MASK_VXCPTEVAC) -DECLARE_INSN(vxcpthold, MATCH_VXCPTHOLD, MASK_VXCPTHOLD) -DECLARE_INSN(venqcmd, MATCH_VENQCMD, MASK_VENQCMD) -DECLARE_INSN(venqimm1, MATCH_VENQIMM1, MASK_VENQIMM1) -DECLARE_INSN(venqimm2, MATCH_VENQIMM2, MASK_VENQIMM2) -DECLARE_INSN(venqcnt, MATCH_VENQCNT, MASK_VENQCNT) -DECLARE_INSN(vlsegd, MATCH_VLSEGD, MASK_VLSEGD) -DECLARE_INSN(vlsegw, MATCH_VLSEGW, MASK_VLSEGW) -DECLARE_INSN(vlsegwu, MATCH_VLSEGWU, MASK_VLSEGWU) -DECLARE_INSN(vlsegh, MATCH_VLSEGH, MASK_VLSEGH) -DECLARE_INSN(vlseghu, MATCH_VLSEGHU, MASK_VLSEGHU) -DECLARE_INSN(vlsegb, MATCH_VLSEGB, MASK_VLSEGB) -DECLARE_INSN(vlsegbu, MATCH_VLSEGBU, MASK_VLSEGBU) -DECLARE_INSN(vflsegd, MATCH_VFLSEGD, MASK_VFLSEGD) -DECLARE_INSN(vflsegw, MATCH_VFLSEGW, MASK_VFLSEGW) -DECLARE_INSN(vlsegstd, MATCH_VLSEGSTD, MASK_VLSEGSTD) -DECLARE_INSN(vlsegstw, MATCH_VLSEGSTW, MASK_VLSEGSTW) -DECLARE_INSN(vlsegstwu, MATCH_VLSEGSTWU, MASK_VLSEGSTWU) -DECLARE_INSN(vlsegsth, MATCH_VLSEGSTH, MASK_VLSEGSTH) -DECLARE_INSN(vlsegsthu, MATCH_VLSEGSTHU, MASK_VLSEGSTHU) -DECLARE_INSN(vlsegstb, MATCH_VLSEGSTB, MASK_VLSEGSTB) -DECLARE_INSN(vlsegstbu, MATCH_VLSEGSTBU, MASK_VLSEGSTBU) -DECLARE_INSN(vflsegstd, MATCH_VFLSEGSTD, MASK_VFLSEGSTD) -DECLARE_INSN(vflsegstw, MATCH_VFLSEGSTW, MASK_VFLSEGSTW) -DECLARE_INSN(vssegd, MATCH_VSSEGD, MASK_VSSEGD) -DECLARE_INSN(vssegw, MATCH_VSSEGW, MASK_VSSEGW) -DECLARE_INSN(vssegh, MATCH_VSSEGH, MASK_VSSEGH) -DECLARE_INSN(vssegb, MATCH_VSSEGB, MASK_VSSEGB) -DECLARE_INSN(vfssegd, MATCH_VFSSEGD, MASK_VFSSEGD) -DECLARE_INSN(vfssegw, MATCH_VFSSEGW, MASK_VFSSEGW) -DECLARE_INSN(vssegstd, MATCH_VSSEGSTD, MASK_VSSEGSTD) -DECLARE_INSN(vssegstw, MATCH_VSSEGSTW, MASK_VSSEGSTW) -DECLARE_INSN(vssegsth, MATCH_VSSEGSTH, MASK_VSSEGSTH) -DECLARE_INSN(vssegstb, MATCH_VSSEGSTB, MASK_VSSEGSTB) -DECLARE_INSN(vfssegstd, MATCH_VFSSEGSTD, MASK_VFSSEGSTD) -DECLARE_INSN(vfssegstw, MATCH_VFSSEGSTW, MASK_VFSSEGSTW) -DECLARE_INSN(stop, MATCH_STOP, MASK_STOP) -DECLARE_INSN(utidx, MATCH_UTIDX, MASK_UTIDX) -DECLARE_INSN(movz, MATCH_MOVZ, MASK_MOVZ) -DECLARE_INSN(movn, MATCH_MOVN, MASK_MOVN) -DECLARE_INSN(fmovz, MATCH_FMOVZ, MASK_FMOVZ) -DECLARE_INSN(fmovn, MATCH_FMOVN, MASK_FMOVN) -DECLARE_INSN(fadd_h, MATCH_FADD_H, MASK_FADD_H) -DECLARE_INSN(fsub_h, MATCH_FSUB_H, MASK_FSUB_H) -DECLARE_INSN(fmul_h, MATCH_FMUL_H, MASK_FMUL_H) -DECLARE_INSN(fdiv_h, MATCH_FDIV_H, MASK_FDIV_H) -DECLARE_INSN(fsqrt_h, MATCH_FSQRT_H, MASK_FSQRT_H) -DECLARE_INSN(fsgnj_h, MATCH_FSGNJ_H, MASK_FSGNJ_H) -DECLARE_INSN(fsgnjn_h, MATCH_FSGNJN_H, MASK_FSGNJN_H) -DECLARE_INSN(fsgnjx_h, MATCH_FSGNJX_H, MASK_FSGNJX_H) -DECLARE_INSN(fcvt_h_l, MATCH_FCVT_H_L, MASK_FCVT_H_L) -DECLARE_INSN(fcvt_h_lu, MATCH_FCVT_H_LU, MASK_FCVT_H_LU) -DECLARE_INSN(fcvt_h_w, MATCH_FCVT_H_W, MASK_FCVT_H_W) -DECLARE_INSN(fcvt_h_wu, MATCH_FCVT_H_WU, MASK_FCVT_H_WU) -DECLARE_INSN(fcvt_l_h, MATCH_FCVT_L_H, MASK_FCVT_L_H) -DECLARE_INSN(fcvt_lu_h, MATCH_FCVT_LU_H, MASK_FCVT_LU_H) -DECLARE_INSN(fcvt_w_h, MATCH_FCVT_W_H, MASK_FCVT_W_H) -DECLARE_INSN(fcvt_wu_h, MATCH_FCVT_WU_H, MASK_FCVT_WU_H) -DECLARE_INSN(fcvt_s_h, MATCH_FCVT_S_H, MASK_FCVT_S_H) -DECLARE_INSN(fcvt_h_s, MATCH_FCVT_H_S, MASK_FCVT_H_S) -DECLARE_INSN(fcvt_d_h, MATCH_FCVT_D_H, MASK_FCVT_D_H) -DECLARE_INSN(fcvt_h_d, MATCH_FCVT_H_D, MASK_FCVT_H_D) -DECLARE_INSN(feq_h, MATCH_FEQ_H, MASK_FEQ_H) -DECLARE_INSN(flt_h, MATCH_FLT_H, MASK_FLT_H) -DECLARE_INSN(fle_h, MATCH_FLE_H, MASK_FLE_H) -DECLARE_INSN(fmin_h, MATCH_FMIN_H, MASK_FMIN_H) -DECLARE_INSN(fmax_h, MATCH_FMAX_H, MASK_FMAX_H) -DECLARE_INSN(fmv_x_h, MATCH_FMV_X_H, MASK_FMV_X_H) -DECLARE_INSN(fmv_h_x, MATCH_FMV_H_X, MASK_FMV_H_X) -DECLARE_INSN(flh, MATCH_FLH, MASK_FLH) -DECLARE_INSN(fsh, MATCH_FSH, MASK_FSH) -DECLARE_INSN(fmadd_h, MATCH_FMADD_H, MASK_FMADD_H) -DECLARE_INSN(fmsub_h, MATCH_FMSUB_H, MASK_FMSUB_H) -DECLARE_INSN(fnmsub_h, MATCH_FNMSUB_H, MASK_FNMSUB_H) -DECLARE_INSN(fnmadd_h, MATCH_FNMADD_H, MASK_FNMADD_H) DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0) DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1) DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2) @@ -1215,49 +857,63 @@ DECLARE_CSR(uarch13, CSR_UARCH13) DECLARE_CSR(uarch14, CSR_UARCH14) DECLARE_CSR(uarch15, CSR_UARCH15) DECLARE_CSR(sstatus, CSR_SSTATUS) -DECLARE_CSR(stvec, CSR_STVEC) DECLARE_CSR(sie, CSR_SIE) +DECLARE_CSR(stvec, CSR_STVEC) DECLARE_CSR(sscratch, CSR_SSCRATCH) DECLARE_CSR(sepc, CSR_SEPC) +DECLARE_CSR(scause, CSR_SCAUSE) +DECLARE_CSR(sbadaddr, CSR_SBADADDR) DECLARE_CSR(sip, CSR_SIP) DECLARE_CSR(sptbr, CSR_SPTBR) DECLARE_CSR(sasid, CSR_SASID) -DECLARE_CSR(cyclew, CSR_CYCLEW) -DECLARE_CSR(timew, CSR_TIMEW) -DECLARE_CSR(instretw, CSR_INSTRETW) +DECLARE_CSR(scycle, CSR_SCYCLE) DECLARE_CSR(stime, CSR_STIME) -DECLARE_CSR(scause, CSR_SCAUSE) -DECLARE_CSR(sbadaddr, CSR_SBADADDR) -DECLARE_CSR(stimew, CSR_STIMEW) +DECLARE_CSR(sinstret, CSR_SINSTRET) DECLARE_CSR(mstatus, CSR_MSTATUS) -DECLARE_CSR(mtvec, CSR_MTVEC) -DECLARE_CSR(mtdeleg, CSR_MTDELEG) +DECLARE_CSR(medeleg, CSR_MEDELEG) +DECLARE_CSR(mideleg, CSR_MIDELEG) DECLARE_CSR(mie, CSR_MIE) +DECLARE_CSR(mtvec, CSR_MTVEC) DECLARE_CSR(mtimecmp, CSR_MTIMECMP) DECLARE_CSR(mscratch, CSR_MSCRATCH) DECLARE_CSR(mepc, CSR_MEPC) DECLARE_CSR(mcause, CSR_MCAUSE) DECLARE_CSR(mbadaddr, CSR_MBADADDR) DECLARE_CSR(mip, CSR_MIP) +DECLARE_CSR(mipi, CSR_MIPI) +DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN) +DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN) +DECLARE_CSR(mucycle_delta, CSR_MUCYCLE_DELTA) +DECLARE_CSR(mutime_delta, CSR_MUTIME_DELTA) +DECLARE_CSR(muinstret_delta, CSR_MUINSTRET_DELTA) +DECLARE_CSR(mscycle_delta, CSR_MSCYCLE_DELTA) +DECLARE_CSR(mstime_delta, CSR_MSTIME_DELTA) +DECLARE_CSR(msinstret_delta, CSR_MSINSTRET_DELTA) +DECLARE_CSR(mcycle, CSR_MCYCLE) DECLARE_CSR(mtime, CSR_MTIME) -DECLARE_CSR(mcpuid, CSR_MCPUID) +DECLARE_CSR(minstret, CSR_MINSTRET) +DECLARE_CSR(misa, CSR_MISA) +DECLARE_CSR(mvendorid, CSR_MVENDORID) +DECLARE_CSR(marchid, CSR_MARCHID) DECLARE_CSR(mimpid, CSR_MIMPID) +DECLARE_CSR(mcfgaddr, CSR_MCFGADDR) DECLARE_CSR(mhartid, CSR_MHARTID) DECLARE_CSR(mtohost, CSR_MTOHOST) DECLARE_CSR(mfromhost, CSR_MFROMHOST) DECLARE_CSR(mreset, CSR_MRESET) -DECLARE_CSR(mipi, CSR_MIPI) -DECLARE_CSR(miobase, CSR_MIOBASE) DECLARE_CSR(cycleh, CSR_CYCLEH) DECLARE_CSR(timeh, CSR_TIMEH) DECLARE_CSR(instreth, CSR_INSTRETH) -DECLARE_CSR(cyclehw, CSR_CYCLEHW) -DECLARE_CSR(timehw, CSR_TIMEHW) -DECLARE_CSR(instrethw, CSR_INSTRETHW) -DECLARE_CSR(stimeh, CSR_STIMEH) -DECLARE_CSR(stimehw, CSR_STIMEHW) DECLARE_CSR(mtimecmph, CSR_MTIMECMPH) +DECLARE_CSR(mucycle_deltah, CSR_MUCYCLE_DELTAH) +DECLARE_CSR(mutime_deltah, CSR_MUTIME_DELTAH) +DECLARE_CSR(muinstret_deltah, CSR_MUINSTRET_DELTAH) +DECLARE_CSR(mscycle_deltah, CSR_MSCYCLE_DELTAH) +DECLARE_CSR(mstime_deltah, CSR_MSTIME_DELTAH) +DECLARE_CSR(msinstret_deltah, CSR_MSINSTRET_DELTAH) +DECLARE_CSR(mcycleh, CSR_MCYCLEH) DECLARE_CSR(mtimeh, CSR_MTIMEH) +DECLARE_CSR(minstreth, CSR_MINSTRETH) #endif #ifdef DECLARE_CAUSE DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH) diff --git a/binutils/opcodes/riscv-opc.c b/binutils/opcodes/riscv-opc.c index 5f6095a..8df27de 100644 --- a/binutils/opcodes/riscv-opc.c +++ b/binutils/opcodes/riscv-opc.c @@ -604,7 +604,6 @@ const struct riscv_opcode riscv_builtin_opcodes[] = {"csrrci", "I", "d,E,Z", MATCH_CSRRCI, MASK_CSRRCI, match_opcode, 0 }, {"eret", "I", "", MATCH_SRET, MASK_SRET, match_opcode, 0 }, {"sret", "I", "", MATCH_SRET, MASK_SRET, match_opcode, 0 }, -{"mrts", "I", "", MATCH_MRTS, MASK_MRTS, match_opcode, 0 }, {"sfence.vm", "I", "", MATCH_SFENCE_VM, MASK_SFENCE_VM | MASK_RS1, match_opcode, 0 }, {"sfence.vm", "I", "s", MATCH_SFENCE_VM, MASK_SFENCE_VM, match_opcode, 0 }, {"wfi", "I", "", MATCH_WFI, MASK_WFI, match_opcode, 0 }, |