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| author | Palmer Dabbelt <palmer@dabbelt.com> | 2017-08-06 12:53:32 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@dabbelt.com> | 2017-08-06 12:53:32 -0700 |
| commit | 8d74bf8eeb200786ba4d572fa64c1dd068f25f8c (patch) | |
| tree | 994c0d7830db68ed0f5fff53c95c823befa4d16f | |
| parent | 38d4b1adf5045af92e5220b3fc27eb36b120b98c (diff) | |
| download | riscv-gnu-toolchain-8d74bf8eeb200786ba4d572fa64c1dd068f25f8c.zip riscv-gnu-toolchain-8d74bf8eeb200786ba4d572fa64c1dd068f25f8c.tar.gz riscv-gnu-toolchain-8d74bf8eeb200786ba4d572fa64c1dd068f25f8c.tar.bz2 | |
bump binutils, to allow mixing RVC and no-RVC
* 0419befe6f92 (WIP) RISC-V: Provide better disassembly of alignment
sequences
* 160ba91886e3 (WIP) objdump: Provide the found reloc to the disassembler
* 779cd1f46451 (WIP) RISC-V: Avoid emitting invalid instructions in mixed
RVC/no-RVC code
* ceef952725fb (WIP) RISC-V: Print an error when unable to align a section
| m--------- | riscv-binutils-gdb | 0 |
1 files changed, 0 insertions, 0 deletions
diff --git a/riscv-binutils-gdb b/riscv-binutils-gdb -Subproject 3f21b5c9675db61ef5462442b6a068d4a3da8aa +Subproject 0419befe6f927af375ae020b36fdbc244818ed7 |