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author | Kito Cheng <kito.cheng@sifive.com> | 2022-08-17 20:38:44 +0800 |
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committer | GitHub <noreply@github.com> | 2022-08-17 20:38:44 +0800 |
commit | ea1c0d29896e56f98d304a94dfd33c498de153ef (patch) | |
tree | 9fd134972fb33b98d58381daae15c19110b10a7c | |
parent | cb25bb862a3bf56d1577d7930bc41f259632ae24 (diff) | |
parent | 3a5a9bfec11a3928ecfcf8f28f9ba7e7c6614fa4 (diff) | |
download | riscv-gnu-toolchain-ea1c0d29896e56f98d304a94dfd33c498de153ef.zip riscv-gnu-toolchain-ea1c0d29896e56f98d304a94dfd33c498de153ef.tar.gz riscv-gnu-toolchain-ea1c0d29896e56f98d304a94dfd33c498de153ef.tar.bz2 |
Merge pull request #1108 from riscv-collab/bump-binutils-2.392022.08.18
Switch binutils to upstream 2.39 branch and rename the folder name
-rw-r--r-- | .gitmodules | 8 | ||||
m--------- | binutils (renamed from riscv-binutils) | 0 | ||||
-rwxr-xr-x | configure | 2 | ||||
-rw-r--r-- | configure.ac | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/.gitmodules b/.gitmodules index e7d5ce5..0991184 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,7 +1,7 @@ -[submodule "riscv-binutils"] - path = riscv-binutils - url = https://github.com/riscv-collab/riscv-binutils-gdb.git - branch = riscv-binutils-2.38 +[submodule "binutils"] + path = binutils + url = https://sourceware.org/git/binutils-gdb.git + branch = binutils-2_39-branch [submodule "riscv-gcc"] path = riscv-gcc url = https://github.com/riscv-collab/riscv-gcc.git diff --git a/riscv-binutils b/binutils -Subproject 20756b0fbe065a84710aa38f2457563b5754644 +Subproject 20756b0fbe065a84710aa38f2457563b5754644 @@ -3591,7 +3591,7 @@ fi with_binutils_src=$with_binutils_src else - with_binutils_src="\$(srcdir)/riscv-binutils" + with_binutils_src="\$(srcdir)/binutils" fi diff --git a/configure.ac b/configure.ac index 9c0d60d..592c02d 100644 --- a/configure.ac +++ b/configure.ac @@ -236,7 +236,7 @@ AC_DEFUN([AX_ARG_WITH_SRC], }]) AX_ARG_WITH_SRC(gcc, riscv-gcc) -AX_ARG_WITH_SRC(binutils, riscv-binutils) +AX_ARG_WITH_SRC(binutils, binutils) AX_ARG_WITH_SRC(newlib, newlib) AX_ARG_WITH_SRC(glibc, glibc) AX_ARG_WITH_SRC(musl, musl) |