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author | Kito Cheng <kito.cheng@sifive.com> | 2023-05-13 14:21:35 +0800 |
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committer | GitHub <noreply@github.com> | 2023-05-13 14:21:35 +0800 |
commit | ac4e8ddfc45c6dd2e9bc5d3fc0fc515633d26643 (patch) | |
tree | 0152896694cd67d63c79acc96439dd8f86b19976 | |
parent | 57699f1eefe75a17e680381f2881088e8e05a403 (diff) | |
parent | 5da0026b1bff81d6de1dcf21636a970094b61c20 (diff) | |
download | riscv-gnu-toolchain-ac4e8ddfc45c6dd2e9bc5d3fc0fc515633d26643.zip riscv-gnu-toolchain-ac4e8ddfc45c6dd2e9bc5d3fc0fc515633d26643.tar.gz riscv-gnu-toolchain-ac4e8ddfc45c6dd2e9bc5d3fc0fc515633d26643.tar.bz2 |
Merge pull request #1233 from riscv-collab/attr-qemu2023.05.14
Set qemu cpu option from ELF attribute
-rw-r--r-- | Makefile.in | 5 | ||||
-rwxr-xr-x | scripts/march-to-cpu-opt | 58 | ||||
-rwxr-xr-x | scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run | 4 |
3 files changed, 61 insertions, 6 deletions
diff --git a/Makefile.in b/Makefile.in index 7ae9d4c..cc03794 100644 --- a/Makefile.in +++ b/Makefile.in @@ -176,9 +176,8 @@ report-gdb: report-gdb-@default_target@ .PHONY: build-sim ifeq ($(SIM),qemu) -QEMU_CPU=$(shell $(srcdir)/scripts/march-to-cpu-opt $(WITH_ARCH)) -SIM_PATH:=$(srcdir)/scripts/wrapper/qemu -SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)" QEMU_CPU="$(QEMU_CPU)" +SIM_PATH:=$(srcdir)/scripts/wrapper/qemu:$(srcdir)/scripts +SIM_PREPARE:=PATH="$(SIM_PATH):$(INSTALL_DIR)/bin:$(PATH)" RISC_V_SYSROOT="$(SYSROOT)" SIM_STAMP:= stamps/build-qemu else ifeq ($(SIM),spike) diff --git a/scripts/march-to-cpu-opt b/scripts/march-to-cpu-opt index 7e1064a..752cf03 100755 --- a/scripts/march-to-cpu-opt +++ b/scripts/march-to-cpu-opt @@ -3,6 +3,9 @@ import argparse import sys import unittest +import elftools.elf.elffile +import elftools.elf.enums +import elftools.elf.sections EXT_OPTS = { "zba": "zba=true", @@ -26,6 +29,8 @@ def parse_opt(argv): parser = argparse.ArgumentParser() parser.add_argument('-march', '--with-arch', type=str, dest='march') parser.add_argument('-selftest', action='store_true') + parser.add_argument('--get-riscv-tag', type=str) + parser.add_argument('--get-elf-class', type=str) opt = parser.parse_args() return opt @@ -156,12 +161,63 @@ class TestArchStringParse(unittest.TestCase): def selftest(): unittest.main(argv=sys.argv[1:]) +def open_elf(path): + try: + elffile = elftools.elf.elffile.ELFFile(open(path, 'rb')) + except elftools.common.exceptions.ELFError: + raise Exception("%s is not ELF file!" % path) + return elffile + +def read_elf_class(path): + elffile = open_elf(path) + return elffile.elfclass + +def read_arch_attr (path): + elffile = open_elf(path) + + attr_sec = elffile.get_section_by_name(".riscv.attributes") + if attr_sec: + # pyelftools has support RISC-V attribute but not contain in any + # release yet, so use ARMAttributesSection for now... + xattr_section = \ + elftools.elf.sections.ARMAttributesSection ( + attr_sec.header, + attr_sec.name, + elffile) + for subsec in xattr_section.subsections: + for subsubsec in subsec.subsubsections: + for attr in subsubsec.iter_attributes(): + val = attr.value + if (not isinstance(val, str)): + continue + pos32 = val.find("rv32") + pos64 = val.find("rv64") + # MAGIC WORKAROUND + # Some version of pyelftools has issue for parsing + # Tag number = 5, it will wrongly parse it become + # Tag number = 4 + 0x10 + 0x5 + if (pos32 == 2) or (pos64 == 2): + val = val[2:] + # End of MAGIC WORKAROUND + + if (pos32 != -1 or pos64 != -1): + return val + raise Exception("Not found ELF attribute in %s?" % path) + def main(argv): opt = parse_opt(argv) if opt.selftest: selftest() return 0 - cpu_opt = conver_arch_to_qemu_cpu_opt(opt.march) + if (opt.get_elf_class): + elf_class = read_elf_class (opt.get_elf_class) + print (elf_class) + return + if (opt.get_riscv_tag): + march = read_arch_attr (opt.get_riscv_tag) + else: + march = opt.march + cpu_opt = conver_arch_to_qemu_cpu_opt(march) print (cpu_opt) if __name__ == '__main__': diff --git a/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run b/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run index 078360e..93dfccf 100755 --- a/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run +++ b/scripts/wrapper/qemu/riscv64-unknown-linux-gnu-run @@ -10,6 +10,6 @@ do shift done -xlen="$(readelf -h $1 | grep 'Class' | cut -d: -f 2 | xargs echo | sed 's/^ELF//')" +xlen="$(march-to-cpu-opt --get-elf-class $1)" -QEMU_CPU=${QEMU_CPU} qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@" +QEMU_CPU="$(march-to-cpu-opt --get-riscv-tag $1)" qemu-riscv$xlen -r 5.10 "${qemu_args[@]}" -L ${RISC_V_SYSROOT} "$@" |