aboutsummaryrefslogtreecommitdiff
path: root/gas/config/tc-nios2.c
blob: b2f0c34b716fe01a6737750643d3d2fa66db7d8c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
/* Altera Nios II assembler.
   Copyright (C) 2012-2018 Free Software Foundation, Inc.
   Contributed by Nigel Gray (ngray@altera.com).
   Contributed by Mentor Graphics, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#include "as.h"
#include "opcode/nios2.h"
#include "elf/nios2.h"
#include "tc-nios2.h"
#include "bfd.h"
#include "dwarf2dbg.h"
#include "subsegs.h"
#include "safe-ctype.h"
#include "dw2gencfi.h"

#ifndef OBJ_ELF
/* We are not supporting any other target so we throw a compile time error.  */
OBJ_ELF not defined
#endif

/* We can choose our endianness at run-time, regardless of configuration.  */
extern int target_big_endian;

/* This array holds the chars that always start a comment.  If the
   pre-processor is disabled, these aren't very useful.  */
const char comment_chars[] = "#";

/* This array holds the chars that only start a comment at the beginning of
   a line.  If the line seems to have the form '# 123 filename'
   .line and .file directives will appear in the pre-processed output.  */
/* Note that input_file.c hand checks for '#' at the beginning of the
   first line of the input file.  This is because the compiler outputs
   #NO_APP at the beginning of its output.  */
/* Also note that C style comments are always supported.  */
const char line_comment_chars[] = "#";

/* This array holds machine specific line separator characters.  */
const char line_separator_chars[] = ";";

/* Chars that can be used to separate mant from exp in floating point nums.  */
const char EXP_CHARS[] = "eE";

/* Chars that mean this number is a floating point constant.  */
/* As in 0f12.456 */
/* or	 0d1.2345e12 */
const char FLT_CHARS[] = "rRsSfFdDxXpP";

/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
   changed in read.c.  Ideally it shouldn't have to know about it at all,
   but nothing is ideal around here.  */

/* Machine-dependent command-line options.  */

const char *md_shortopts = "r";

struct option md_longopts[] = {
#define OPTION_RELAX_ALL (OPTION_MD_BASE + 0)
  {"relax-all", no_argument, NULL, OPTION_RELAX_ALL},
#define OPTION_NORELAX (OPTION_MD_BASE + 1)
  {"no-relax", no_argument, NULL, OPTION_NORELAX},
#define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2)
  {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION},
#define OPTION_EB (OPTION_MD_BASE + 3)
  {"EB", no_argument, NULL, OPTION_EB},
#define OPTION_EL (OPTION_MD_BASE + 4)
  {"EL", no_argument, NULL, OPTION_EL},
#define OPTION_MARCH (OPTION_MD_BASE + 5)
  {"march", required_argument, NULL, OPTION_MARCH}
};

size_t md_longopts_size = sizeof (md_longopts);

/* The assembler supports three different relaxation modes, controlled by
   command-line options.  */
typedef enum
{
  relax_section = 0,
  relax_none,
  relax_all
} relax_optionT;

/* Struct contains all assembler options set with .set.  */
static struct
{
  /* .set noat -> noat = 1 allows assembly code to use at without warning
     and macro expansions generate a warning.
     .set at -> noat = 0, assembly code using at warn but macro expansions
     do not generate warnings.  */
  bfd_boolean noat;

  /* .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without
				 warning.
     .set break -> nobreak = 0, assembly code using ba,bt warns.  */
  bfd_boolean nobreak;

  /* .cmd line option -relax-all allows all branches and calls to be replaced
     with longer versions.
     -no-relax inhibits branch/call conversion.
     The default value is relax_section, which relaxes branches within
     a section.  */
  relax_optionT relax;

} nios2_as_options = {FALSE, FALSE, relax_section};


typedef struct nios2_insn_reloc
{
  /* Any expression in the instruction is parsed into this field,
     which is passed to fix_new_exp() to generate a fixup.  */
  expressionS reloc_expression;

  /* The type of the relocation to be applied.  */
  bfd_reloc_code_real_type reloc_type;

  /* PC-relative.  */
  unsigned int reloc_pcrel;

  /* The next relocation to be applied to the instruction.  */
  struct nios2_insn_reloc *reloc_next;
} nios2_insn_relocS;

/* This struct is used to hold state when assembling instructions.  */
typedef struct nios2_insn_info
{
  /* Assembled instruction.  */
  unsigned long insn_code;

  /* Constant bits masked into insn_code for self-check mode.  */
  unsigned long constant_bits;

  /* Pointer to the relevant bit of the opcode table.  */
  const struct nios2_opcode *insn_nios2_opcode;
  /* After parsing ptrs to the tokens in the instruction fill this array
     it is terminated with a null pointer (hence the first +1).
     The second +1 is because in some parts of the code the opcode
     is not counted as a token, but still placed in this array.  */
  const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1];

  /* This holds information used to generate fixups
     and eventually relocations if it is not null.  */
  nios2_insn_relocS *insn_reloc;
} nios2_insn_infoS;


/* This struct is used to convert Nios II pseudo-ops into the
   corresponding real op.  */
typedef struct nios2_ps_insn_info
{
  /* Map this pseudo_op... */
  const char *pseudo_insn;

  /* ...to this real instruction.  */
  const char *insn;

  /* Call this function to modify the operands....  */
  void (*arg_modifer_func) (char ** parsed_args, const char *arg, int num,
			    int start);

  /* ...with these arguments.  */
  const char *arg_modifier;
  int num;
  int index;

  /* If arg_modifier_func allocates new memory, provide this function
     to free it afterwards.  */
  void (*arg_cleanup_func) (char **parsed_args, int num, int start);
} nios2_ps_insn_infoS;

/* Opcode hash table.  */
static struct hash_control *nios2_opcode_hash = NULL;
#define nios2_opcode_lookup(NAME) \
  ((struct nios2_opcode *) hash_find (nios2_opcode_hash, (NAME)))

/* Register hash table.  */
static struct hash_control *nios2_reg_hash = NULL;
#define nios2_reg_lookup(NAME) \
  ((struct nios2_reg *) hash_find (nios2_reg_hash, (NAME)))


/* Pseudo-op hash table.  */
static struct hash_control *nios2_ps_hash = NULL;
#define nios2_ps_lookup(NAME) \
  ((nios2_ps_insn_infoS *) hash_find (nios2_ps_hash, (NAME)))

/* The known current alignment of the current section.  */
static int nios2_current_align;
static segT nios2_current_align_seg;

static int nios2_auto_align_on = 1;

/* The last seen label in the current section.  This is used to auto-align
   labels preceding instructions.  */
static symbolS *nios2_last_label;

/* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries
   instead of 4-bytes.  Use this to keep track of the minimum power-of-2
   alignment.  */
static int nios2_min_align = 2;

#ifdef OBJ_ELF
/* Pre-defined "_GLOBAL_OFFSET_TABLE_"	*/
symbolS *GOT_symbol;
#endif

/* The processor architecture value, EF_NIOS2_ARCH_R1 by default.  */
static int nios2_architecture = EF_NIOS2_ARCH_R1;


/** Utility routines.  */
/* Function md_chars_to_number takes the sequence of
   bytes in buf and returns the corresponding value
   in an int. n must be 1, 2 or 4.  */
static valueT
md_chars_to_number (char *buf, int n)
{
  int i;
  valueT val;

  gas_assert (n == 1 || n == 2 || n == 4);

  val = 0;
  if (target_big_endian)
    for (i = 0; i < n; ++i)
      val = val | ((buf[i] & 0xff) << 8 * (n - (i + 1)));
  else
    for (i = 0; i < n; ++i)
      val = val | ((buf[i] & 0xff) << 8 * i);
  return val;
}


/* This function turns a C long int, short int or char
   into the series of bytes that represent the number
   on the target machine.  */
void
md_number_to_chars (char *buf, valueT val, int n)
{
  gas_assert (n == 1 || n == 2 || n == 4 || n == 8);
  if (target_big_endian)
    number_to_chars_bigendian (buf, val, n);
  else
    number_to_chars_littleendian (buf, val, n);
}

/* Turn a string in input_line_pointer into a floating point constant
   of type TYPE, and store the appropriate bytes in *LITP.  The number
   of LITTLENUMS emitted is stored in *SIZEP.  An error message is
   returned, or NULL on OK.  */
const char *
md_atof (int type, char *litP, int *sizeP)
{
  int prec;
  LITTLENUM_TYPE words[4];
  char *t;
  int i;

  switch (type)
    {
    case 'f':
      prec = 2;
      break;
    case 'd':
      prec = 4;
      break;
    default:
      *sizeP = 0;
      return _("bad call to md_atof");
    }

  t = atof_ieee (input_line_pointer, type, words);
  if (t)
    input_line_pointer = t;

  *sizeP = prec * 2;

  if (! target_big_endian)
    for (i = prec - 1; i >= 0; i--, litP += 2)
      md_number_to_chars (litP, (valueT) words[i], 2);
  else
    for (i = 0; i < prec; i++, litP += 2)
      md_number_to_chars (litP, (valueT) words[i], 2);

  return NULL;
}

/* Return true if STR starts with PREFIX, which should be a string literal.  */
#define strprefix(STR, PREFIX) \
  (strncmp ((STR), PREFIX, strlen (PREFIX)) == 0)


/* Return true if STR is prefixed with a special relocation operator.  */
static int
nios2_special_relocation_p (const char *str)
{
  return (strprefix (str, "%lo")
	  || strprefix (str, "%hi")
	  || strprefix (str, "%hiadj")
	  || strprefix (str, "%gprel")
	  || strprefix (str, "%got")
	  || strprefix (str, "%call")
	  || strprefix (str, "%gotoff_lo")
	  || strprefix (str, "%gotoff_hiadj")
	  || strprefix (str, "%tls_gd")
	  || strprefix (str, "%tls_ldm")
	  || strprefix (str, "%tls_ldo")
	  || strprefix (str, "%tls_ie")
	  || strprefix (str, "%tls_le")
	  || strprefix (str, "%gotoff"));
}


/* nop fill patterns for text section.  */
static char const nop_r1[4] = { 0x3a, 0x88, 0x01, 0x00 };
static char const nop_r2[4] = { 0x20, 0x00, 0x00, 0xc4 };
static char const nop_r2_cdx[2] = { 0x3b, 0x00 };
static char const *nop32 = nop_r1;
static char const *nop16 = NULL;

/* Handles all machine-dependent alignment needs.  */
static void
nios2_align (int log_size, const char *pfill, symbolS *label)
{
  int align;
  long max_alignment = 15;

  /* The front end is prone to changing segments out from under us
     temporarily when -g is in effect.  */
  int switched_seg_p = (nios2_current_align_seg != now_seg);

  align = log_size;
  if (align > max_alignment)
    {
      align = max_alignment;
      as_bad (_("Alignment too large: %d. assumed"), align);
    }
  else if (align < 0)
    {
      as_warn (_("Alignment negative: 0 assumed"));
      align = 0;
    }

  if (align != 0)
    {
      if (subseg_text_p (now_seg) && align >= nios2_min_align)
	{
	  /* First, make sure we're on the minimum boundary, in case
	     someone has been putting .byte values the text section.  */
	  if (nios2_current_align < nios2_min_align || switched_seg_p)
	    frag_align (nios2_min_align, 0, 0);

	  /* If we might be on a 2-byte boundary, first align to a
	     4-byte boundary using the 2-byte nop as fill.  */
	  if (nios2_min_align == 1
	      && align > nios2_min_align
	      && pfill == nop32 )
	    {
	      gas_assert (nop16);
	      frag_align_pattern (2, nop16, 2, 0);
	    }

	  /* Now fill in the alignment pattern.  */
	  if (pfill != NULL)
	    frag_align_pattern (align, pfill, 4, 0);
	  else
	    frag_align (align, 0, 0);
	}
      else
	frag_align (align, 0, 0);

      if (!switched_seg_p)
	nios2_current_align = align;

      /* If the last label was in a different section we can't align it.  */
      if (label != NULL && !switched_seg_p)
	{
	  symbolS *sym;
	  int label_seen = FALSE;
	  struct frag *old_frag;
	  valueT old_value;
	  valueT new_value;

	  gas_assert (S_GET_SEGMENT (label) == now_seg);

	  old_frag = symbol_get_frag (label);
	  old_value = S_GET_VALUE (label);
	  new_value = (valueT) frag_now_fix ();

	  /* It is possible to have more than one label at a particular
	     address, especially if debugging is enabled, so we must
	     take care to adjust all the labels at this address in this
	     fragment.  To save time we search from the end of the symbol
	     list, backwards, since the symbols we are interested in are
	     almost certainly the ones that were most recently added.
	     Also to save time we stop searching once we have seen at least
	     one matching label, and we encounter a label that is no longer
	     in the target fragment.  Note, this search is guaranteed to
	     find at least one match when sym == label, so no special case
	     code is necessary.  */
	  for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
	    if (symbol_get_frag (sym) == old_frag
		&& S_GET_VALUE (sym) == old_value)
	      {
		label_seen = TRUE;
		symbol_set_frag (sym, frag_now);
		S_SET_VALUE (sym, new_value);
	      }
	    else if (label_seen && symbol_get_frag (sym) != old_frag)
	      break;
	}
      record_alignment (now_seg, align);
    }
}


/** Support for self-check mode.  */

/* Mode of the assembler.  */
typedef enum
{
  NIOS2_MODE_ASSEMBLE,		/* Ordinary operation.  */
  NIOS2_MODE_TEST		/* Hidden mode used for self testing.  */
} NIOS2_MODE;

static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE;

/* This function is used to in self-checking mode
   to check the assembled instruction
   opcode should be the assembled opcode, and exp_opcode
   the parsed string representing the expected opcode.  */
static void
nios2_check_assembly (unsigned int opcode, const char *exp_opcode)
{
  if (nios2_mode == NIOS2_MODE_TEST)
    {
      if (exp_opcode == NULL)
	as_bad (_("expecting opcode string in self test mode"));
      else if (opcode != strtoul (exp_opcode, NULL, 16))
	as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode);
    }
}


/** Support for machine-dependent assembler directives.  */
/* Handle the .align pseudo-op.  This aligns to a power of two.  It
   also adjusts any current instruction label.  We treat this the same
   way the MIPS port does: .align 0 turns off auto alignment.  */
static void
s_nios2_align (int ignore ATTRIBUTE_UNUSED)
{
  int align;
  char fill;
  const char *pfill = NULL;
  long max_alignment = 15;

  align = get_absolute_expression ();
  if (align > max_alignment)
    {
      align = max_alignment;
      as_bad (_("Alignment too large: %d. assumed"), align);
    }
  else if (align < 0)
    {
      as_warn (_("Alignment negative: 0 assumed"));
      align = 0;
    }

  if (*input_line_pointer == ',')
    {
      input_line_pointer++;
      fill = get_absolute_expression ();
      pfill = (const char *) &fill;
    }
  else if (subseg_text_p (now_seg))
    pfill = (const char *) nop32;
  else
    {
      pfill = NULL;
      nios2_last_label = NULL;
    }

  if (align != 0)
    {
      nios2_auto_align_on = 1;
      nios2_align (align, pfill, nios2_last_label);
      nios2_last_label = NULL;
    }
  else
    nios2_auto_align_on = 0;

  demand_empty_rest_of_line ();
}

/* Handle the .text pseudo-op.  This is like the usual one, but it
   clears the saved last label and resets known alignment.  */
static void
s_nios2_text (int i)
{
  s_text (i);
  nios2_last_label = NULL;
  nios2_current_align = 0;
  nios2_current_align_seg = now_seg;
}

/* Handle the .data pseudo-op.  This is like the usual one, but it
   clears the saved last label and resets known alignment.  */
static void
s_nios2_data (int i)
{
  s_data (i);
  nios2_last_label = NULL;
  nios2_current_align = 0;
  nios2_current_align_seg = now_seg;
}

/* Handle the .section pseudo-op.  This is like the usual one, but it
   clears the saved last label and resets known alignment.  */
static void
s_nios2_section (int ignore)
{
  obj_elf_section (ignore);
  nios2_last_label = NULL;
  nios2_current_align = 0;
  nios2_current_align_seg = now_seg;
}

/* Explicitly unaligned cons.  */
static void
s_nios2_ucons (int nbytes)
{
  int hold;
  hold = nios2_auto_align_on;
  nios2_auto_align_on = 0;
  cons (nbytes);
  nios2_auto_align_on = hold;
}

/* Handle the .sdata directive.  */
static void
s_nios2_sdata (int ignore ATTRIBUTE_UNUSED)
{
  get_absolute_expression ();  /* Ignored.  */
  subseg_new (".sdata", 0);
  demand_empty_rest_of_line ();
}

/* .set sets assembler options eg noat/at and is also used
   to set symbol values (.equ, .equiv ).  */
static void
s_nios2_set (int equiv)
{
  char *save = input_line_pointer;
  char *directive;
  char delim = get_symbol_name (&directive);
  char *endline = input_line_pointer;

  (void) restore_line_pointer (delim);

  /* We only want to handle ".set XXX" if the
     user has tried ".set XXX, YYY" they are not
     trying a directive.  This prevents
     us from polluting the name space.  */
  SKIP_WHITESPACE ();
  if (is_end_of_line[(unsigned char) *input_line_pointer])
    {
      bfd_boolean done = TRUE;
      *endline = 0;

      if (!strcmp (directive, "noat"))
	  nios2_as_options.noat = TRUE;
      else if (!strcmp (directive, "at"))
	  nios2_as_options.noat = FALSE;
      else if (!strcmp (directive, "nobreak"))
	  nios2_as_options.nobreak = TRUE;
      else if (!strcmp (directive, "break"))
	  nios2_as_options.nobreak = FALSE;
      else if (!strcmp (directive, "norelax"))
	  nios2_as_options.relax = relax_none;
      else if (!strcmp (directive, "relaxsection"))
	  nios2_as_options.relax = relax_section;
      else if (!strcmp (directive, "relaxall"))
	  nios2_as_options.relax = relax_all;
      else
	done = FALSE;

      if (done)
	{
	  *endline = delim;
	  demand_empty_rest_of_line ();
	  return;
	}
    }

  /* If we fall through to here, either we have ".set XXX, YYY"
     or we have ".set XXX" where XXX is unknown or we have
     a syntax error.  */
  input_line_pointer = save;
  s_set (equiv);
}

/* Machine-dependent assembler directives.
   Format of each entry is:
   { "directive", handler_func, param }	 */
const pseudo_typeS md_pseudo_table[] = {
  {"align", s_nios2_align, 0},
  {"text", s_nios2_text, 0},
  {"data", s_nios2_data, 0},
  {"section", s_nios2_section, 0},
  {"section.s", s_nios2_section, 0},
  {"sect", s_nios2_section, 0},
  {"sect.s", s_nios2_section, 0},
  /* .dword and .half are included for compatibility with MIPS.  */
  {"dword", cons, 8},
  {"half", cons, 2},
  /* NIOS2 native word size is 4 bytes, so we override
     the GAS default of 2.  */
  {"word", cons, 4},
  /* Explicitly unaligned directives.  */
  {"2byte", s_nios2_ucons, 2},
  {"4byte", s_nios2_ucons, 4},
  {"8byte", s_nios2_ucons, 8},
  {"16byte", s_nios2_ucons, 16},
#ifdef OBJ_ELF
  {"sdata", s_nios2_sdata, 0},
#endif
  {"set", s_nios2_set, 0},
  {NULL, NULL, 0}
};


/** Relaxation support. */

/* We support two relaxation modes:  a limited PC-relative mode with
   -relax-section (the default), and an absolute jump mode with -relax-all.

   Nios II PC-relative branch instructions only support 16-bit offsets.
   And, there's no good way to add a 32-bit constant to the PC without
   using two registers.

   To deal with this, for the pc-relative relaxation mode we convert
     br label
   into a series of 16-bit adds, like:
     nextpc at
     addi at, at, 32767
     ...
     addi at, at, remainder
     jmp at

   Similarly, conditional branches are converted from
     b(condition) r, s, label
   into a series like:
     b(opposite condition) r, s, skip
     nextpc at
     addi at, at, 32767
     ...
     addi at, at, remainder
     jmp at
     skip:

   The compiler can do a better job, either by converting the branch
   directly into a JMP (going through the GOT for PIC) or by allocating
   a second register for the 32-bit displacement.

   For the -relax-all relaxation mode, the conversions are
     movhi at, %hi(symbol+offset)
     ori at, %lo(symbol+offset)
     jmp at
   and
     b(opposite condition), r, s, skip
     movhi at, %hi(symbol+offset)
     ori at, %lo(symbol+offset)
     jmp at
     skip:
   respectively.

   16-bit CDX branch instructions are relaxed first into equivalent
   32-bit branches and then the above transformations are applied
   if necessary.

*/

/* Arbitrarily limit the number of addis we can insert; we need to be able
   to specify the maximum growth size for each frag that contains a
   relaxable branch.  There's no point in specifying a huge number here
   since that means the assembler needs to allocate that much extra
   memory for every branch, and almost no real code will ever need it.
   Plus, as already noted a better solution is to just use a jmp, or
   allocate a second register to hold a 32-bit displacement.
   FIXME:  Rather than making this a constant, it could be controlled by
   a command-line argument.  */
#define RELAX_MAX_ADDI 32

/* The fr_subtype field represents the target-specific relocation state.
   It has type relax_substateT (unsigned int).  We use it to track the
   number of addis necessary, plus a bit to track whether this is a
   conditional branch and a bit for 16-bit CDX instructions.
   Regardless of the smaller RELAX_MAX_ADDI limit, we reserve 16 bits
   in the fr_subtype to encode the number of addis so that the whole
   theoretically-valid range is representable.
   For the -relax-all mode, N = 0 represents an in-range branch and N = 1
   represents a branch that needs to be relaxed.  */
#define UBRANCH (0 << 16)
#define CBRANCH (1 << 16)
#define CDXBRANCH (1 << 17)
#define IS_CBRANCH(SUBTYPE) ((SUBTYPE) & CBRANCH)
#define IS_UBRANCH(SUBTYPE) (!IS_CBRANCH (SUBTYPE))
#define IS_CDXBRANCH(SUBTYPE) ((SUBTYPE) & CDXBRANCH)
#define UBRANCH_SUBTYPE(N) (UBRANCH | (N))
#define CBRANCH_SUBTYPE(N) (CBRANCH | (N))
#define CDX_UBRANCH_SUBTYPE(N) (CDXBRANCH | UBRANCH | (N))
#define CDX_CBRANCH_SUBTYPE(N) (CDXBRANCH | CBRANCH | (N))
#define SUBTYPE_ADDIS(SUBTYPE) ((SUBTYPE) & 0xffff)

/* For the -relax-section mode, unconditional branches require 2 extra
   instructions besides the addis, conditional branches require 3.  */
#define UBRANCH_ADDIS_TO_SIZE(N) (((N) + 2) * 4)
#define CBRANCH_ADDIS_TO_SIZE(N) (((N) + 3) * 4)

/* For the -relax-all mode, unconditional branches require 3 instructions
   and conditional branches require 4.  */
#define UBRANCH_JUMP_SIZE 12
#define CBRANCH_JUMP_SIZE 16

/* Maximum sizes of relaxation sequences.  */
#define UBRANCH_MAX_SIZE \
  (nios2_as_options.relax == relax_all		\
   ? UBRANCH_JUMP_SIZE				\
   : UBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))
#define CBRANCH_MAX_SIZE \
  (nios2_as_options.relax == relax_all		\
   ? CBRANCH_JUMP_SIZE				\
   : CBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))

/* Register number of AT, the assembler temporary.  */
#define AT_REGNUM 1

/* Determine how many bytes are required to represent the sequence
   indicated by SUBTYPE.  */
static int
nios2_relax_subtype_size (relax_substateT subtype)
{
  int n = SUBTYPE_ADDIS (subtype);
  if (n == 0)
    /* Regular conditional/unconditional branch instruction.  */
    return (IS_CDXBRANCH (subtype) ? 2 : 4);
  else if (nios2_as_options.relax == relax_all)
    return (IS_CBRANCH (subtype) ? CBRANCH_JUMP_SIZE : UBRANCH_JUMP_SIZE);
  else if (IS_CBRANCH (subtype))
    return CBRANCH_ADDIS_TO_SIZE (n);
  else
    return UBRANCH_ADDIS_TO_SIZE (n);
}

/* Estimate size of fragp before relaxation.
   This could also examine the offset in fragp and adjust
   fragp->fr_subtype, but we will do that in nios2_relax_frag anyway.  */
int
md_estimate_size_before_relax (fragS *fragp, segT segment ATTRIBUTE_UNUSED)
{
  return nios2_relax_subtype_size (fragp->fr_subtype);
}

/* Implement md_relax_frag, returning the change in size of the frag.  */
long
nios2_relax_frag (segT segment, fragS *fragp, long stretch)
{
  addressT target = fragp->fr_offset;
  relax_substateT subtype = fragp->fr_subtype;
  symbolS *symbolp = fragp->fr_symbol;

  if (symbolp)
    {
      fragS *sym_frag = symbol_get_frag (symbolp);
      offsetT offset;
      int n;
      bfd_boolean is_cdx = FALSE;

      target += S_GET_VALUE (symbolp);

      /* See comments in write.c:relax_frag about handling of stretch.  */
      if (stretch != 0
	  && sym_frag->relax_marker != fragp->relax_marker)
	{
	  if (stretch < 0 || sym_frag->region == fragp->region)
	    target += stretch;
	  else if (target < fragp->fr_address)
	    target = fragp->fr_next->fr_address + stretch;
	}

      /* We subtract fr_var (4 for 32-bit insns) because all pc relative
	 branches are from the next instruction.  */
      offset = target - fragp->fr_address - fragp->fr_fix - fragp->fr_var;
      if (IS_CDXBRANCH (subtype) && IS_UBRANCH (subtype)
	  && offset >= -1024 && offset < 1024)
	/* PC-relative CDX branch with 11-bit offset.  */
	is_cdx = TRUE;
      else if (IS_CDXBRANCH (subtype) && IS_CBRANCH (subtype)
	       && offset >= -128 && offset < 128)
	/* PC-relative CDX branch with 8-bit offset.  */
	is_cdx = TRUE;
      else if (offset >= -32768 && offset < 32768)
	/* Fits in PC-relative branch.  */
	n = 0;
      else if (nios2_as_options.relax == relax_all)
	/* Convert to jump.  */
	n = 1;
      else if (nios2_as_options.relax == relax_section
	       && S_GET_SEGMENT (symbolp) == segment
	       && S_IS_DEFINED (symbolp))
	/* Attempt a PC-relative relaxation on a branch to a defined
	   symbol in the same segment.  */
	{
	  /* The relaxation for conditional branches is offset by 4
	     bytes because we insert the inverted branch around the
	     sequence.  */
	  if (IS_CBRANCH (subtype))
	    offset = offset - 4;
	  if (offset > 0)
	    n = offset / 32767 + 1;
	  else
	    n = offset / -32768 + 1;

	  /* Bail out immediately if relaxation has failed.  If we try to
	     defer the diagnostic to md_convert_frag, some pathological test
	     cases (e.g. gcc/testsuite/gcc.c-torture/compile/20001226-1.c)
	     apparently never converge.  By returning 0 here we could pretend
	     to the caller that nothing has changed, but that leaves things
	     in an inconsistent state when we get to md_convert_frag.  */
	  if (n > RELAX_MAX_ADDI)
	    {
	      as_bad_where (fragp->fr_file, fragp->fr_line,
			    _("branch offset out of range\n"));
	      as_fatal (_("branch relaxation failed\n"));
	    }
	}
      else
	/* We cannot handle this case, diagnose overflow later.  */
	return 0;

      if (is_cdx)
	fragp->fr_subtype = subtype;
      else if (IS_CBRANCH (subtype))
	fragp->fr_subtype = CBRANCH_SUBTYPE (n);
      else
	fragp->fr_subtype = UBRANCH_SUBTYPE (n);

      return (nios2_relax_subtype_size (fragp->fr_subtype)
	      - nios2_relax_subtype_size (subtype));
    }

  /* If we got here, it's probably an error.  */
  return 0;
}


/* Complete fragp using the data from the relaxation pass. */
void
md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED,
		 fragS *fragp)
{
  char *buffer = fragp->fr_literal + fragp->fr_fix;
  relax_substateT subtype = fragp->fr_subtype;
  int n = SUBTYPE_ADDIS (subtype);
  addressT target = fragp->fr_offset;
  symbolS *symbolp = fragp->fr_symbol;
  offsetT offset;
  unsigned int addend_mask, addi_mask, op;
  offsetT addend, remainder;
  int i;
  bfd_boolean is_r2 = (bfd_get_mach (stdoutput) == bfd_mach_nios2r2);

  /* If this is a CDX branch we're not relaxing, just generate the fixup.  */
  if (IS_CDXBRANCH (subtype))
    {
      gas_assert (is_r2);
      fix_new (fragp, fragp->fr_fix, 2, fragp->fr_symbol,
	       fragp->fr_offset, 1,
	       (IS_UBRANCH (subtype)
		? BFD_RELOC_NIOS2_R2_I10_1_PCREL
		: BFD_RELOC_NIOS2_R2_T1I7_1_PCREL));
      fragp->fr_fix += 2;
      return;
    }

  /* If this is a CDX branch we are relaxing, turn it into an equivalent
     32-bit branch and then fall through to the normal non-CDX cases.  */
  if (fragp->fr_var == 2)
    {
      unsigned int opcode = md_chars_to_number (buffer, 2);
      gas_assert (is_r2);
      if (IS_CBRANCH (subtype))
	{
	  unsigned int reg = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (opcode)];
	  if (GET_IW_R2_OP (opcode) == R2_OP_BNEZ_N)
	    opcode = MATCH_R2_BNE | SET_IW_F2I16_A (reg);
	  else
	    opcode = MATCH_R2_BEQ | SET_IW_F2I16_A (reg);
	}
      else
	opcode = MATCH_R2_BR;
      md_number_to_chars (buffer, opcode, 4);
      fragp->fr_var = 4;
    }

  /* If we didn't or can't relax, this is a regular branch instruction.
     We just need to generate the fixup for the symbol and offset.  */
  if (n == 0)
    {
      fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol,
	       fragp->fr_offset, 1, BFD_RELOC_16_PCREL);
      fragp->fr_fix += 4;
      return;
    }

  /* Replace the cbranch at fr_fix with one that has the opposite condition
     in order to jump around the block of instructions we'll be adding.  */
  if (IS_CBRANCH (subtype))
    {
      unsigned int br_opcode;
      unsigned int old_op, new_op;
      int nbytes;

      /* Account for the nextpc and jmp in the pc-relative case, or the two
	 load instructions and jump in the absolute case.  */
      if (nios2_as_options.relax == relax_section)
	nbytes = (n + 2) * 4;
      else
	nbytes = 12;

      br_opcode = md_chars_to_number (buffer, 4);
      if (is_r2)
	{
	  old_op = GET_IW_R2_OP (br_opcode);
	  switch (old_op)
	    {
	    case R2_OP_BEQ:
	      new_op = R2_OP_BNE;
	      break;
	    case R2_OP_BNE:
	      new_op = R2_OP_BEQ;
	      break;
	    case R2_OP_BGE:
	      new_op = R2_OP_BLT;
	      break;
	    case R2_OP_BGEU:
	      new_op = R2_OP_BLTU;
	      break;
	    case R2_OP_BLT:
	      new_op = R2_OP_BGE;
	      break;
	    case R2_OP_BLTU:
	      new_op = R2_OP_BGEU;
	      break;
	    default:
	      abort ();
	    }
	  br_opcode = ((br_opcode & ~IW_R2_OP_SHIFTED_MASK)
		       | SET_IW_R2_OP (new_op));
	  br_opcode = br_opcode | SET_IW_F2I16_IMM16 (nbytes);
	}
      else
	{
	  old_op = GET_IW_R1_OP (br_opcode);
	  switch (old_op)
	    {
	    case R1_OP_BEQ:
	      new_op = R1_OP_BNE;
	      break;
	    case R1_OP_BNE:
	      new_op = R1_OP_BEQ;
	      break;
	    case R1_OP_BGE:
	      new_op = R1_OP_BLT;
	      break;
	    case R1_OP_BGEU:
	      new_op = R1_OP_BLTU;
	      break;
	    case R1_OP_BLT:
	      new_op = R1_OP_BGE;
	      break;
	    case R1_OP_BLTU:
	      new_op = R1_OP_BGEU;
	      break;
	    default:
	      abort ();
	    }
	  br_opcode = ((br_opcode & ~IW_R1_OP_SHIFTED_MASK)
		       | SET_IW_R1_OP (new_op));
	  br_opcode = br_opcode | SET_IW_I_IMM16 (nbytes);
	}
      md_number_to_chars (buffer, br_opcode, 4);
      fragp->fr_fix += 4;
      buffer += 4;
    }

  /* Load at for the PC-relative case.  */
  if (nios2_as_options.relax == relax_section)
    {
      /* Insert the nextpc instruction.  */
      if (is_r2)
	op = MATCH_R2_NEXTPC | SET_IW_F3X6L5_C (AT_REGNUM);
      else
	op = MATCH_R1_NEXTPC | SET_IW_R_C (AT_REGNUM);
      md_number_to_chars (buffer, op, 4);
      fragp->fr_fix += 4;
      buffer += 4;

      /* We need to know whether the offset is positive or negative.  */
      target += S_GET_VALUE (symbolp);
      offset = target - fragp->fr_address - fragp->fr_fix;
      if (offset > 0)
	addend = 32767;
      else
	addend = -32768;
      if (is_r2)
	addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)addend);
      else
	addend_mask = SET_IW_I_IMM16 ((unsigned int)addend);

      /* Insert n-1 addi instructions.  */
      if (is_r2)
	addi_mask = (MATCH_R2_ADDI
		     | SET_IW_F2I16_B (AT_REGNUM)
		     | SET_IW_F2I16_A (AT_REGNUM));
      else
	addi_mask = (MATCH_R1_ADDI
		     | SET_IW_I_B (AT_REGNUM)
		     | SET_IW_I_A (AT_REGNUM));
      for (i = 0; i < n - 1; i ++)
	{
	  md_number_to_chars (buffer, addi_mask | addend_mask, 4);
	  fragp->fr_fix += 4;
	  buffer += 4;
	}

      /* Insert the last addi instruction to hold the remainder.  */
      remainder = offset - addend * (n - 1);
      gas_assert (remainder >= -32768 && remainder <= 32767);
      if (is_r2)
	addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)remainder);
      else
	addend_mask = SET_IW_I_IMM16 ((unsigned int)remainder);
      md_number_to_chars (buffer, addi_mask | addend_mask, 4);
      fragp->fr_fix += 4;
      buffer += 4;
    }

  /* Load at for the absolute case.  */
  else
    {
      if (is_r2)
	op = MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) | SET_IW_F2I16_A (0);
      else
	op = MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) | SET_IW_I_A (0);
      md_number_to_chars (buffer, op, 4);
      fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
	       0, BFD_RELOC_NIOS2_HI16);
      fragp->fr_fix += 4;
      buffer += 4;
      if (is_r2)
	op = (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
	      | SET_IW_F2I16_A (AT_REGNUM));
      else
	op = (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
	      | SET_IW_I_A (AT_REGNUM));
      md_number_to_chars (buffer, op, 4);
      fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
	       0, BFD_RELOC_NIOS2_LO16);
      fragp->fr_fix += 4;
      buffer += 4;
    }

  /* Insert the jmp instruction.  */
  if (is_r2)
    op = MATCH_R2_JMP | SET_IW_F3X6L5_A (AT_REGNUM);
  else
    op = MATCH_R1_JMP | SET_IW_R_A (AT_REGNUM);
  md_number_to_chars (buffer, op, 4);
  fragp->fr_fix += 4;
  buffer += 4;
}


/** Fixups and overflow checking.  */

/* Check a fixup for overflow. */
static bfd_boolean
nios2_check_overflow (valueT fixup, reloc_howto_type *howto)
{
  /* If there is a rightshift, check that the low-order bits are
     zero before applying it.  */
  if (howto->rightshift)
    {
      if ((~(~((valueT) 0) << howto->rightshift) & fixup)
	  && howto->complain_on_overflow != complain_overflow_dont)
	return TRUE;
      fixup = ((signed)fixup) >> howto->rightshift;
    }

  /* Check for overflow - return TRUE if overflow, FALSE if not.  */
  switch (howto->complain_on_overflow)
    {
    case complain_overflow_dont:
      break;
    case complain_overflow_bitfield:
      if ((fixup >> howto->bitsize) != 0
	  && ((signed) fixup >> howto->bitsize) != -1)
	return TRUE;
      break;
    case complain_overflow_signed:
      if ((fixup & 0x80000000) > 0)
	{
	  /* Check for negative overflow.  */
	  if ((signed) fixup < (signed) (~0U << (howto->bitsize - 1)))
	    return TRUE;
	}
      else
	{
	  /* Check for positive overflow.  */
	  if (fixup >= ((unsigned) 1 << (howto->bitsize - 1)))
	    return TRUE;
	}
      break;
    case complain_overflow_unsigned:
      if ((fixup >> howto->bitsize) != 0)
	return TRUE;
      break;
    default:
      as_bad (_("error checking for overflow - broken assembler"));
      break;
    }
  return FALSE;
}

/* Emit diagnostic for fixup overflow.  */
static void
nios2_diagnose_overflow (valueT fixup, reloc_howto_type *howto,
			 fixS *fixP, valueT value)
{
  if (fixP->fx_r_type == BFD_RELOC_8
      || fixP->fx_r_type == BFD_RELOC_16
      || fixP->fx_r_type == BFD_RELOC_32)
    /* These relocs are against data, not instructions.  */
    as_bad_where (fixP->fx_file, fixP->fx_line,
		  _("immediate value 0x%x truncated to 0x%x"),
		  (unsigned int) fixup,
		  (unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup));
  else
    {
      /* What opcode is the instruction?  This will determine
	 whether we check for overflow in immediate values
	 and what error message we get.  */
      const struct nios2_opcode *opcode;
      enum overflow_type overflow_msg_type;
      unsigned int range_min;
      unsigned int range_max;
      unsigned int address;

      opcode = nios2_find_opcode_hash (value, bfd_get_mach (stdoutput));
      gas_assert (opcode);
      gas_assert (fixP->fx_size == opcode->size);
      overflow_msg_type = opcode->overflow_msg;
      switch (overflow_msg_type)
	{
	case call_target_overflow:
	  range_min
	    = ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000);
	  range_max = range_min + 0x0fffffff;
	  address = fixup | range_min;

	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("call target address 0x%08x out of range 0x%08x to 0x%08x"),
			address, range_min, range_max);
	  break;
	case branch_target_overflow:
	  if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
	    as_bad_where (fixP->fx_file, fixP->fx_line,
			  _("branch offset %d out of range %d to %d"),
			  (int)fixup, -32768, 32767);
	  else
	    as_bad_where (fixP->fx_file, fixP->fx_line,
			  _("branch offset %d out of range"),
			  (int)fixup);
	  break;
	case address_offset_overflow:
	  if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
	    as_bad_where (fixP->fx_file, fixP->fx_line,
			  _("%s offset %d out of range %d to %d"),
			  opcode->name, (int)fixup, -32768, 32767);
	  else
	    as_bad_where (fixP->fx_file, fixP->fx_line,
			  _("%s offset %d out of range"),
			  opcode->name, (int)fixup);
	  break;
	case signed_immed16_overflow:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("immediate value %d out of range %d to %d"),
			(int)fixup, -32768, 32767);
	  break;
	case unsigned_immed16_overflow:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("immediate value %u out of range %u to %u"),
			(unsigned int)fixup, 0, 65535);
	  break;
	case unsigned_immed5_overflow:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("immediate value %u out of range %u to %u"),
			(unsigned int)fixup, 0, 31);
	  break;
	case signed_immed12_overflow:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("immediate value %d out of range %d to %d"),
			(int)fixup, -2048, 2047);
	  break;
	case custom_opcode_overflow:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("custom instruction opcode %u out of range %u to %u"),
			(unsigned int)fixup, 0, 255);
	  break;
	default:
	  as_bad_where (fixP->fx_file, fixP->fx_line,
			_("overflow in immediate argument"));
	  break;
	}
    }
}

/* Apply a fixup to the object file.  */
void
md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
{
  /* Assert that the fixup is one we can handle.  */
  gas_assert (fixP != NULL && valP != NULL
	      && (fixP->fx_r_type == BFD_RELOC_8
		  || fixP->fx_r_type == BFD_RELOC_16
		  || fixP->fx_r_type == BFD_RELOC_32
		  || fixP->fx_r_type == BFD_RELOC_64
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_S16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_U16
		  || fixP->fx_r_type == BFD_RELOC_16_PCREL
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_HI16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_LO16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL
		  || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
		  || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26_NOAT
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_S12
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_I10_1_PCREL
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_2
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_1
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_2
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X1I7_2
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X2L5
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_F1I5_2
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_L5I4X1
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6
		  || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6_2
		  /* Add other relocs here as we generate them.  */
		  ));

  if (fixP->fx_r_type == BFD_RELOC_64)
    {
      /* We may reach here due to .8byte directives, but we never output
	 BFD_RELOC_64; it must be resolved.  */
      if (fixP->fx_addsy != NULL)
	as_bad_where (fixP->fx_file, fixP->fx_line,
		      _("cannot create 64-bit relocation"));
      else
	{
	  md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
			      *valP, 8);
	  fixP->fx_done = 1;
	}
      return;
    }

  /* The value passed in valP can be the value of a fully
     resolved expression, or it can be the value of a partially
     resolved expression.  In the former case, both fixP->fx_addsy
     and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and
     we can fix up the instruction that fixP relates to.
     In the latter case, one or both of fixP->fx_addsy and
     fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not
     equal *valP.  We don't need to check for fixP->fx_subsy being null
     because the generic part of the assembler generates an error if
     it is not an absolute symbol.  */
  if (fixP->fx_addsy != NULL)
    /* Partially resolved expression.  */
    {
      fixP->fx_addnumber = fixP->fx_offset;
      fixP->fx_done = 0;

      switch (fixP->fx_r_type)
	{
	case BFD_RELOC_NIOS2_TLS_GD16:
	case BFD_RELOC_NIOS2_TLS_LDM16:
	case BFD_RELOC_NIOS2_TLS_LDO16:
	case BFD_RELOC_NIOS2_TLS_IE16:
	case BFD_RELOC_NIOS2_TLS_LE16:
	case BFD_RELOC_NIOS2_TLS_DTPMOD:
	case BFD_RELOC_NIOS2_TLS_DTPREL:
	case BFD_RELOC_NIOS2_TLS_TPREL:
	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
	  break;
	default:
	  break;
	}
    }
  else
    /* Fully resolved fixup.  */
    {
      reloc_howto_type *howto
	= bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);

      if (howto == NULL)
	as_bad_where (fixP->fx_file, fixP->fx_line,
		      _("relocation is not supported"));
      else
	{
	  valueT fixup = *valP;
	  valueT value;
	  char *buf;

	  /* If this is a pc-relative relocation, we need to
	     subtract the current offset within the object file
	     FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be
	     so I'm using the howto structure instead to determine this.  */
	  if (howto->pc_relative == 1)
	    {
	      fixup = (fixup - (fixP->fx_frag->fr_address + fixP->fx_where
				+ fixP->fx_size));
	      *valP = fixup;
	    }

	  /* Get the instruction or data to be fixed up.  */
	  buf = fixP->fx_frag->fr_literal + fixP->fx_where;
	  value = md_chars_to_number (buf, fixP->fx_size);

	  /* Check for overflow, emitting a diagnostic if necessary.  */
	  if (nios2_check_overflow (fixup, howto))
	    nios2_diagnose_overflow (fixup, howto, fixP, value);

	  /* Apply the right shift.  */
	  fixup = ((signed)fixup) >> howto->rightshift;

	  /* Truncate the fixup to right size.  */
	  switch (fixP->fx_r_type)
	    {
	    case BFD_RELOC_NIOS2_HI16:
	      fixup = (fixup >> 16) & 0xFFFF;
	      break;
	    case BFD_RELOC_NIOS2_LO16:
	      fixup = fixup & 0xFFFF;
	      break;
	    case BFD_RELOC_NIOS2_HIADJ16:
	      fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01))
		       & 0xFFFF);
	      break;
	    default:
	      {
		int n = sizeof (fixup) * 8 - howto->bitsize;
		fixup = (fixup << n) >> n;
		break;
	      }
	    }

	  /* Fix up the instruction.  */
	  value = (value & ~howto->dst_mask) | (fixup << howto->bitpos);
	  md_number_to_chars (buf, value, fixP->fx_size);
	}

      fixP->fx_done = 1;
    }

  if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
    {
      fixP->fx_done = 0;
      if (fixP->fx_addsy
	  && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy))
	S_SET_WEAK (fixP->fx_addsy);
    }
  else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
    fixP->fx_done = 0;
}



/** Instruction parsing support. */

/* General internal error routine.  */

static void
bad_opcode (const struct nios2_opcode *op)
{
  fprintf (stderr, _("internal error: broken opcode descriptor for `%s %s'\n"),
	   op->name, op->args);
  as_fatal (_("Broken assembler.  No assembly attempted."));
}

/* Special relocation directive strings.  */

struct nios2_special_relocS
{
  const char *string;
  bfd_reloc_code_real_type reloc_type;
};

/* This table is sorted so that prefix strings are listed after the longer
   strings that include them -- e.g., %got after %got_hiadj, etc.  */

struct nios2_special_relocS nios2_special_reloc[] = {
  {"%hiadj", BFD_RELOC_NIOS2_HIADJ16},
  {"%hi", BFD_RELOC_NIOS2_HI16},
  {"%lo", BFD_RELOC_NIOS2_LO16},
  {"%gprel", BFD_RELOC_NIOS2_GPREL},
  {"%call_lo", BFD_RELOC_NIOS2_CALL_LO},
  {"%call_hiadj", BFD_RELOC_NIOS2_CALL_HA},
  {"%call", BFD_RELOC_NIOS2_CALL16},
  {"%gotoff_lo", BFD_RELOC_NIOS2_GOTOFF_LO},
  {"%gotoff_hiadj", BFD_RELOC_NIOS2_GOTOFF_HA},
  {"%gotoff", BFD_RELOC_NIOS2_GOTOFF},
  {"%got_hiadj", BFD_RELOC_NIOS2_GOT_HA},
  {"%got_lo", BFD_RELOC_NIOS2_GOT_LO},
  {"%got", BFD_RELOC_NIOS2_GOT16},
  {"%tls_gd", BFD_RELOC_NIOS2_TLS_GD16},
  {"%tls_ldm", BFD_RELOC_NIOS2_TLS_LDM16},
  {"%tls_ldo", BFD_RELOC_NIOS2_TLS_LDO16},
  {"%tls_ie", BFD_RELOC_NIOS2_TLS_IE16},
  {"%tls_le", BFD_RELOC_NIOS2_TLS_LE16},
};

#define NIOS2_NUM_SPECIAL_RELOCS \
	(sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0]))
const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS;

/* Creates a new nios2_insn_relocS and returns a pointer to it.  */
static nios2_insn_relocS *
nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel)
{
  nios2_insn_relocS *retval;
  retval = XNEW (nios2_insn_relocS);
  if (retval == NULL)
    {
      as_bad (_("can't create relocation"));
      abort ();
    }

  /* Fill out the fields with default values.  */
  retval->reloc_next = NULL;
  retval->reloc_type = reloc_type;
  retval->reloc_pcrel = pcrel;
  return retval;
}

/* Frees up memory previously allocated by nios2_insn_reloc_new().  */
/* FIXME:  this is never called; memory leak?  */
#if 0
static void
nios2_insn_reloc_destroy (nios2_insn_relocS *reloc)
{
  gas_assert (reloc != NULL);
  free (reloc);
}
#endif

/* Look up a register name and validate it for the given regtype.
   Return the register mapping or NULL on failure.  */
static struct nios2_reg *
nios2_parse_reg (const char *token, unsigned long regtype)
{
  struct nios2_reg *reg = nios2_reg_lookup (token);

  if (reg == NULL)
    {
      as_bad (_("unknown register %s"), token);
      return NULL;
    }

  /* Matched a register, but is it the wrong type?  */
  if (!(regtype & reg->regtype))
    {
      if (regtype & REG_CONTROL)
	as_bad (_("expecting control register"));
      else if (reg->regtype & REG_CONTROL)
	as_bad (_("illegal use of control register"));
      else if (reg->regtype & REG_COPROCESSOR)
	as_bad (_("illegal use of coprocessor register"));
      else
	as_bad (_("invalid register %s"), token);
      return NULL;
    }

  /* Warn for explicit use of special registers.  */
  if (reg->regtype & REG_NORMAL)
    {
      if (!nios2_as_options.noat && reg->index == 1)
	as_warn (_("Register at (r1) can sometimes be corrupted by "
		   "assembler optimizations.\n"
		   "Use .set noat to turn off those optimizations "
		   "(and this warning)."));
      if (!nios2_as_options.nobreak && reg->index == 25)
	as_warn (_("The debugger will corrupt bt (r25).\n"
		   "If you don't need to debug this "
		   "code use .set nobreak to turn off this warning."));
      if (!nios2_as_options.nobreak && reg->index == 30)
	as_warn (_("The debugger will corrupt sstatus/ba (r30).\n"
		   "If you don't need to debug this "
		   "code use .set nobreak to turn off this warning."));
    }

  return reg;
}

/* This function parses a reglist for ldwm/stwm and push.n/pop.n
   instructions, given as a brace-enclosed register list.  The tokenizer
   has replaced commas in the token with spaces.
   The return value is a bitmask of registers in the set.  It also
   sets nios2_reglist_mask and nios2_reglist_dir to allow error checking
   when parsing the base register.  */

static unsigned long nios2_reglist_mask;
static int nios2_reglist_dir;

static unsigned long
nios2_parse_reglist (char *token, const struct nios2_opcode *op)
{
  unsigned long mask = 0;
  int dir = 0;
  unsigned long regtype = 0;
  int last = -1;
  const char *regname;

  nios2_reglist_mask = 0;
  nios2_reglist_dir = 0;

  if (op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
    {
      regtype = REG_LDWM;
      dir = 0;
    }
  else if (op->match == MATCH_R2_PUSH_N)
    {
      regtype = REG_POP;
      dir = -1;
    }
  else if (op->match == MATCH_R2_POP_N)
    {
      regtype = REG_POP;
      dir = 1;
    }
  else
    bad_opcode (op);

  for (regname = strtok (token, "{ }");
       regname;
       regname = strtok (NULL, "{ }"))
    {
      int regno;
      struct nios2_reg *reg = nios2_parse_reg (regname, regtype);

      if (!reg)
	break;
      regno = reg->index;

      /* Make sure registers are listed in proper sequence.  */
      if (last >= 0)
	{
	  if (regno == last)
	    {
	      as_bad ("duplicate register %s\n", reg->name);
	      return 0;
	    }
	  else if (dir == 0)
	    dir = (regno < last ? -1 : 1);
	  else if ((dir > 0 && regno < last)
		   || (dir < 0 && regno > last)
		   || (op->match == MATCH_R2_PUSH_N
		       && ! ((last == 31 && regno == 28)
			     || (last == 31 && regno <= 23)
			     || (last == 28 && regno <= 23)
			     || (regno < 23 && regno == last - 1)))
		   || (op->match == MATCH_R2_POP_N
		       && ! ((regno == 31 && last == 28)
			     || (regno == 31 && last <= 23)
			     || (regno == 28 && last <= 23)
			     || (last < 23 && last == regno - 1))))
	    {
	      as_bad ("invalid register order");
	      return 0;
	    }
	}

      mask |= 1 << regno;
      last = regno;
    }

  /* Check that all ldwm/stwm regs belong to the same set.  */
  if ((op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
      && (mask & 0x00003ffc) && (mask & 0x90ffc000))
    {
      as_bad ("invalid register set in reglist");
      return 0;
    }

  /* Check that push.n/pop.n regs include RA.  */
  if ((op->match == MATCH_R2_PUSH_N || op->match == MATCH_R2_POP_N)
      && ((mask & 0x80000000) == 0))
    {
      as_bad ("reglist must include ra (r31)");
      return 0;
    }

  /* Check that there is at least one register in the set.  */
  if (!mask)
    {
      as_bad ("reglist must include at least one register");
      return 0;
    }

  /* OK, reglist passed validation.  */
  nios2_reglist_mask = mask;
  nios2_reglist_dir = dir;
  return mask;
}

/* This function parses the base register and options used by the ldwm/stwm
   instructions.  Returns the base register and sets the option arguments
   accordingly.  On failure, returns NULL.  */
static struct nios2_reg *
nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret)
{
  char *regname;
  struct nios2_reg *reg;

  *direction = 0;
  *writeback = 0;
  *ret = 0;

  /* Check for --.  */
  if (strncmp (str, "--", 2) == 0)
    {
      str += 2;
      *direction -= 1;
    }

  /* Extract the base register.  */
  if (*str != '(')
    {
      as_bad ("expected '(' before base register");
      return NULL;
    }
  str++;
  regname = str;
  str = strchr (str, ')');
  if (!str)
    {
      as_bad ("expected ')' after base register");
      return NULL;
    }
  *str = '\0';
  str++;
  reg = nios2_parse_reg (regname, REG_NORMAL);
  if (reg == NULL)
    return NULL;

  /* Check for ++.  */
  if (strncmp (str, "++", 2) == 0)
    {
      str += 2;
      *direction += 1;
    }

  /* Ensure that either -- or ++ is specified, but not both.  */
  if (*direction == 0)
    {
      as_bad ("invalid base register syntax");
      return NULL;;
    }

  /* Check for options.  The tokenizer has replaced commas with spaces.  */
  while (*str)
    {
      while (*str == ' ')
	str++;
      if (strncmp (str, "writeback", 9) == 0)
	{
	  *writeback = 1;
	  str += 9;
	}
      else if (strncmp (str, "ret", 3) == 0)
	{
	  *ret = 1;
	  str += 3;
	}
      else if (*str)
	{
	  as_bad ("invalid option syntax");
	  return NULL;
	}
    }

  return reg;
}


/* The various nios2_assemble_* functions call this
   function to generate an expression from a string representing an expression.
   It then tries to evaluate the expression, and if it can, returns its value.
   If not, it creates a new nios2_insn_relocS and stores the expression and
   reloc_type for future use.  */
static unsigned long
nios2_assemble_expression (const char *exprstr,
			   nios2_insn_infoS *insn,
			   bfd_reloc_code_real_type orig_reloc_type,
			   unsigned int pcrel)
{
  nios2_insn_relocS *reloc;
  char *saved_line_ptr;
  unsigned long value = 0;
  int i;
  bfd_reloc_code_real_type reloc_type = orig_reloc_type;

  gas_assert (exprstr != NULL);
  gas_assert (insn != NULL);

  /* Check for relocation operators.
     Change the relocation type and advance the ptr to the start of
     the expression proper. */
  for (i = 0; i < nios2_num_special_relocs; i++)
    if (strstr (exprstr, nios2_special_reloc[i].string) != NULL)
      {
	reloc_type = nios2_special_reloc[i].reloc_type;
	exprstr += strlen (nios2_special_reloc[i].string) + 1;

	/* %lo and %hiadj have different meanings for PC-relative
	   expressions.  */
	if (pcrel)
	  {
	    if (reloc_type == BFD_RELOC_NIOS2_LO16)
	      reloc_type = BFD_RELOC_NIOS2_PCREL_LO;
	    if (reloc_type == BFD_RELOC_NIOS2_HIADJ16)
	      reloc_type = BFD_RELOC_NIOS2_PCREL_HA;
	  }

	break;
      }

  /* No relocation allowed; we must have a constant expression.  */
  if (orig_reloc_type == BFD_RELOC_NONE)
    {
      expressionS exp;

      /* Parse the expression string.  */
      saved_line_ptr = input_line_pointer;
      input_line_pointer = (char *) exprstr;
      expression (&exp);
      input_line_pointer = saved_line_ptr;

      /* If we don't have a constant, give an error.  */
      if (reloc_type != orig_reloc_type || exp.X_op != O_constant)
	as_bad (_("expression must be constant"));
      else
	value = exp.X_add_number;
      return (unsigned long) value;
    }

  /* We potentially have a relocation.  */
  reloc = nios2_insn_reloc_new (reloc_type, pcrel);
  reloc->reloc_next = insn->insn_reloc;
  insn->insn_reloc = reloc;

  /* Parse the expression string.  */
  saved_line_ptr = input_line_pointer;
  input_line_pointer = (char *) exprstr;
  expression (&reloc->reloc_expression);
  input_line_pointer = saved_line_ptr;

  /* This is redundant as the fixup will put this into
     the instruction, but it is included here so that
     self-test mode (-r) works.  */
  if (nios2_mode == NIOS2_MODE_TEST
      && reloc->reloc_expression.X_op == O_constant)
    value = reloc->reloc_expression.X_add_number;

  return (unsigned long) value;
}

/* Encode a 3-bit register number, giving an error if this is not possible.  */
static unsigned int
nios2_assemble_reg3 (const char *token)
{
  struct nios2_reg *reg = nios2_parse_reg (token, REG_3BIT);
  int j;

  if (reg == NULL)
    return 0;

  for (j = 0; j < nios2_num_r2_reg3_mappings; j++)
    if (nios2_r2_reg3_mappings[j] == reg->index)
      return j;

  /* Should never get here if we passed validation.  */
  as_bad (_("invalid register %s"), token);
  return 0;
}

/* Argument assemble functions.  */


/* Control register index.  */
static void
nios2_assemble_arg_c (const char *token, nios2_insn_infoS *insn)
{
  struct nios2_reg *reg = nios2_parse_reg (token, REG_CONTROL);
  const struct nios2_opcode *op = insn->insn_nios2_opcode;

  if (reg == NULL)
    return;

  switch (op->format)
    {
    case iw_r_type:
      insn->insn_code |= SET_IW_R_IMM5 (reg->index);
      break;
    case iw_F3X6L5_type:
      insn->insn_code |= SET_IW_F3X6L5_IMM5 (reg->index);
      break;
    default:
      bad_opcode (op);
    }
}

/* Destination register.  */
static void
nios2_assemble_arg_d (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned long regtype = REG_NORMAL;
  struct nios2_reg *reg;

  if (op->format == iw_custom_type || op->format == iw_F3X8_type)
    regtype |= REG_COPROCESSOR;
  reg = nios2_parse_reg (token, regtype);
  if (reg == NULL)
    return;

  switch (op->format)
    {
    case iw_r_type:
      insn->insn_code |= SET_IW_R_C (reg->index);
      break;
    case iw_custom_type:
      insn->insn_code |= SET_IW_CUSTOM_C (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_CUSTOM_READC (0);
      else
	insn->insn_code |= SET_IW_CUSTOM_READC (1);
      break;
    case iw_F3X6L5_type:
    case iw_F3X6_type:
      insn->insn_code |= SET_IW_F3X6L5_C (reg->index);
      break;
    case iw_F3X8_type:
      insn->insn_code |= SET_IW_F3X8_C (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_F3X8_READC (0);
      else
	insn->insn_code |= SET_IW_F3X8_READC (1);
      break;
    case iw_F2_type:
      insn->insn_code |= SET_IW_F2_B (reg->index);
      break;
    default:
      bad_opcode (op);
    }
}

/* Source register 1.  */
static void
nios2_assemble_arg_s (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned long regtype = REG_NORMAL;
  struct nios2_reg *reg;

  if (op->format == iw_custom_type || op->format == iw_F3X8_type)
    regtype |= REG_COPROCESSOR;
  reg = nios2_parse_reg (token, regtype);
  if (reg == NULL)
    return;

  switch (op->format)
    {
    case iw_r_type:
      if (op->match == MATCH_R1_JMP && reg->index == 31)
	as_bad (_("r31 cannot be used with jmp; use ret instead"));
      insn->insn_code |= SET_IW_R_A (reg->index);
      break;
    case iw_i_type:
      insn->insn_code |= SET_IW_I_A (reg->index);
      break;
    case iw_custom_type:
      insn->insn_code |= SET_IW_CUSTOM_A (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_CUSTOM_READA (0);
      else
	insn->insn_code |= SET_IW_CUSTOM_READA (1);
      break;
    case iw_F2I16_type:
      insn->insn_code |= SET_IW_F2I16_A (reg->index);
      break;
    case iw_F2X4I12_type:
      insn->insn_code |= SET_IW_F2X4I12_A (reg->index);
      break;
    case iw_F1X4I12_type:
      insn->insn_code |= SET_IW_F1X4I12_A (reg->index);
      break;
    case iw_F1X4L17_type:
      insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
      break;
    case iw_F3X6L5_type:
    case iw_F3X6_type:
      if (op->match == MATCH_R2_JMP && reg->index == 31)
	as_bad (_("r31 cannot be used with jmp; use ret instead"));
      insn->insn_code |= SET_IW_F3X6L5_A (reg->index);
      break;
    case iw_F2X6L10_type:
      insn->insn_code |= SET_IW_F2X6L10_A (reg->index);
      break;
    case iw_F3X8_type:
      insn->insn_code |= SET_IW_F3X8_A (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_F3X8_READA (0);
      else
	insn->insn_code |= SET_IW_F3X8_READA (1);
      break;
    case iw_F1X1_type:
      if (op->match == MATCH_R2_JMPR_N && reg->index == 31)
	as_bad (_("r31 cannot be used with jmpr.n; use ret.n instead"));
      insn->insn_code |= SET_IW_F1X1_A (reg->index);
      break;
    case iw_F1I5_type:
      /* Implicit stack pointer reference.  */
      if (reg->index != 27)
	as_bad (_("invalid register %s"), token);
      break;
    case iw_F2_type:
      insn->insn_code |= SET_IW_F2_A (reg->index);
      break;
    default:
      bad_opcode (op);
    }
}

/* Source register 2.  */
static void
nios2_assemble_arg_t (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned long regtype = REG_NORMAL;
  struct nios2_reg *reg;

  if (op->format == iw_custom_type || op->format == iw_F3X8_type)
    regtype |= REG_COPROCESSOR;
  reg = nios2_parse_reg (token, regtype);
  if (reg == NULL)
    return;

  switch (op->format)
    {
    case iw_r_type:
      insn->insn_code |= SET_IW_R_B (reg->index);
      break;
    case iw_i_type:
      insn->insn_code |= SET_IW_I_B (reg->index);
      break;
    case iw_custom_type:
      insn->insn_code |= SET_IW_CUSTOM_B (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_CUSTOM_READB (0);
      else
	insn->insn_code |= SET_IW_CUSTOM_READB (1);
      break;
    case iw_F2I16_type:
      insn->insn_code |= SET_IW_F2I16_B (reg->index);
      break;
    case iw_F2X4I12_type:
      insn->insn_code |= SET_IW_F2X4I12_B (reg->index);
      break;
    case iw_F3X6L5_type:
    case iw_F3X6_type:
      insn->insn_code |= SET_IW_F3X6L5_B (reg->index);
      break;
    case iw_F2X6L10_type:
      insn->insn_code |= SET_IW_F2X6L10_B (reg->index);
      break;
    case iw_F3X8_type:
      insn->insn_code |= SET_IW_F3X8_B (reg->index);
      if (reg->regtype & REG_COPROCESSOR)
	insn->insn_code |= SET_IW_F3X8_READB (0);
      else
	insn->insn_code |= SET_IW_F3X8_READB (1);
      break;
    case iw_F1I5_type:
      insn->insn_code |= SET_IW_F1I5_B (reg->index);
      break;
    case iw_F2_type:
      insn->insn_code |= SET_IW_F2_B (reg->index);
      break;
    case iw_T1X1I6_type:
      /* Implicit zero register reference.  */
      if (reg->index != 0)
	as_bad (_("invalid register %s"), token);
      break;

    default:
      bad_opcode (op);
    }
}

/* Destination register w/3-bit encoding.  */
static void
nios2_assemble_arg_D (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  int reg = nios2_assemble_reg3 (token);

  switch (op->format)
    {
    case iw_T1I7_type:
      insn->insn_code |= SET_IW_T1I7_A3 (reg);
      break;
    case iw_T2X1L3_type:
      insn->insn_code |= SET_IW_T2X1L3_B3 (reg);
      break;
    case iw_T2X1I3_type:
      insn->insn_code |= SET_IW_T2X1I3_B3 (reg);
      break;
    case iw_T3X1_type:
      insn->insn_code |= SET_IW_T3X1_C3 (reg);
      break;
    case iw_T2X3_type:
      /* Some instructions using this encoding take 3 register arguments,
	 requiring the destination register to be the same as the first
	 source register.  */
      if (op->num_args == 3)
	insn->insn_code |= SET_IW_T2X3_A3 (reg);
      else
	insn->insn_code |= SET_IW_T2X3_B3 (reg);
      break;
    default:
      bad_opcode (op);
    }
}

/* Source register w/3-bit encoding.  */
static void
nios2_assemble_arg_S (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  int reg = nios2_assemble_reg3 (token);

  switch (op->format)
    {
    case iw_T1I7_type:
      insn->insn_code |= SET_IW_T1I7_A3 (reg);
      break;
    case iw_T2I4_type:
      insn->insn_code |= SET_IW_T2I4_A3 (reg);
      break;
    case iw_T2X1L3_type:
      insn->insn_code |= SET_IW_T2X1L3_A3 (reg);
      break;
    case iw_T2X1I3_type:
      insn->insn_code |= SET_IW_T2X1I3_A3 (reg);
      break;
    case iw_T3X1_type:
      insn->insn_code |= SET_IW_T3X1_A3 (reg);
      break;
    case iw_T2X3_type:
      /* Some instructions using this encoding take 3 register arguments,
	 requiring the destination register to be the same as the first
	 source register.  */
      if (op->num_args == 3)
	{
	  int dreg = GET_IW_T2X3_A3 (insn->insn_code);
	  if (dreg != reg)
	    as_bad ("source and destination registers must be the same");
	}
      else
	insn->insn_code |= SET_IW_T2X3_A3 (reg);
      break;
    case iw_T1X1I6_type:
      insn->insn_code |= SET_IW_T1X1I6_A3 (reg);
      break;
    default:
      bad_opcode (op);
    }
}

/* Source register 2 w/3-bit encoding.  */
static void
nios2_assemble_arg_T (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  int reg = nios2_assemble_reg3 (token);

  switch (op->format)
    {
    case iw_T2I4_type:
      insn->insn_code |= SET_IW_T2I4_B3 (reg);
      break;
    case iw_T3X1_type:
      insn->insn_code |= SET_IW_T3X1_B3 (reg);
      break;
    case iw_T2X3_type:
      insn->insn_code |= SET_IW_T2X3_B3 (reg);
      break;
    default:
      bad_opcode (op);
    }
}

/* 16-bit signed immediate.  */
static void
nios2_assemble_arg_i (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_i_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_S16, 0);
      insn->constant_bits |= SET_IW_I_IMM16 (val);
      break;
    case iw_F2I16_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_S16, 0);
      insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 12-bit signed immediate.  */
static void
nios2_assemble_arg_I (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_F2X4I12_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_S12, 0);
      insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
      break;
    case iw_F1X4I12_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_S12, 0);
      insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 16-bit unsigned immediate.  */
static void
nios2_assemble_arg_u (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_i_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_U16, 0);
      insn->constant_bits |= SET_IW_I_IMM16 (val);
      break;
    case iw_F2I16_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_U16, 0);
      insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 7-bit unsigned immediate with 2-bit shift.  */
static void
nios2_assemble_arg_U (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T1I7_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T1I7_2, 0);
      insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 2);
      break;
    case iw_X1I7_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_X1I7_2, 0);
      insn->constant_bits |= SET_IW_X1I7_IMM7 (val >> 2);
      break;
    default:
      bad_opcode (op);
    }
}

/* 5-bit unsigned immediate with 2-bit shift.  */
static void
nios2_assemble_arg_V (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_F1I5_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_F1I5_2, 0);
      insn->constant_bits |= SET_IW_F1I5_IMM5 (val >> 2);
      break;
    default:
      bad_opcode (op);
    }
}

/* 4-bit unsigned immediate with 2-bit shift.  */
static void
nios2_assemble_arg_W (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T2I4_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T2I4_2, 0);
      insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 2);
      break;
    case iw_L5I4X1_type:
      /* This argument is optional for push.n/pop.n, and defaults to
	 zero if unspecified.  */
      if (token == NULL)
	return;

      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_L5I4X1, 0);
      insn->constant_bits |= SET_IW_L5I4X1_IMM4 (val >> 2);
      break;
    default:
      bad_opcode (op);
    }
}

/* 4-bit unsigned immediate with 1-bit shift.  */
static void
nios2_assemble_arg_X (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T2I4_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T2I4_1, 0);
      insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 1);
      break;
    default:
      bad_opcode (op);
    }
}

/* 4-bit unsigned immediate without shift.  */
static void
nios2_assemble_arg_Y (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T2I4_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T2I4, 0);
      insn->constant_bits |= SET_IW_T2I4_IMM4 (val);
      break;
    default:
      bad_opcode (op);
    }
}


/* 16-bit signed immediate address offset.  */
static void
nios2_assemble_arg_o (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_i_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_16_PCREL, 1);
      insn->constant_bits |= SET_IW_I_IMM16 (val);
      break;
    case iw_F2I16_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_16_PCREL, 1);
      insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 10-bit signed address offset with 1-bit shift.  */
static void
nios2_assemble_arg_O (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_I10_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_I10_1_PCREL, 1);
      insn->constant_bits |= SET_IW_I10_IMM10 (val >> 1);
      break;
    default:
      bad_opcode (op);
    }
}

/* 7-bit signed address offset with 1-bit shift.  */
static void
nios2_assemble_arg_P (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T1I7_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T1I7_1_PCREL, 1);
      insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 1);
      break;
    default:
      bad_opcode (op);
    }
}

/* 5-bit unsigned immediate.  */
static void
nios2_assemble_arg_j (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_r_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_IMM5, 0);
      insn->constant_bits |= SET_IW_R_IMM5 (val);
      break;
    case iw_F3X6L5_type:
      if (op->match == MATCH_R2_ENI)
	/* Value must be constant 0 or 1.  */
	{
	  val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
	  if (val != 0 && val != 1)
	    as_bad ("invalid eni argument %u", val);
	  insn->insn_code |= SET_IW_F3X6L5_IMM5 (val);
	}
      else
	{
	  val = nios2_assemble_expression (token, insn,
					   BFD_RELOC_NIOS2_IMM5, 0);
	  insn->constant_bits |= SET_IW_F3X6L5_IMM5 (val);
	}
      break;
    case iw_F2X6L10_type:
      /* Only constant expression without relocation permitted for
	 bit position.  */
      val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
      if (val > 31)
	as_bad ("invalid bit position %u", val);
      insn->insn_code |= SET_IW_F2X6L10_MSB (val);
      break;
    case iw_X2L5_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_X2L5, 0);
      insn->constant_bits |= SET_IW_X2L5_IMM5 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* Second 5-bit unsigned immediate field.  */
static void
nios2_assemble_arg_k (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_F2X6L10_type:
      /* Only constant expression without relocation permitted for
	 bit position.  */
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NONE, 0);
      if (val > 31)
	as_bad ("invalid bit position %u", val);
      else if (GET_IW_F2X6L10_MSB (insn->insn_code) < val)
	as_bad ("MSB must be greater than or equal to LSB");
      insn->insn_code |= SET_IW_F2X6L10_LSB (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 8-bit unsigned immediate.  */
static void
nios2_assemble_arg_l (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_custom_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_IMM8, 0);
      insn->constant_bits |= SET_IW_CUSTOM_N (val);
      break;
    case iw_F3X8_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_IMM8, 0);
      insn->constant_bits |= SET_IW_F3X8_N (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 26-bit unsigned immediate.  */
static void
nios2_assemble_arg_m (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_j_type:
      val = nios2_assemble_expression (token, insn,
				       (nios2_as_options.noat
					? BFD_RELOC_NIOS2_CALL26_NOAT
					: BFD_RELOC_NIOS2_CALL26),
				       0);
      insn->constant_bits |= SET_IW_J_IMM26 (val);
      break;
    case iw_L26_type:
      val = nios2_assemble_expression (token, insn,
				       (nios2_as_options.noat
					? BFD_RELOC_NIOS2_CALL26_NOAT
					: BFD_RELOC_NIOS2_CALL26),
				       0);
      insn->constant_bits |= SET_IW_L26_IMM26 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 6-bit unsigned immediate with no shifting.  */
static void
nios2_assemble_arg_M (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T1X1I6_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T1X1I6, 0);
      insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* 6-bit unsigned immediate with 2-bit shift.  */
static void
nios2_assemble_arg_N (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;

  switch (op->format)
    {
    case iw_T1X1I6_type:
      val = nios2_assemble_expression (token, insn,
				       BFD_RELOC_NIOS2_R2_T1X1I6_2, 0);
      insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val >> 2);
      break;
    default:
      bad_opcode (op);
    }
}


/* Encoded enumeration for addi.n/subi.n.  */
static void
nios2_assemble_arg_e (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;
  int i;

  switch (op->format)
    {
    case iw_T2X1I3_type:
      val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
      for (i = 0; i < nios2_num_r2_asi_n_mappings; i++)
	if (val == nios2_r2_asi_n_mappings[i])
	  break;
      if (i == nios2_num_r2_asi_n_mappings)
	{
	  as_bad (_("Invalid constant operand %s"), token);
	  return;
	}
      insn->insn_code |= SET_IW_T2X1I3_IMM3 ((unsigned)i);
      break;
    default:
      bad_opcode (op);
    }
}

/* Encoded enumeration for slli.n/srli.n.  */
static void
nios2_assemble_arg_f (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;
  int i;

  switch (op->format)
    {
    case iw_T2X1L3_type:
      val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
      for (i = 0; i < nios2_num_r2_shi_n_mappings; i++)
	if (val == nios2_r2_shi_n_mappings[i])
	  break;
      if (i == nios2_num_r2_shi_n_mappings)
	{
	  as_bad (_("Invalid constant operand %s"), token);
	  return;
	}
      insn->insn_code |= SET_IW_T2X1L3_SHAMT ((unsigned)i);
      break;
    default:
      bad_opcode (op);
    }
}

/* Encoded enumeration for andi.n.  */
static void
nios2_assemble_arg_g (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;
  int i;

  switch (op->format)
    {
    case iw_T2I4_type:
      val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
      for (i = 0; i < nios2_num_r2_andi_n_mappings; i++)
	if (val == nios2_r2_andi_n_mappings[i])
	  break;
      if (i == nios2_num_r2_andi_n_mappings)
	{
	  as_bad (_("Invalid constant operand %s"), token);
	  return;
	}
      insn->insn_code |= SET_IW_T2I4_IMM4 ((unsigned)i);
      break;
    default:
      bad_opcode (op);
    }
}

/* Encoded enumeration for movi.n.  */
static void
nios2_assemble_arg_h (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned int val;
  int i;

  switch (op->format)
    {
    case iw_T1I7_type:
      val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
      i = (signed) val;
      if ((signed) i == -1)
	val = 127;
      else if (i == -2)
	val = 126;
      else if (i == 0xff)
	val = 125;
      else if (i < 0 || i > 125)
	{
	  as_bad (_("Invalid constant operand %s"), token);
	  return;
	}
      insn->insn_code |= SET_IW_T1I7_IMM7 (val);
      break;
    default:
      bad_opcode (op);
    }
}

/* Encoded REGMASK for ldwm/stwm or push.n/pop.n.  */
static void
nios2_assemble_arg_R (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  unsigned long mask;
  char *buf = strdup (token);
  unsigned long reglist = nios2_parse_reglist (buf, op);
  free (buf);

  if (reglist == 0)
    return;

  switch (op->format)
    {
    case iw_F1X4L17_type:
      /* Encoding for ldwm/stwm.  */
      if (reglist & 0x00003ffc)
	mask = reglist >> 2;
      else
	{
	  insn->insn_code |= SET_IW_F1X4L17_RS (1);
	  mask = (reglist & 0x00ffc000) >> 14;
	  if (reglist & (1 << 28))
	    mask |= 1 << 10;
	  if (reglist & (1 << 31))
	    mask |= 1 << 11;
	}
      insn->insn_code |= SET_IW_F1X4L17_REGMASK (mask);
      break;

    case iw_L5I4X1_type:
      /* Encoding for push.n/pop.n.  */
      if (reglist & (1 << 28))
	insn->insn_code |= SET_IW_L5I4X1_FP (1);
      mask = reglist & 0x00ff0000;
      if (mask)
	{
	  int i;

	  for (i = 0; i < nios2_num_r2_reg_range_mappings; i++)
	    if (nios2_r2_reg_range_mappings[i] == mask)
	      break;
	  if (i == nios2_num_r2_reg_range_mappings)
	    {
	      as_bad ("invalid reglist");
	      return;
	    }
	  insn->insn_code |= SET_IW_L5I4X1_REGRANGE (i);
	  insn->insn_code |= SET_IW_L5I4X1_CS (1);
	}
      break;

    default:
      bad_opcode (op);
    }
}

/* Base register for ldwm/stwm.  */
static void
nios2_assemble_arg_B (const char *token, nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  int direction, writeback, ret;
  char *str = strdup (token);
  struct nios2_reg *reg
    = nios2_parse_base_register (str, &direction, &writeback, &ret);

  free (str);
  if (!reg)
    return;

  switch (op->format)
    {
    case iw_F1X4L17_type:
      /* For ldwm, check to see if the base register is already inside the
	 register list.  */
      if (op->match == MATCH_R2_LDWM
	  && (nios2_reglist_mask & (1 << reg->index)))
	{
	  as_bad ("invalid base register; %s is inside the reglist", reg->name);
	  return;
	}

      /* For stwm, ret option is not allowed.  */
      if (op->match == MATCH_R2_STWM && ret)
	{
	  as_bad ("invalid option syntax");
	  return;
	}

      /* Check that the direction matches the ordering of the reglist.  */
      if (nios2_reglist_dir && direction != nios2_reglist_dir)
	{
	  as_bad ("reglist order does not match increment/decrement mode");
	  return;
	}

      insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
      if (direction > 0)
	insn->insn_code |= SET_IW_F1X4L17_ID (1);
      if (writeback)
	insn->insn_code |= SET_IW_F1X4L17_WB (1);
      if (ret)
	insn->insn_code |= SET_IW_F1X4L17_PC (1);
      break;

    default:
      bad_opcode (op);
    }
}

static void
nios2_assemble_args (nios2_insn_infoS *insn)
{
  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  const char *argptr;
  unsigned int tokidx, ntok;

  /* Make sure there are enough arguments.  */
  ntok = (op->pinfo & NIOS2_INSN_OPTARG) ? op->num_args - 1 : op->num_args;
  for (tokidx = 1; tokidx <= ntok; tokidx++)
    if (insn->insn_tokens[tokidx] == NULL)
      {
	as_bad ("missing argument");
	return;
      }

  for (argptr = op->args, tokidx = 1;
       *argptr && insn->insn_tokens[tokidx];
       argptr++)
    switch (*argptr)
      {
      case ',':
      case '(':
      case ')':
	break;

      case 'c':
	nios2_assemble_arg_c (insn->insn_tokens[tokidx++], insn);
	break;

      case 'd':
	nios2_assemble_arg_d (insn->insn_tokens[tokidx++], insn);
	break;

      case 's':
	nios2_assemble_arg_s (insn->insn_tokens[tokidx++], insn);
	break;

      case 't':
	nios2_assemble_arg_t (insn->insn_tokens[tokidx++], insn);
	break;

      case 'D':
	nios2_assemble_arg_D (insn->insn_tokens[tokidx++], insn);
	break;

      case 'S':
	nios2_assemble_arg_S (insn->insn_tokens[tokidx++], insn);
	break;

      case 'T':
	nios2_assemble_arg_T (insn->insn_tokens[tokidx++], insn);
	break;

      case 'i':
	nios2_assemble_arg_i (insn->insn_tokens[tokidx++], insn);
	break;

      case 'I':
	nios2_assemble_arg_I (insn->insn_tokens[tokidx++], insn);
	break;

      case 'u':
	nios2_assemble_arg_u (insn->insn_tokens[tokidx++], insn);
	break;

      case 'U':
	nios2_assemble_arg_U (insn->insn_tokens[tokidx++], insn);
	break;

      case 'V':
	nios2_assemble_arg_V (insn->insn_tokens[tokidx++], insn);
	break;

      case 'W':
	nios2_assemble_arg_W (insn->insn_tokens[tokidx++], insn);
	break;

      case 'X':
	nios2_assemble_arg_X (insn->insn_tokens[tokidx++], insn);
	break;

      case 'Y':
	nios2_assemble_arg_Y (insn->insn_tokens[tokidx++], insn);
	break;

      case 'o':
	nios2_assemble_arg_o (insn->insn_tokens[tokidx++], insn);
	break;

      case 'O':
	nios2_assemble_arg_O (insn->insn_tokens[tokidx++], insn);
	break;

      case 'P':
	nios2_assemble_arg_P (insn->insn_tokens[tokidx++], insn);
	break;

      case 'j':
	nios2_assemble_arg_j (insn->insn_tokens[tokidx++], insn);
	break;

      case 'k':
	nios2_assemble_arg_k (insn->insn_tokens[tokidx++], insn);
	break;

      case 'l':
	nios2_assemble_arg_l (insn->insn_tokens[tokidx++], insn);
	break;

      case 'm':
	nios2_assemble_arg_m (insn->insn_tokens[tokidx++], insn);
	break;

      case 'M':
	nios2_assemble_arg_M (insn->insn_tokens[tokidx++], insn);
	break;

      case 'N':
	nios2_assemble_arg_N (insn->insn_tokens[tokidx++], insn);
	break;

      case 'e':
	nios2_assemble_arg_e (insn->insn_tokens[tokidx++], insn);
	break;

      case 'f':
	nios2_assemble_arg_f (insn->insn_tokens[tokidx++], insn);
	break;

      case 'g':
	nios2_assemble_arg_g (insn->insn_tokens[tokidx++], insn);
	break;

      case 'h':
	nios2_assemble_arg_h (insn->insn_tokens[tokidx++], insn);
	break;

      case 'R':
	nios2_assemble_arg_R (insn->insn_tokens[tokidx++], insn);
	break;

      case 'B':
	nios2_assemble_arg_B (insn->insn_tokens[tokidx++], insn);
	break;

      default:
	bad_opcode (op);
	break;
      }

  /* Perform argument checking.  */
  nios2_check_assembly (insn->insn_code | insn->constant_bits,
			insn->insn_tokens[tokidx]);
}


/* The function consume_arg takes a pointer into a string
   of instruction tokens (args) and a pointer into a string
   representing the expected sequence of tokens and separators.
   It checks whether the first argument in argstr is of the
   expected type, throwing an error if it is not, and returns
   the pointer argstr.  */
static char *
nios2_consume_arg (char *argstr, const char *parsestr)
{
  char *temp;

  switch (*parsestr)
    {
    case 'c':
    case 'd':
    case 's':
    case 't':
    case 'D':
    case 'S':
    case 'T':
      break;

    case 'i':
    case 'u':
      if (*argstr == '%')
	{
	  if (nios2_special_relocation_p (argstr))
	    {
	      /* We zap the parentheses because we don't want them confused
		 with separators.  */
	      temp = strchr (argstr, '(');
	      if (temp != NULL)
		*temp = ' ';
	      temp = strchr (argstr, ')');
	      if (temp != NULL)
		*temp = ' ';
	    }
	  else
	    as_bad (_("badly formed expression near %s"), argstr);
	}
      break;
    case 'm':
    case 'j':
    case 'k':
    case 'l':
    case 'I':
    case 'U':
    case 'V':
    case 'W':
    case 'X':
    case 'Y':
    case 'O':
    case 'P':
    case 'e':
    case 'f':
    case 'g':
    case 'h':
    case 'M':
    case 'N':

      /* We can't have %hi, %lo or %hiadj here.  */
      if (*argstr == '%')
	as_bad (_("badly formed expression near %s"), argstr);
      break;

    case 'R':
      /* Register list for ldwm/stwm or push.n/pop.n.  Replace the commas
	 in the list with spaces so we don't confuse them with separators.  */
      if (*argstr != '{')
	{
	  as_bad ("missing '{' in register list");
	  break;
	}
      for (temp = argstr + 1; *temp; temp++)
	{
	  if (*temp == '}')
	    break;
	  else if (*temp == ',')
	    *temp = ' ';
	}
      if (!*temp)
	{
	  as_bad ("missing '}' in register list");
	  break;
	}
      break;

    case 'B':
      /* Base register and options for ldwm/stwm.  This is the final argument
	 and consumes the rest of the argument string; replace commas
	 with spaces so that the token splitter doesn't think they are
	 separate arguments.  */
      for (temp = argstr; *temp; temp++)
	if (*temp == ',')
	  *temp = ' ';
      break;

    case 'o':
    case 'E':
      break;
    default:
      BAD_CASE (*parsestr);
      break;
    }

  return argstr;
}

/* The function consume_separator takes a pointer into a string
   of instruction tokens (args) and a pointer into a string representing
   the expected sequence of tokens and separators.  It finds the first
   instance of the character pointed to by separator in argstr, and
   returns a pointer to the next element of argstr, which is the
   following token in the sequence.  */
static char *
nios2_consume_separator (char *argstr, const char *separator)
{
  char *p;

  /* If we have a opcode reg, expr(reg) type instruction, and
   * we are separating the expr from the (reg), we find the last
   * (, just in case the expression has parentheses.  */

  if (*separator == '(')
    p = strrchr (argstr, *separator);
  else
    p = strchr (argstr, *separator);

  if (p != NULL)
    *p++ = 0;
  return p;
}

/* The principal argument parsing function which takes a string argstr
   representing the instruction arguments for insn, and extracts the argument
   tokens matching parsestr into parsed_args.  */
static void
nios2_parse_args (nios2_insn_infoS *insn, char *argstr,
		  const char *parsestr, char **parsed_args)
{
  char *p;
  char *end = NULL;
  int i;
  p = argstr;
  i = 0;
  bfd_boolean terminate = FALSE;

  /* This rest of this function is it too fragile and it mostly works,
     therefore special case this one.  */
  if (*parsestr == 0 && argstr != 0)
    {
      as_bad (_("too many arguments"));
      parsed_args[0] = NULL;
      return;
    }

  while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS)
    {
      parsed_args[i] = nios2_consume_arg (p, parsestr);
      ++parsestr;
      while (*parsestr == '(' || *parsestr == ')' || *parsestr == ',')
	{
	  char *context = p;
	  p = nios2_consume_separator (p, parsestr);
	  /* Check for missing separators.  */
	  if (!p && !(insn->insn_nios2_opcode->pinfo & NIOS2_INSN_OPTARG))
	    {
	      as_bad (_("expecting %c near %s"), *parsestr, context);
	      break;
	    }
	  ++parsestr;
	}

      if (*parsestr == '\0')
	{
	  /* Check that the argument string has no trailing arguments.  */
	  end = strpbrk (p, ",");
	  if (end != NULL)
	    as_bad (_("too many arguments"));
	}

      if (*parsestr == '\0' || (p != NULL && *p == '\0'))
	terminate = TRUE;
      ++i;
    }

  parsed_args[i] = NULL;
}



/** Support for pseudo-op parsing.  These are macro-like opcodes that
    expand into real insns by suitable fiddling with the operands.  */

/* Append the string modifier to the string contained in the argument at
   parsed_args[ndx].  */
static void
nios2_modify_arg (char **parsed_args, const char *modifier,
		  int unused ATTRIBUTE_UNUSED, int ndx)
{
  char *tmp = parsed_args[ndx];

  parsed_args[ndx] = concat (tmp, modifier, (char *) NULL);
}

/* Modify parsed_args[ndx] by negating that argument.  */
static void
nios2_negate_arg (char **parsed_args, const char *modifier ATTRIBUTE_UNUSED,
		  int unused ATTRIBUTE_UNUSED, int ndx)
{
  char *tmp = parsed_args[ndx];

  parsed_args[ndx] = concat ("~(", tmp, ")+1", (char *) NULL);
}

/* The function nios2_swap_args swaps the pointers at indices index_1 and
   index_2 in the array parsed_args[] - this is used for operand swapping
   for comparison operations.  */
static void
nios2_swap_args (char **parsed_args, const char *unused ATTRIBUTE_UNUSED,
		 int index_1, int index_2)
{
  char *tmp;
  gas_assert (index_1 < NIOS2_MAX_INSN_TOKENS
	      && index_2 < NIOS2_MAX_INSN_TOKENS);
  tmp = parsed_args[index_1];
  parsed_args[index_1] = parsed_args[index_2];
  parsed_args[index_2] = tmp;
}

/* This function appends the string appnd to the array of strings in
   parsed_args num times starting at index start in the array.  */
static void
nios2_append_arg (char **parsed_args, const char *appnd, int num,
		  int start)
{
  int i, count;
  char *tmp;

  gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);

  if (nios2_mode == NIOS2_MODE_TEST)
    tmp = parsed_args[start];
  else
    tmp = NULL;

  for (i = start, count = num; count > 0; ++i, --count)
    parsed_args[i] = (char *) appnd;

  gas_assert (i == (start + num));
  parsed_args[i] = tmp;
  parsed_args[i + 1] = NULL;
}

/* This function inserts the string insert num times in the array
   parsed_args, starting at the index start.  */
static void
nios2_insert_arg (char **parsed_args, const char *insert, int num,
		  int start)
{
  int i, count;

  gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);

  /* Move the existing arguments up to create space.  */
  for (i = NIOS2_MAX_INSN_TOKENS; i - num >= start; --i)
    parsed_args[i] = parsed_args[i - num];

  for (i = start, count = num; count > 0; ++i, --count)
    parsed_args[i] = (char *) insert;
}

/* Cleanup function to free malloc'ed arg strings.  */
static void
nios2_free_arg (char **parsed_args, int num ATTRIBUTE_UNUSED, int start)
{
  if (parsed_args[start])
    {
      free (parsed_args[start]);
      parsed_args[start] = NULL;
    }
}

/* This function swaps the pseudo-op for a real op.  */
static nios2_ps_insn_infoS*
nios2_translate_pseudo_insn (nios2_insn_infoS *insn)
{

  const struct nios2_opcode *op = insn->insn_nios2_opcode;
  nios2_ps_insn_infoS *ps_insn;
  unsigned int tokidx, ntok;

  /* Find which real insn the pseudo-op translates to and
     switch the insn_info ptr to point to it.  */
  ps_insn = nios2_ps_lookup (op->name);

  if (ps_insn != NULL)
    {
      insn->insn_nios2_opcode = nios2_opcode_lookup (ps_insn->insn);
      insn->insn_tokens[0] = insn->insn_nios2_opcode->name;
      
      /* Make sure there are enough arguments.  */
      ntok = ((op->pinfo & NIOS2_INSN_OPTARG)
	      ? op->num_args - 1 : op->num_args);
      for (tokidx = 1; tokidx <= ntok; tokidx++)
	if (insn->insn_tokens[tokidx] == NULL)
	  {
	    as_bad ("missing argument");
	    return NULL;
	  }

      /* Modify the args so they work with the real insn.  */
      ps_insn->arg_modifer_func ((char **) insn->insn_tokens,
				 ps_insn->arg_modifier, ps_insn->num,
				 ps_insn->index);
    }
  else
    /* we cannot recover from this.  */
    as_fatal (_("unrecognized pseudo-instruction %s"),
	      insn->insn_nios2_opcode->name);
  return ps_insn;
}

/* Invoke the cleanup handler for pseudo-insn ps_insn on insn.  */
static void
nios2_cleanup_pseudo_insn (nios2_insn_infoS *insn,
			   nios2_ps_insn_infoS *ps_insn)
{
  if (ps_insn->arg_cleanup_func)
    (ps_insn->arg_cleanup_func) ((char **) insn->insn_tokens,
				 ps_insn->num, ps_insn->index);
}

const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = {
  /* pseudo-op, real-op, arg, arg_modifier_func, num, index, arg_cleanup_func */
  {"mov", "add", nios2_append_arg, "zero", 1, 3, NULL},
  {"movi", "addi", nios2_insert_arg, "zero", 1, 2, NULL},
  {"movhi", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
  {"movui", "ori", nios2_insert_arg, "zero", 1, 2, NULL},
  {"movia", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
  {"nop", "add", nios2_append_arg, "zero", 3, 1, NULL},
  {"bgt", "blt", nios2_swap_args, "", 1, 2, NULL},
  {"bgtu", "bltu", nios2_swap_args, "", 1, 2, NULL},
  {"ble", "bge", nios2_swap_args, "", 1, 2, NULL},
  {"bleu", "bgeu", nios2_swap_args, "", 1, 2, NULL},
  {"cmpgt", "cmplt", nios2_swap_args, "", 2, 3, NULL},
  {"cmpgtu", "cmpltu", nios2_swap_args, "", 2, 3, NULL},
  {"cmple", "cmpge", nios2_swap_args, "", 2, 3, NULL},
  {"cmpleu", "cmpgeu", nios2_swap_args, "", 2, 3, NULL},
  {"cmpgti", "cmpgei", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
  {"cmpgtui", "cmpgeui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
  {"cmplei", "cmplti", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
  {"cmpleui", "cmpltui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
  {"subi", "addi", nios2_negate_arg, "", 0, 3, nios2_free_arg},
  {"nop.n", "mov.n", nios2_append_arg, "zero", 2, 1, NULL}
  /* Add further pseudo-ops here.  */
};

#define NIOS2_NUM_PSEUDO_INSNS \
	((sizeof(nios2_ps_insn_info_structs)/ \
	  sizeof(nios2_ps_insn_info_structs[0])))
const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS;


/** Assembler output support.  */

/* Output a normal instruction.  */
static void
output_insn (nios2_insn_infoS *insn)
{
  char *f;
  nios2_insn_relocS *reloc;
  f = frag_more (insn->insn_nios2_opcode->size);
  /* This allocates enough space for the instruction
     and puts it in the current frag.  */
  md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
  /* Emit debug info.  */
  dwarf2_emit_insn (insn->insn_nios2_opcode->size);
  /* Create any fixups to be acted on later.  */

  for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next)
    fix_new_exp (frag_now, f - frag_now->fr_literal,
		 insn->insn_nios2_opcode->size,
		 &reloc->reloc_expression, reloc->reloc_pcrel,
		 reloc->reloc_type);
}

/* Output an unconditional branch.  */
static void
output_ubranch (nios2_insn_infoS *insn)
{
  nios2_insn_relocS *reloc = insn->insn_reloc;

  /* If the reloc is NULL, there was an error assembling the branch.  */
  if (reloc != NULL)
    {
      symbolS *symp = reloc->reloc_expression.X_add_symbol;
      offsetT offset = reloc->reloc_expression.X_add_number;
      char *f;
      bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);

      /* Tag dwarf2 debug info to the address at the start of the insn.
	 We must do it before frag_var() below closes off the frag.  */
      dwarf2_emit_insn (0);

      /* We create a machine dependent frag which can grow
	 to accommodate the largest possible instruction sequence
	 this may generate.  */
      f = frag_var (rs_machine_dependent,
		    UBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
		    (is_cdx ? CDX_UBRANCH_SUBTYPE (0) : UBRANCH_SUBTYPE (0)),
		    symp, offset, NULL);

      md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);

      /* We leave fixup generation to md_convert_frag.  */
    }
}

/* Output a conditional branch.  */
static void
output_cbranch (nios2_insn_infoS *insn)
{
  nios2_insn_relocS *reloc = insn->insn_reloc;

  /* If the reloc is NULL, there was an error assembling the branch.  */
  if (reloc != NULL)
    {
      symbolS *symp = reloc->reloc_expression.X_add_symbol;
      offsetT offset = reloc->reloc_expression.X_add_number;
      char *f;
      bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);

      /* Tag dwarf2 debug info to the address at the start of the insn.
	 We must do it before frag_var() below closes off the frag.  */
      dwarf2_emit_insn (0);

      /* We create a machine dependent frag which can grow
	 to accommodate the largest possible instruction sequence
	 this may generate.  */
      f = frag_var (rs_machine_dependent,
		    CBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
		    (is_cdx ? CDX_CBRANCH_SUBTYPE (0) : CBRANCH_SUBTYPE (0)),
		    symp, offset, NULL);

      md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);

      /* We leave fixup generation to md_convert_frag.  */
    }
}

/* Output a call sequence.  Since calls are not pc-relative for NIOS2,
   but are page-relative, we cannot tell at any stage in assembly
   whether a call will be out of range since a section may be linked
   at any address.  So if we are relaxing, we convert all call instructions
   to long call sequences, and rely on the linker to relax them back to
   short calls.  */
static void
output_call (nios2_insn_infoS *insn)
{
  /* This allocates enough space for the instruction
     and puts it in the current frag.  */
  char *f = frag_more (12);
  nios2_insn_relocS *reloc = insn->insn_reloc;
  const struct nios2_opcode *op = insn->insn_nios2_opcode;

  switch (op->format)
    {
    case iw_j_type:
      md_number_to_chars (f,
			  (MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM)
			   | SET_IW_I_A (0)),
			  4);
      dwarf2_emit_insn (4);
      fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
		   &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
      md_number_to_chars (f + 4,
			  (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
			   | SET_IW_I_A (AT_REGNUM)),
			  4);
      dwarf2_emit_insn (4);
      fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
		   &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
      md_number_to_chars (f + 8, MATCH_R1_CALLR | SET_IW_R_A (AT_REGNUM), 4);
      dwarf2_emit_insn (4);
      break;
    case iw_L26_type:
      md_number_to_chars (f,
			  (MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM)
			   | SET_IW_F2I16_A (0)),
			  4);
      dwarf2_emit_insn (4);
      fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
		   &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
      md_number_to_chars (f + 4,
			  (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
			   | SET_IW_F2I16_A (AT_REGNUM)),
			  4);
      dwarf2_emit_insn (4);
      fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
		   &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
      md_number_to_chars (f + 8, MATCH_R2_CALLR | SET_IW_F3X6L5_A (AT_REGNUM),
			  4);
      dwarf2_emit_insn (4);
      break;
    default:
      bad_opcode (op);
    }
}

/* Output a movhi/addi pair for the movia pseudo-op.  */
static void
output_movia (nios2_insn_infoS *insn)
{
  /* This allocates enough space for the instruction
     and puts it in the current frag.  */
  char *f = frag_more (8);
  nios2_insn_relocS *reloc = insn->insn_reloc;
  unsigned long reg, code = 0;
  const struct nios2_opcode *op = insn->insn_nios2_opcode;

  /* If the reloc is NULL, there was an error assembling the movia.  */
  if (reloc != NULL)
    {
      switch (op->format)
	{
	case iw_i_type:
	  reg = GET_IW_I_B (insn->insn_code);
	  code = MATCH_R1_ADDI | SET_IW_I_A (reg) | SET_IW_I_B (reg);
	  break;
	case iw_F2I16_type:
	  reg = GET_IW_F2I16_B (insn->insn_code);
	  code = MATCH_R2_ADDI | SET_IW_F2I16_A (reg) | SET_IW_F2I16_B (reg);
	  break;
	default:
	  bad_opcode (op);
	}

      md_number_to_chars (f, insn->insn_code, 4);
      dwarf2_emit_insn (4);
      fix_new (frag_now, f - frag_now->fr_literal, 4,
	       reloc->reloc_expression.X_add_symbol,
	       reloc->reloc_expression.X_add_number, 0,
	       BFD_RELOC_NIOS2_HIADJ16);
      md_number_to_chars (f + 4, code, 4);
      dwarf2_emit_insn (4);
      fix_new (frag_now, f + 4 - frag_now->fr_literal, 4,
	       reloc->reloc_expression.X_add_symbol,
	       reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16);
    }
}



/** External interfaces.  */

/* Update the selected architecture based on ARCH, giving an error if
   ARCH is an invalid value.  */

static void
nios2_use_arch (const char *arch)
{
  if (strcmp (arch, "nios2") == 0 || strcmp (arch, "r1") == 0)
    {
      nios2_architecture |= EF_NIOS2_ARCH_R1;
      nios2_opcodes = (struct nios2_opcode *) nios2_r1_opcodes;
      nios2_num_opcodes = nios2_num_r1_opcodes;
      nop32 = nop_r1;
      nop16 = NULL;
      return;
    }
  else if (strcmp (arch, "r2") == 0)
    {
      nios2_architecture |= EF_NIOS2_ARCH_R2;
      nios2_opcodes = (struct nios2_opcode *) nios2_r2_opcodes;
      nios2_num_opcodes = nios2_num_r2_opcodes;
      nop32 = nop_r2;
      nop16 = nop_r2_cdx;
      return;
    }

  as_bad (_("unknown architecture '%s'"), arch);
}

/* The following functions are called by machine-independent parts of
   the assembler. */
int
md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
{
  switch (c)
    {
    case 'r':
      /* Hidden option for self-test mode.  */
      nios2_mode = NIOS2_MODE_TEST;
      break;
    case OPTION_RELAX_ALL:
      nios2_as_options.relax = relax_all;
      break;
    case OPTION_NORELAX:
      nios2_as_options.relax = relax_none;
      break;
    case OPTION_RELAX_SECTION:
      nios2_as_options.relax = relax_section;
      break;
    case OPTION_EB:
      target_big_endian = 1;
      break;
    case OPTION_EL:
      target_big_endian = 0;
      break;
    case OPTION_MARCH:
      nios2_use_arch (arg);
      break;
    default:
      return 0;
      break;
    }

  return 1;
}

/* Implement TARGET_FORMAT.  We can choose to be big-endian or
   little-endian at runtime based on a switch.  */
const char *
nios2_target_format (void)
{
  return target_big_endian ? "elf32-bignios2" : "elf32-littlenios2";
}

/* Machine-dependent usage message. */
void
md_show_usage (FILE *stream)
{
  fprintf (stream, "	    NIOS2 options:\n"
	   "  -relax-all	    replace all branch and call "
	   "instructions with jmp and callr sequences\n"
	   "  -relax-section	    replace identified out of range "
	   "branches with jmp sequences (default)\n"
	   "  -no-relax		    do not replace any branches or calls\n"
	   "  -EB		    force big-endian byte ordering\n"
	   "  -EL		    force little-endian byte ordering\n"
	   "  -march=ARCH	    enable instructions from architecture ARCH\n");
}


/* This function is called once, at assembler startup time.
   It should set up all the tables, etc. that the MD part of the
   assembler will need. */
void
md_begin (void)
{
  int i;
  const char *inserted;

  switch (nios2_architecture)
    {
    default:
    case EF_NIOS2_ARCH_R1:
      bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r1);
      break;
    case EF_NIOS2_ARCH_R2:
      if (target_big_endian)
	as_fatal (_("Big-endian R2 is not supported."));
      bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r2);
      break;
    }

  /* Create and fill a hashtable for the Nios II opcodes, registers and
     arguments.  */
  nios2_opcode_hash = hash_new ();
  nios2_reg_hash = hash_new ();
  nios2_ps_hash = hash_new ();

  for (i = 0; i < nios2_num_opcodes; ++i)
    {
      inserted
	= hash_insert (nios2_opcode_hash, nios2_opcodes[i].name,
		       (PTR) & nios2_opcodes[i]);
      if (inserted != NULL)
	{
	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
		   nios2_opcodes[i].name, inserted);
	  /* Probably a memory allocation problem?  Give up now.  */
	  as_fatal (_("Broken assembler.  No assembly attempted."));
	}
    }

  for (i = 0; i < nios2_num_regs; ++i)
    {
      inserted
	= hash_insert (nios2_reg_hash, nios2_regs[i].name,
		       (PTR) & nios2_regs[i]);
      if (inserted != NULL)
	{
	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
		   nios2_regs[i].name, inserted);
	  /* Probably a memory allocation problem?  Give up now.  */
	  as_fatal (_("Broken assembler.  No assembly attempted."));
	}

    }

  for (i = 0; i < nios2_num_ps_insn_info_structs; ++i)
    {
      inserted
	= hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn,
		       (PTR) & nios2_ps_insn_info_structs[i]);
      if (inserted != NULL)
	{
	  fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
		   nios2_ps_insn_info_structs[i].pseudo_insn, inserted);
	  /* Probably a memory allocation problem?  Give up now.  */
	  as_fatal (_("Broken assembler.  No assembly attempted."));
	}
    }

  /* Assembler option defaults.  */
  nios2_as_options.noat = FALSE;
  nios2_as_options.nobreak = FALSE;

  /* Debug information is incompatible with relaxation.  */
  if (debug_type != DEBUG_UNSPECIFIED)
    nios2_as_options.relax = relax_none;

  /* Initialize the alignment data.  */
  nios2_current_align_seg = now_seg;
  nios2_last_label = NULL;
  nios2_current_align = 0;
  nios2_min_align = 2;
}


/* Assembles a single line of Nios II assembly language.  */
void
md_assemble (char *op_str)
{
  char *argstr;
  char *op_strdup = NULL;
  unsigned long saved_pinfo = 0;
  nios2_insn_infoS thisinsn;
  nios2_insn_infoS *insn = &thisinsn;
  bfd_boolean ps_error = FALSE;

  /* Make sure we are aligned on an appropriate boundary.  */
  if (nios2_current_align < nios2_min_align)
    nios2_align (nios2_min_align, NULL, nios2_last_label);
  else if (nios2_current_align > nios2_min_align)
    nios2_current_align = nios2_min_align;
  nios2_last_label = NULL;

  /* We don't want to clobber to op_str
     because we want to be able to use it in messages.  */
  op_strdup = strdup (op_str);
  insn->insn_tokens[0] = strtok (op_strdup, " ");
  argstr = strtok (NULL, "");

  /* Assemble the opcode.  */
  insn->insn_nios2_opcode = nios2_opcode_lookup (insn->insn_tokens[0]);
  insn->insn_reloc = NULL;

  if (insn->insn_nios2_opcode != NULL)
    {
      nios2_ps_insn_infoS *ps_insn = NULL;

      /* Note if we've seen a 16-bit instruction.  */
      if (insn->insn_nios2_opcode->size == 2)
	nios2_min_align = 1;

      /* Set the opcode for the instruction.  */
      insn->insn_code = insn->insn_nios2_opcode->match;
      insn->constant_bits = 0;

      /* Parse the arguments pointed to by argstr.  */
      if (nios2_mode == NIOS2_MODE_ASSEMBLE)
	nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args,
			  (char **) &insn->insn_tokens[1]);
      else
	nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args_test,
			  (char **) &insn->insn_tokens[1]);

      /* We need to preserve the MOVIA macro as this is clobbered by
	 translate_pseudo_insn.  */
      if (insn->insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA)
	saved_pinfo = NIOS2_INSN_MACRO_MOVIA;
      /* If the instruction is an pseudo-instruction, we want to replace it
	 with its real equivalent, and then continue.  */
      if ((insn->insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO)
	  == NIOS2_INSN_MACRO)
	{
	  ps_insn = nios2_translate_pseudo_insn (insn);
	  if (!ps_insn)
	    ps_error = TRUE;
	}

      /* If we found invalid pseudo-instruction syntax, the error's already
	 been diagnosed in nios2_translate_pseudo_insn, so skip
	 remaining processing.  */
      if (!ps_error)
	{
	  /* Assemble the parsed arguments into the instruction word.  */
	  nios2_assemble_args (insn);

	  /* Handle relaxation and other transformations.  */
	  if (nios2_as_options.relax != relax_none
	      && !nios2_as_options.noat
	      && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH)
	    output_ubranch (insn);
	  else if (nios2_as_options.relax != relax_none
		   && !nios2_as_options.noat
		   && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH)
	    output_cbranch (insn);
	  else if (nios2_as_options.relax == relax_all
		   && !nios2_as_options.noat
		   && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CALL
		   && insn->insn_reloc
		   && ((insn->insn_reloc->reloc_type
			== BFD_RELOC_NIOS2_CALL26)
		       || (insn->insn_reloc->reloc_type
			   == BFD_RELOC_NIOS2_CALL26_NOAT)))
	    output_call (insn);
	  else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA)
	    output_movia (insn);
	  else
	    output_insn (insn);
	  if (ps_insn)
	    nios2_cleanup_pseudo_insn (insn, ps_insn);
	}
    }
  else
    /* Unrecognised instruction - error.  */
    as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]);

  /* Don't leak memory.  */
  free (op_strdup);
}

/* Round up section size.  */
valueT
md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT size)
{
  /* I think byte alignment is fine here.  */
  return size;
}

/* Implement TC_FORCE_RELOCATION.  */
int
nios2_force_relocation (fixS *fixp)
{
  if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
      || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
      || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN)
    return 1;

  return generic_force_reloc (fixp);
}

/* Implement tc_fix_adjustable.  */
int
nios2_fix_adjustable (fixS *fixp)
{
  if (fixp->fx_addsy == NULL)
    return 1;

#ifdef OBJ_ELF
  /* Prevent all adjustments to global symbols.  */
  if (OUTPUT_FLAVOR == bfd_target_elf_flavour
      && (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
    return 0;
#endif
  if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
      || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
    return 0;

  /* Preserve relocations against symbols with function type.  */
  if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION)
    return 0;

  /* Don't allow symbols to be discarded on GOT related relocs.  */
  if (fixp->fx_r_type == BFD_RELOC_NIOS2_GOT16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
      || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPMOD
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
      || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_TPREL
      || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
      || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
      || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
      || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
      || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
      )
    return 0;

  return 1;
}

/* Implement tc_frob_symbol.  This is called in adjust_reloc_syms;
   it is used to remove *ABS* references from the symbol table.  */
int
nios2_frob_symbol (symbolS *symp)
{
  if ((OUTPUT_FLAVOR == bfd_target_elf_flavour
       && symp == section_symbol (absolute_section))
      || !S_IS_DEFINED (symp))
    return 1;
  else
    return 0;
}

/* The function tc_gen_reloc creates a relocation structure for the
   fixup fixp, and returns a pointer to it.  This structure is passed
   to bfd_install_relocation so that it can be written to the object
   file for linking.  */
arelent *
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
{
  arelent *reloc = XNEW (arelent);
  reloc->sym_ptr_ptr = XNEW (asymbol *);
  *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);

  reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
  reloc->addend = fixp->fx_offset;  /* fixp->fx_addnumber; */

  if (fixp->fx_pcrel)
    {
      switch (fixp->fx_r_type)
	{
	case BFD_RELOC_16:
	  fixp->fx_r_type = BFD_RELOC_16_PCREL;
	  break;
	case BFD_RELOC_NIOS2_LO16:
	  fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_LO;
	  break;
	case BFD_RELOC_NIOS2_HIADJ16:
	  fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_HA;
	  break;
	default:
	  break;
	}
    }

  reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
  if (reloc->howto == NULL)
    {
      as_bad_where (fixp->fx_file, fixp->fx_line,
		    _("can't represent relocation type %s"),
		    bfd_get_reloc_code_name (fixp->fx_r_type));

      /* Set howto to a garbage value so that we can keep going.  */
      reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
      gas_assert (reloc->howto != NULL);
    }
  return reloc;
}

long
md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
{
  return 0;
}

/* Called just before the assembler exits.  */
void
md_end (void)
{
  /* FIXME - not yet implemented */
}

/* Under ELF we need to default _GLOBAL_OFFSET_TABLE.
   Otherwise we have no need to default values of symbols.  */
symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
{
#ifdef OBJ_ELF
  if (name[0] == '_' && name[1] == 'G'
      && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
    {
      if (!GOT_symbol)
	{
	  if (symbol_find (name))
	    as_bad ("GOT already in the symbol table");

	  GOT_symbol = symbol_new (name, undefined_section,
				   (valueT) 0, &zero_address_frag);
	}

      return GOT_symbol;
    }
#endif

  return 0;
}

/* Implement tc_frob_label.  */
void
nios2_frob_label (symbolS *lab)
{
  /* Emit dwarf information.  */
  dwarf2_emit_label (lab);

  /* Update the label's address with the current output pointer.  */
  symbol_set_frag (lab, frag_now);
  S_SET_VALUE (lab, (valueT) frag_now_fix ());

  /* Record this label for future adjustment after we find out what
     kind of data it references, and the required alignment therewith.  */
  nios2_last_label = lab;
}

/* Implement md_cons_align.  */
void
nios2_cons_align (int size)
{
  int log_size = 0;
  const char *pfill = NULL;

  while ((size >>= 1) != 0)
    ++log_size;

  if (subseg_text_p (now_seg))
    pfill = (const char *) nop32;
  else
    pfill = NULL;

  if (nios2_auto_align_on)
    nios2_align (log_size, pfill, NULL);

  nios2_last_label = NULL;
}

/* Map 's' to SHF_NIOS2_GPREL.  */
/* This is from the Alpha code tc-alpha.c.  */
int
nios2_elf_section_letter (int letter, const char **ptr_msg)
{
  if (letter == 's')
    return SHF_NIOS2_GPREL;

  *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
  return -1;
}

/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA.  */
/* This is from the Alpha code tc-alpha.c.  */
flagword
nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED)
{
  if (attr & SHF_NIOS2_GPREL)
    flags |= SEC_SMALL_DATA;
  return flags;
}

/* Implement TC_PARSE_CONS_EXPRESSION to handle %tls_ldo(...) */
bfd_reloc_code_real_type
nios2_cons (expressionS *exp, int size)
{
  bfd_reloc_code_real_type nios2_tls_ldo_reloc = BFD_RELOC_NONE;

  SKIP_WHITESPACE ();
  if (input_line_pointer[0] == '%')
    {
      if (strprefix (input_line_pointer + 1, "tls_ldo"))
	{
	  if (size != 4)
	    as_bad (_("Illegal operands: %%tls_ldo in %d-byte data field"),
		    size);
	  else
	    {
	      input_line_pointer += 8;
	      nios2_tls_ldo_reloc = BFD_RELOC_NIOS2_TLS_DTPREL;
	    }
	}
      if (nios2_tls_ldo_reloc != BFD_RELOC_NONE)
	{
	  SKIP_WHITESPACE ();
	  if (input_line_pointer[0] != '(')
	    as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
	  else
	    {
	      int c;
	      char *end = ++input_line_pointer;
	      int npar = 0;

	      for (c = *end; !is_end_of_line[c]; end++, c = *end)
		if (c == '(')
		  npar++;
		else if (c == ')')
		  {
		    if (!npar)
		      break;
		    npar--;
		  }

	      if (c != ')')
		as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
	      else
		{
		  *end = '\0';
		  expression (exp);
		  *end = c;
		  if (input_line_pointer != end)
		    as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
		  else
		    {
		      input_line_pointer++;
		      SKIP_WHITESPACE ();
		      c = *input_line_pointer;
		      if (! is_end_of_line[c] && c != ',')
			as_bad (_("Illegal operands: garbage after %%tls_ldo()"));
		    }
		}
	    }
	}
    }
  if (nios2_tls_ldo_reloc == BFD_RELOC_NONE)
    expression (exp);
  return nios2_tls_ldo_reloc;
}

/* Implement HANDLE_ALIGN.  */
void
nios2_handle_align (fragS *fragp)
{
  /* If we are expecting to relax in the linker, then we must output a
     relocation to tell the linker we are aligning code.  */
  if (nios2_as_options.relax == relax_all
      && (fragp->fr_type == rs_align || fragp->fr_type == rs_align_code)
      && fragp->fr_address + fragp->fr_fix > 0
      && fragp->fr_offset > 1
      && now_seg != bss_section)
    fix_new (fragp, fragp->fr_fix, 0, &abs_symbol, fragp->fr_offset, 0,
	     BFD_RELOC_NIOS2_ALIGN);
}

/* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2
   register number.  */
int
nios2_regname_to_dw2regnum (char *regname)
{
  struct nios2_reg *r = nios2_reg_lookup (regname);
  if (r == NULL)
    return -1;
  return r->index;
}

/* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2
   unwind information for this procedure.  */
void
nios2_frame_initial_instructions (void)
{
  cfi_add_CFA_def_cfa (27, 0);
}

#ifdef OBJ_ELF
/* Some special processing for a Nios II ELF file.  */

void
nios2_elf_final_processing (void)
{
  elf_elfheader (stdoutput)->e_flags = nios2_architecture;
}
#endif