From 5e43a46efc48eeb4951f498b227aee5eb71c137b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 7 Dec 2023 06:22:32 -0700 Subject: sim: m32r: add more cgen prototypes to enable -Werror in most files --- sim/Makefile.in | 11 ----------- sim/m32r/local.mk | 11 ----------- sim/m32r/m32r-sim.h | 29 +++++++++++++++++++++++++++-- 3 files changed, 27 insertions(+), 24 deletions(-) (limited to 'sim') diff --git a/sim/Makefile.in b/sim/Makefile.in index ec24aa1..7fa32b8 100644 --- a/sim/Makefile.in +++ b/sim/Makefile.in @@ -2472,17 +2472,6 @@ testsuite_common_CPPFLAGS = \ # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable # leak detection while running it. @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT) -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpu2.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_cpux.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32r2.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_m32rx.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloop2.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_mloopx.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sem.o = -Wno-error -@SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_sim_if.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@AM_CFLAGS_m32r_traps.o = -Wno-error @SIM_ENABLE_ARCH_m32r_TRUE@nodist_m32r_libsim_a_SOURCES = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/modules.c diff --git a/sim/m32r/local.mk b/sim/m32r/local.mk index db54567..182d887 100644 --- a/sim/m32r/local.mk +++ b/sim/m32r/local.mk @@ -17,17 +17,6 @@ ## along with this program. If not, see . ## Some modules don't build cleanly yet. -AM_CFLAGS_%C%_cpu.o = -Wno-error -AM_CFLAGS_%C%_cpu2.o = -Wno-error -AM_CFLAGS_%C%_cpux.o = -Wno-error -AM_CFLAGS_%C%_m32r.o = -Wno-error -AM_CFLAGS_%C%_m32r2.o = -Wno-error -AM_CFLAGS_%C%_m32rx.o = -Wno-error -AM_CFLAGS_%C%_mloop.o = -Wno-error -AM_CFLAGS_%C%_mloop2.o = -Wno-error -AM_CFLAGS_%C%_mloopx.o = -Wno-error -AM_CFLAGS_%C%_sem.o = -Wno-error -AM_CFLAGS_%C%_sim_if.o = -Wno-error AM_CFLAGS_%C%_traps.o = -Wno-error nodist_%C%_libsim_a_SOURCES = \ diff --git a/sim/m32r/m32r-sim.h b/sim/m32r/m32r-sim.h index 0e1bf82..c72be52 100644 --- a/sim/m32r/m32r-sim.h +++ b/sim/m32r/m32r-sim.h @@ -39,24 +39,42 @@ extern int m32r_decode_gdb_ctrl_regnum (int); +/* The other cpu cores reuse m32rbf funcs to avoid duplication, but they don't + provide externs to access, and we can't e.g. include decode.h in decodex.h + because of all the redefinitions of cgen macros. */ + +extern void m32rbf_model_insn_before (SIM_CPU *, int); +extern void m32rbf_model_insn_after (SIM_CPU *, int, int); +extern CPUREG_FETCH_FN m32rbf_fetch_register; +extern CPUREG_STORE_FN m32rbf_store_register; +extern void m32rbf_h_cr_set (SIM_CPU *, UINT, USI); + /* Cover macros for hardware accesses. FIXME: Eventually move to cgen. */ #define GET_H_SM() ((CPU (h_psw) & 0x80) != 0) -#ifndef GET_H_CR extern USI m32rbf_h_cr_get_handler (SIM_CPU *, UINT); extern void m32rbf_h_cr_set_handler (SIM_CPU *, UINT, USI); +extern USI m32r2f_h_cr_get_handler (SIM_CPU *, UINT); +extern void m32r2f_h_cr_set_handler (SIM_CPU *, UINT, USI); +extern USI m32rxf_h_cr_get_handler (SIM_CPU *, UINT); +extern void m32rxf_h_cr_set_handler (SIM_CPU *, UINT, USI); +#ifndef GET_H_CR #define GET_H_CR(regno) \ XCONCAT2 (WANT_CPU,_h_cr_get_handler) (current_cpu, (regno)) #define SET_H_CR(regno, val) \ XCONCAT2 (WANT_CPU,_h_cr_set_handler) (current_cpu, (regno), (val)) #endif -#ifndef GET_H_PSW extern UQI m32rbf_h_psw_get_handler (SIM_CPU *); extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); +extern UQI m32r2f_h_psw_get_handler (SIM_CPU *); +extern void m32r2f_h_psw_set_handler (SIM_CPU *, UQI); +extern UQI m32rxf_h_psw_get_handler (SIM_CPU *); +extern void m32rxf_h_psw_set_handler (SIM_CPU *, UQI); +#ifndef GET_H_PSW #define GET_H_PSW() \ XCONCAT2 (WANT_CPU,_h_psw_get_handler) (current_cpu) #define SET_H_PSW(val) \ @@ -72,8 +90,15 @@ extern void m32rbf_h_psw_set_handler (SIM_CPU *, UQI); prototypes for each of the functions it generates. */ extern DI m32rbf_h_accum_get_handler (SIM_CPU *); extern void m32rbf_h_accum_set_handler (SIM_CPU *, DI); +extern DI m32r2f_h_accum_get_handler (SIM_CPU *); +extern void m32r2f_h_accum_set_handler (SIM_CPU *, DI); +extern DI m32rxf_h_accum_get_handler (SIM_CPU *); +extern void m32rxf_h_accum_set_handler (SIM_CPU *, DI); + extern DI m32r2f_h_accums_get_handler (SIM_CPU *, UINT); extern void m32r2f_h_accums_set_handler (SIM_CPU *, UINT, DI); +extern DI m32rxf_h_accums_get_handler (SIM_CPU *, UINT); +extern void m32rxf_h_accums_set_handler (SIM_CPU *, UINT, DI); #ifndef GET_H_ACCUM #define GET_H_ACCUM() \ -- cgit v1.1