From 40776d192726ae0ed6fde0e9f29f0a9ad52f748b Mon Sep 17 00:00:00 2001 From: Sergio Durigan Junior Date: Wed, 9 Oct 2013 21:42:11 +0000 Subject: sim/erc32/ChangeLog: 2013-10-09 Sergio Durigan Junior PR sim/16018: * float.c (set_fsr): Add missing "break" statements. Reindent code. --- sim/erc32/ChangeLog | 6 ++++++ sim/erc32/float.c | 13 ++++++++++--- 2 files changed, 16 insertions(+), 3 deletions(-) (limited to 'sim') diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index 4fff0da..d7266fd 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,3 +1,9 @@ +2013-10-09 Sergio Durigan Junior + + PR sim/16018: + * float.c (set_fsr): Add missing "break" statements. Reindent + code. + 2013-09-23 Alan Modra * configure: Regenerate. diff --git a/sim/erc32/float.c b/sim/erc32/float.c index c1a46f8..1b8f0fc 100644 --- a/sim/erc32/float.c +++ b/sim/erc32/float.c @@ -91,9 +91,16 @@ uint32 fsr; fsr >>= 30; switch (fsr) { case 0: - case 2: break; - case 1: fsr = 3; - case 3: fsr = 1; + case 2: + break; + + case 1: + fsr = 3; + break; + + case 3: + fsr = 1; + break; } rawfsr = _get_cw(); rawfsr |= (fsr << 10) | 0x3ff; -- cgit v1.1