From 218366690f0e29bf88bd6e73863f75510191406e Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 23 Dec 2022 00:10:35 -0500 Subject: sim: bfin: move arch-specific settings to internal header There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so drop the bfin.h include and move the remaining bfin-specific settings into it. --- sim/bfin/bfin-sim.c | 2 ++ sim/bfin/bfin-sim.h | 29 +++++++++++++++++++++++++++++ sim/bfin/devices.h | 2 ++ sim/bfin/dv-bfin_pll.c | 1 - sim/bfin/interp.c | 3 +++ sim/bfin/machs.c | 3 +++ sim/bfin/sim-main.h | 36 ------------------------------------ 7 files changed, 39 insertions(+), 37 deletions(-) (limited to 'sim') diff --git a/sim/bfin/bfin-sim.c b/sim/bfin/bfin-sim.c index 37ac5ce..75c6e7c 100644 --- a/sim/bfin/bfin-sim.c +++ b/sim/bfin/bfin-sim.c @@ -29,6 +29,8 @@ #include "ansidecl.h" #include "opcode/bfin.h" #include "sim-main.h" +#include "arch.h" +#include "bfin-sim.h" #include "dv-bfin_cec.h" #include "dv-bfin_mmu.h" diff --git a/sim/bfin/bfin-sim.h b/sim/bfin/bfin-sim.h index 36b9e02..b6573c9 100644 --- a/sim/bfin/bfin-sim.h +++ b/sim/bfin/bfin-sim.h @@ -35,6 +35,8 @@ typedef int32_t bs32; typedef int64_t bs40; typedef int64_t bs64; +#include "machs.h" + /* For dealing with parallel instructions, we must avoid changing our register file until all parallel insns have been simulated. This queue of stores can be used to delay a modification. @@ -359,4 +361,31 @@ extern bu32 hwloop_get_next_pc (SIM_CPU *, bu32, bu32); #define BFIN_L1_CACHE_BYTES 32 +#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu)) +#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd)) + +#include "dv-bfin_trace.h" + +#undef CLAMP +#define CLAMP(a, b, c) min (max (a, b), c) + +/* TODO: Move all this trace logic to the common code. */ +#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \ + do { \ + TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \ + map == exec_map ? 'I' : 'D', \ + map == write_map ? "STORE" : "FETCH", \ + size, addr, size * 2, val); \ + PROFILE_COUNT_CORE (cpu, addr, size, map); \ + } while (0) +#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \ + do { \ + TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \ + if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \ + bfin_trace_queue (cpu, oldpc, newpc, hwloop); \ + } while (0) + +/* Default memory size. */ +#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024) + #endif diff --git a/sim/bfin/devices.h b/sim/bfin/devices.h index b772aa2..348df3c 100644 --- a/sim/bfin/devices.h +++ b/sim/bfin/devices.h @@ -26,6 +26,8 @@ #include "hw-device.h" #include "hw-tree.h" +#include "bfin-sim.h" + /* We keep the same inital structure layout with DMA enabled devices. */ struct dv_bfin { bu32 base; diff --git a/sim/bfin/dv-bfin_pll.c b/sim/bfin/dv-bfin_pll.c index 97b9dc1..dc6627a 100644 --- a/sim/bfin/dv-bfin_pll.c +++ b/sim/bfin/dv-bfin_pll.c @@ -22,7 +22,6 @@ #include "defs.h" #include "sim-main.h" -#include "machs.h" #include "devices.h" #include "dv-bfin_pll.h" diff --git a/sim/bfin/interp.c b/sim/bfin/interp.c index 493c3b6..04c1773 100644 --- a/sim/bfin/interp.c +++ b/sim/bfin/interp.c @@ -34,9 +34,12 @@ #include "sim/callback.h" #include "gdb/signals.h" #include "sim-main.h" +#include "sim-options.h" #include "sim-syscall.h" #include "sim-hw.h" +#include "bfin-sim.h" + /* The numbers here do not matter. They just need to be unique. They also need not be static across releases -- they're used internally only. The mapping from the Linux ABI to the CB values is in linux-targ-map.h. */ diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c index adc0eb3..acb2613 100644 --- a/sim/bfin/machs.c +++ b/sim/bfin/machs.c @@ -28,7 +28,10 @@ #include "bfd.h" #include "sim-hw.h" +#include "sim-options.h" + #include "devices.h" +#include "arch.h" #include "dv-bfin_cec.h" #include "dv-bfin_dmac.h" diff --git a/sim/bfin/sim-main.h b/sim/bfin/sim-main.h index a3855f3..65ba925 100644 --- a/sim/bfin/sim-main.h +++ b/sim/bfin/sim-main.h @@ -22,42 +22,6 @@ #define _BFIN_MAIN_SIM_H_ #include "sim-basics.h" -#include "arch.h" #include "sim-base.h" -#include "bfin-sim.h" - -#include "machs.h" - -#define BFIN_CPU_STATE (*(struct bfin_cpu_state *) CPU_ARCH_DATA (cpu)) -#define STATE_BOARD_DATA(sd) ((struct bfin_board_data *) STATE_ARCH_DATA (sd)) - -#include "sim-config.h" -#include "sim-types.h" -#include "sim-engine.h" -#include "sim-options.h" -#include "dv-bfin_trace.h" - -#undef CLAMP -#define CLAMP(a, b, c) min (max (a, b), c) - -/* TODO: Move all this trace logic to the common code. */ -#define BFIN_TRACE_CORE(cpu, addr, size, map, val) \ - do { \ - TRACE_CORE (cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \ - map == exec_map ? 'I' : 'D', \ - map == write_map ? "STORE" : "FETCH", \ - size, addr, size * 2, val); \ - PROFILE_COUNT_CORE (cpu, addr, size, map); \ - } while (0) -#define BFIN_TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \ - do { \ - TRACE_BRANCH (cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \ - if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \ - bfin_trace_queue (cpu, oldpc, newpc, hwloop); \ - } while (0) - -/* Default memory size. */ -#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024) - #endif -- cgit v1.1