From 02131c7ff660a5ca08147899429e6e7780d737aa Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 28 Mar 2015 14:55:11 -0400 Subject: sim: sh: fix broken handling in DSR reg A missing */ caused a case statement to be incorrect masked out which also hide an error where the wrong value was being checked. Fix both. --- sim/sh/ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'sim/sh/ChangeLog') diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index 3e0fff1..46b8e53 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,5 +1,9 @@ 2015-03-28 Mike Frysinger + * gencode.c (ppi_gensim): Add missing */. Change case 4 to case 5. + +2015-03-28 Mike Frysinger + * Makefile.in (gencode): Add $(BUILD_CFLAGS), $(BUILD_LDFLAGS), and $(WARN_CFLAGS). * gencode.c: Include ctype.h, stdlib.h, string.h, and unistd.h. -- cgit v1.1