From fa8f87e53b68881c5e3aab296b517203407c4378 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 24 Jun 2015 19:37:21 +0545 Subject: sim: trace: add a basic cpu register class The bfin/msp430 ports already had trace logic set up for reading/writing cpu registers, albeit using different unrelated levels (core & vpu). Add a proper register class for these and for other ports. --- sim/msp430/ChangeLog | 5 +++++ sim/msp430/msp430-sim.c | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'sim/msp430') diff --git a/sim/msp430/ChangeLog b/sim/msp430/ChangeLog index fa59f27..08da33d 100644 --- a/sim/msp430/ChangeLog +++ b/sim/msp430/ChangeLog @@ -1,3 +1,8 @@ +2015-06-24 Mike Frysinger + + * msp430-sim.c (trace_reg_put): Change TRACE_VPU to TRACE_REGISTER. + (trace_reg_get): Likewise. + 2015-06-23 Mike Frysinger * configure: Regenerate. diff --git a/sim/msp430/msp430-sim.c b/sim/msp430/msp430-sim.c index 931573e..f32cb69 100644 --- a/sim/msp430/msp430-sim.c +++ b/sim/msp430/msp430-sim.c @@ -303,14 +303,14 @@ register_names[] = static void trace_reg_put (SIM_DESC sd, int n, unsigned int v) { - TRACE_VPU (MSP430_CPU (sd), "PUT: %#x -> %s", v, register_names[n]); + TRACE_REGISTER (MSP430_CPU (sd), "PUT: %#x -> %s", v, register_names[n]); REG (n) = v; } static unsigned int trace_reg_get (SIM_DESC sd, int n) { - TRACE_VPU (MSP430_CPU (sd), "GET: %s -> %#x", register_names[n], REG (n)); + TRACE_REGISTER (MSP430_CPU (sd), "GET: %s -> %#x", register_names[n], REG (n)); return REG (n); } -- cgit v1.1