From f3c08b7e1630192a2a4bc9ddad4e46cd9e8d8ebc Mon Sep 17 00:00:00 2001 From: Chris Demetriou Date: Sat, 8 Jun 2002 03:05:23 +0000 Subject: 2002-06-07 Chris Demetriou Ed Satterthwaite * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt) (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions. * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd) (fp_nmsub): New prototypes. (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd) (NegMultiplySub): New defines. * mips.igen (RSQRT.fmt): Use RSquareRoot(). (MADD.D, MADD.S): Replace with... (MADD.fmt): New instruction. (MSUB.D, MSUB.S): Replace with... (MSUB.fmt): New instruction. (NMADD.D, NMADD.S): Replace with... (NMADD.fmt): New instruction. (NMSUB.D, MSUB.S): Replace with... (NMSUB.fmt): New instruction. --- sim/mips/mips.igen | 103 +++++++++++++++-------------------------------------- 1 file changed, 29 insertions(+), 74 deletions(-) (limited to 'sim/mips/mips.igen') diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index f374a54..13f6776 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -4198,34 +4198,19 @@ -// -// FIXME: Not correct for mips* -// -010011,5.FR,5.FT,5.FS,5.FD,100,001:COP1X:32,f::MADD.D -"madd.d f, f, f, f" -*mipsIV: -*mipsV: -*mips64: -*vr5000: -{ - check_fpu (SD_); - { - StoreFPR(FD,fmt_double,Add(Multiply(ValueFPR(FS,fmt_double),ValueFPR(FT,fmt_double),fmt_double),ValueFPR(FR,fmt_double),fmt_double)); - } -} - - -010011,5.FR,5.FT,5.FS,5.FD,100,000:COP1X:32,f::MADD.S -"madd.s f, f, f, f" +010011,5.FR,5.FT,5.FS,5.FD,100,3.FMT:COP1X:64,f::MADD.fmt +"madd.%s f, f, f, f" *mipsIV: *mipsV: *mips64: *vr5000: { + int fmt = FMT; check_fpu (SD_); - { - StoreFPR(FD,fmt_single,Add(Multiply(ValueFPR(FS,fmt_single),ValueFPR(FT,fmt_single),fmt_single),ValueFPR(FR,fmt_single),fmt_single)); - } + check_u64 (SD_, instruction_0); + check_fmt_p (SD_, fmt, instruction_0); + StoreFPR (FD, fmt, MultiplyAdd (ValueFPR (FS, fmt), ValueFPR (FT, fmt), + ValueFPR (FR, fmt), fmt)); } @@ -4354,29 +4339,19 @@ } -// MSUB.fmt -010011,5.FR,5.FT,5.FS,5.FD,101,001:COP1X:32,f::MSUB.D -"msub.d f, f, f, f" -*mipsIV: -*mipsV: -*mips64: -*vr5000: -{ - check_fpu (SD_); - StoreFPR(FD,fmt_double,Sub(Multiply(ValueFPR(FS,fmt_double),ValueFPR(FT,fmt_double),fmt_double),ValueFPR(FR,fmt_double),fmt_double)); -} - - -// MSUB.fmt -010011,5.FR,5.FT,5.FS,5.FD,101000:COP1X:32,f::MSUB.S -"msub.s f, f, f, f" +010011,5.FR,5.FT,5.FS,5.FD,101,3.FMT:COP1X:64,f::MSUB.fmt +"msub.%s f, f, f, f" *mipsIV: *mipsV: *mips64: *vr5000: { + int fmt = FMT; check_fpu (SD_); - StoreFPR(FD,fmt_single,Sub(Multiply(ValueFPR(FS,fmt_single),ValueFPR(FT,fmt_single),fmt_single),ValueFPR(FR,fmt_single),fmt_single)); + check_u64 (SD_, instruction_0); + check_fmt_p (SD_, fmt, instruction_0); + StoreFPR (FD, fmt, MultiplySub (ValueFPR (FS, fmt), ValueFPR (FT, fmt), + ValueFPR (FR, fmt), fmt)); } @@ -4449,55 +4424,35 @@ } -// NMADD.fmt -010011,5.FR,5.FT,5.FS,5.FD,110001:COP1X:32,f::NMADD.D -"nmadd.d f, f, f, f" -*mipsIV: -*mipsV: -*mips64: -*vr5000: -{ - check_fpu (SD_); - StoreFPR(FD,fmt_double,Negate(Add(Multiply(ValueFPR(FS,fmt_double),ValueFPR(FT,fmt_double),fmt_double),ValueFPR(FR,fmt_double),fmt_double),fmt_double)); -} - - -// NMADD.fmt -010011,5.FR,5.FT,5.FS,5.FD,110000:COP1X:32,f::NMADD.S -"nmadd.s f, f, f, f" -*mipsIV: -*mipsV: -*mips64: -*vr5000: -{ - check_fpu (SD_); - StoreFPR(FD,fmt_single,Negate(Add(Multiply(ValueFPR(FS,fmt_single),ValueFPR(FT,fmt_single),fmt_single),ValueFPR(FR,fmt_single),fmt_single),fmt_single)); -} - - -// NMSUB.fmt -010011,5.FR,5.FT,5.FS,5.FD,111001:COP1X:32,f::NMSUB.D -"nmsub.d f, f, f, f" +010011,5.FR,5.FT,5.FS,5.FD,110,3.FMT:COP1X:64,f::NMADD.fmt +"nmadd.%s f, f, f, f" *mipsIV: *mipsV: *mips64: *vr5000: { + int fmt = FMT; check_fpu (SD_); - StoreFPR(FD,fmt_double,Negate(Sub(Multiply(ValueFPR(FS,fmt_double),ValueFPR(FT,fmt_double),fmt_double),ValueFPR(FR,fmt_double),fmt_double),fmt_double)); + check_u64 (SD_, instruction_0); + check_fmt_p (SD_, fmt, instruction_0); + StoreFPR (FD, fmt, NegMultiplyAdd (ValueFPR (FS, fmt), ValueFPR (FT, fmt), + ValueFPR (FR, fmt), fmt)); } -// NMSUB.fmt -010011,5.FR,5.FT,5.FS,5.FD,111000:COP1X:32,f::NMSUB.S -"nmsub.s f, f, f, f" +010011,5.FR,5.FT,5.FS,5.FD,111,3.FMT:COP1X:64,f::NMSUB.fmt +"nmsub.%s f, f, f, f" *mipsIV: *mipsV: *mips64: *vr5000: { + int fmt = FMT; check_fpu (SD_); - StoreFPR(FD,fmt_single,Negate(Sub(Multiply(ValueFPR(FS,fmt_single),ValueFPR(FT,fmt_single),fmt_single),ValueFPR(FR,fmt_single),fmt_single),fmt_single)); + check_u64 (SD_, instruction_0); + check_fmt_p (SD_, fmt, instruction_0); + StoreFPR (FD, fmt, NegMultiplySub (ValueFPR (FS, fmt), ValueFPR (FT, fmt), + ValueFPR (FR, fmt), fmt)); } @@ -4579,7 +4534,7 @@ int fmt = FMT; check_fpu (SD_); check_fmt (SD_, fmt, instruction_0); - StoreFPR(FD,fmt,Recip(SquareRoot(ValueFPR(FS,fmt),fmt),fmt)); + StoreFPR (FD, fmt, RSquareRoot (ValueFPR (FS, fmt), fmt)); } -- cgit v1.1