From e930b1f54ff2768c5818eb0a450b1d98d46d273d Mon Sep 17 00:00:00 2001 From: Dave Brolley Date: Wed, 8 Oct 2003 18:19:33 +0000 Subject: 2003-10-06 Dave Brolley * profile-fr550.[ch]: New files. * configure.in: Move frv handling to alphabetically correct placement. * Makefile.in: Add fr550 support. * frv-sim.h,frv.c,interrups.c,memory.c,mloop.in,pipeline.c, profile.[ch],registers.c,traps.c: Add fr550 support. * arch.c,arch.h,cpu.c,cpu.h,cpuall.h,model.h,decode.c,decode.h,sem.c: Regenerate. --- sim/frv/registers.c | 1442 ++++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 1309 insertions(+), 133 deletions(-) (limited to 'sim/frv/registers.c') diff --git a/sim/frv/registers.c b/sim/frv/registers.c index 2b76630..685e53f 100644 --- a/sim/frv/registers.c +++ b/sim/frv/registers.c @@ -165,10 +165,13 @@ static FRV_SPR_CONTROL_INFO frv_spr[] = {0x00000000, 0x00000000, 0x00000000, 0x00000003, IMPL, USER}, /* LR */ {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* LCR */ - /* spr registers 274-287 are reserved */ + /* spr registers 274-279 and 282-287 are reserved. */ + /* spr registers 280 and 281 are iacc0h and iacc0l (fr405). */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* IACC0H */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* IACC0L */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, {0xe0000021, 0x20000000, 0xe0000000, 0xffffffc2, IMPL, USER}, /* ISR */ @@ -3055,11 +3058,11 @@ static FRV_SPR_CONTROL_INFO fr500_spr[] = RESERVED }; -/* SPR definitions for the fr400 machine. - See the FR400 LSI for implementation details. */ -static FRV_SPR_CONTROL_INFO fr400_spr[] = +/* SPR definitions for the fr550 machine. + See the FR550 LSI for implementation details. */ +static FRV_SPR_CONTROL_INFO fr550_spr[] = { - {0x200030fe, 0x200030fc, 0xf00030fd, 0xffffff80, IMPL, SUP}, /* PSR */ + {0x3000107e, 0x3000107c, 0xff0071fd, 0xffff9e00, IMPL, SUP}, /* PSR */ {0x00000000, 0x00000000, 0x00000003, 0x00000003, IMPL, SUP}, /* PCSR */ {0x00000000, 0x00000000, 0xffffffff, 0x00000003, IMPL, SUP}, /* BPCSR */ {0x00000000, 0x00000000, 0x0000000f, 0x000007ff, IMPL, SUP}, /* TBR */ @@ -3070,9 +3073,9 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x00000d40, 0x00000d40, 0xcc400fc0, 0x317feff8, IMPL, SUP}, /* HSR0 */ + {0x000003c0, 0x00000000, 0xce000c00, 0x313fec38, IMPL, SUP}, /* HSR0 */ - /* HSR1-63 are unimplemented on the fr400. */ + /* HSR1-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3147,7 +3150,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x20000021, 0x20000000, 0xa0000000, 0xffffffc2, IMPL, USER}, /* ISR */ + {0x20000030, 0x20000000, 0xa0000000, 0xffffffd3, IMPL, USER}, /* ISR */ /* spr registers 289-351 are reserved */ RESERVED, @@ -3165,7 +3168,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* NEEAR0-31 are unimplemented on the fr400. */ + /* NEEAR0-31 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3174,7 +3177,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* NESR0-31 are unimplemented on the fr400. */ + /* NESR0-31 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3183,7 +3186,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* NECR is unimplemented on the fr400. */ + /* NECR is unimplemented on the fr550. */ RESERVED, /* spr registers 417-431 are reserved */ @@ -3192,8 +3195,10 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* GNER0, GNER1, FNER0, FNER1 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* GNER0 */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* GNER1 */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* FNER0 */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* FNER1 */ /* spr registers 436-511 are reserved */ RESERVED, RESERVED, RESERVED, RESERVED, @@ -3214,8 +3219,16 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EPCR0 */ + RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EPCR2 */ - /* EPCR1-63 are unimplemented on the fr400. */ + /* EPCR3-7 are unimplemented on the fr550. */ + RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EPCR8 */ + + /* EPCR9-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3227,20 +3240,26 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, {0x00000100, 0x00000100, 0x00000100, 0xffffffff, IMPL, SUP}, /* ESR0 */ + RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESR2 */ - /* ESR1-13 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* ESR3-7 are unimplemented on the fr550. */ + RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000200, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESR8 */ + + /* ESR9-13 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESR14 */ - {0x00000800, 0x00000800, 0x00000800, 0xffffffff, IMPL, SUP}, + {0x00000020, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* ESR16-63 are unimplemented on the fr400. */ + /* ESR16-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3252,7 +3271,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* EIR0-31 are unimplemented on the fr400. */ + /* EIR0-31 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3261,9 +3280,8 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* ESFR0 is unimplemented on the fr400. */ + /* ESFR0 is unimplemented on the fr550. */ RESERVED, - {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESFR1 */ /* spr registers 674-767 are reserved */ @@ -3288,7 +3306,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* SR0-3 ARE unimplemented on the fr400. */ + /* SR0-SR3 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, /* spr registers 772-1023 are reserved */ @@ -3344,7 +3362,9 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* FSR0-63 are unimplemented on the fr400. */ + {0x00800000, 0x00800000, 0xc0e00000, 0xc0fe03ff, IMPL, USER}, /* FSR0 */ + + /* FSR1-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3357,10 +3377,11 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, - /* FQ0-31 are unimplemented on the fr400. */ + /* FQ0-31 are unimplemented on the fr550. */ /* Each FQ register is a pair of 32 bit registers. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3373,7 +3394,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, /* spr registers 1152-1271 are reserved */ RESERVED, RESERVED, RESERVED, @@ -3402,18 +3423,17 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* MCILR0-1 are unimplemented on the fr400. */ + /* MCILR0-1 are unimplemented on the fr550. */ RESERVED, RESERVED, /* spr registers 1274-1279 are reserved */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x00000000, 0x00000000, 0x01c00000, 0x0fff8fc0, IMPL, USER}, /* MSR0 */ - {0x00000000, 0x00000000, 0x00000000, 0xffffffcd, IMPL, USER}, + {0x00001002, 0x00000000, 0x01e00000, 0x07ffffc2, IMPL, USER}, /* MSR0 */ - /* MSR2-63 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, + /* MSR1-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3427,7 +3447,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* MQ0-31 are unimplemented on the fr400. */ + /* MQ0-31 are unimplemented on the fr550. */ /* Each MQ register is a pair of 32 bit registers. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3449,10 +3469,13 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, /* ACC7 */ - /* ACC4-63 are unimplemented on the fr400. */ - RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* ACC8-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3471,10 +3494,13 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, /* ACCG7 */ - /* ACCG4-63 are unimplemented on the fr400. */ - RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* ACCG8-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3487,14 +3513,19 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* EAR0-14 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* EAR0-7 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EAR8 */ + + /* EAR9-14 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EAR15 */ - /* EAR16-63 are unimplemented on the fr400. */ + /* EAR16-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3506,7 +3537,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* EDR0-63 are unimplemented on the fr400. */ + /* EDR0-63 are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3521,11 +3552,25 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* IAMLR0-63 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* IAMLR0 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* IAMLR8 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* IAMLR15 */ + + /* IAMLR16-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3536,19 +3581,25 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, /* IAMPR0 */ - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, /* IAMPR7 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* IAMPR0 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* IAMPR8 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* IAMPR15 */ - /* IAMPR08-63 are unimplemented on the fr400. */ - RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* IAMPR16-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3559,11 +3610,25 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* DAMLR0-63 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* DAMLR0 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* DAMLR8 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fffff, IMPL, SUP}, /* DAMLR15 */ + + /* DAMLR16-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3574,19 +3639,25 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, /* DAMPR0 */ - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, - {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, /* DAMPR7 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* DAMPR0 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* DAMPR8 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff00, IMPL, SUP}, /* DAMPR15 */ - /* DAMPR08-63 are unimplemented on the fr400. */ - RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* DAMPR16-63 are unimplemented on the fr550. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -3597,9 +3668,9 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - {0x00000808, 0x00000808, 0x00000808, 0xffffffff, IMPL, SUP}, /* AMCR */ + {0x00001010, 0x00001010, 0x0000ffff, 0xffffffff, IMPL, SUP}, /* AMCR */ - /* STBAR, MMCR not implemented on the fr400. */ + /* STBAR, MMCR not implemented on the fr550. */ RESERVED, RESERVED, /* spr registers 1923-2047 are reserved */ @@ -3643,55 +3714,66 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBAR0 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - - /* DBAR2-3 not implemented on the fr400. */ - RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBAR3 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR00 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBDR02-03 are unimplemented on the fr400. */ + /* DBDR02-03 are unimplemented on the fr550. */ RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR10 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBDR12-13 are unimplemented on the fr400. */ + /* DBDR12-13 are unimplemented on the fr550. */ RESERVED, RESERVED, - /* DBDR20-23 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR20 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBDR30-33 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, + /* DBDR22-23 are unimplemented on the fr550. */ + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR30 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBDR32-33 are unimplemented on the fr550. */ + RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR00 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBMR02-03 are unimplemented on the fr400. */ + /* DBMR02-03 are unimplemented on the fr550. */ RESERVED, RESERVED, {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR10 */ {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBMR12-13 are unimplemented on the fr400. */ + /* DBMR12-13 are unimplemented on the fr550. */ RESERVED, RESERVED, - /* DBMR20-23 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR20 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, - /* DBMR30-33 are unimplemented on the fr400. */ - RESERVED, RESERVED, RESERVED, RESERVED, + /* DBMR22-23 are unimplemented on the fr550. */ + RESERVED, RESERVED, - /* CPCFR, CPCR and CPSR are unimplemented on the fr400. */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR30 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBMR32-33 are unimplemented on the fr550. */ + RESERVED, RESERVED, + + /* CPCFR, CPCR and CPSR are unimplemented on the fr550. */ RESERVED, RESERVED, RESERVED, RESERVED, /* spr register 2095 */ - /* CPESR0-1 are unimplemented on the fr400. */ + /* CPESR0-1 are unimplemented on the fr550. */ RESERVED, RESERVED, - /* CPEMR0-1 are unimplemented on the fr400. */ + /* CPEMR0-1 are unimplemented on the fr550. */ RESERVED, RESERVED, /* spr registers 2100-2199 are reserved */ @@ -4068,8 +4150,7 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - /* spr registers 3800-3899 are reserved */ - RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + /* spr registers 3800-3847 are reserved */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -4079,6 +4160,12 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000001, 0x00000000, 0x00000000, 0xffff88fd, IMPL, SUP}, /* IHSR8 */ + + /* spr registers 3849-4095 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -4089,8 +4176,6 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - - /* spr registers 3900-3999 are reserved */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -4111,8 +4196,6 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, - - /* spr registers 4000-4095 are reserved */ RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, @@ -4135,22 +4218,1107 @@ static FRV_SPR_CONTROL_INFO fr400_spr[] = RESERVED }; -/* Initialize register control for this cpu */ -void -frv_register_control_init (SIM_CPU *cpu) +/* SPR definitions for the fr400 machine. + See the FR400 LSI for implementation details. */ +static FRV_SPR_CONTROL_INFO fr400_spr[] = { - FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (cpu); - SIM_DESC sd = CPU_STATE (cpu); - int mach = STATE_ARCHITECTURE (sd)->mach; + {0x200030fe, 0x200030fc, 0xf00030fd, 0xffffff80, IMPL, SUP}, /* PSR */ + {0x00000000, 0x00000000, 0x00000003, 0x00000003, IMPL, SUP}, /* PCSR */ + {0x00000000, 0x00000000, 0xffffffff, 0x00000003, IMPL, SUP}, /* BPCSR */ + {0x00000000, 0x00000000, 0x0000000f, 0x000007ff, IMPL, SUP}, /* TBR */ + {0x00000000, 0x00000000, 0x00000000, 0xffffeffe, IMPL, SUP}, /* BPSR */ - if (sizeof (fr400_spr) != FRV_MAX_SPR * sizeof (*fr400_spr)) - abort (); - if (sizeof (fr500_spr) != FRV_MAX_SPR * sizeof (*fr500_spr)) - abort (); - if (sizeof (frv_spr) != FRV_MAX_SPR * sizeof (*frv_spr)) - abort (); + /* spr registers 5-15 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, - switch (mach) + {0x00000d40, 0x00000d40, 0xcc400fc0, 0x317feff8, IMPL, SUP}, /* HSR0 */ + + /* HSR1-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 80-255 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* CCR */ + + /* spr registers 257-262 are reserved */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffff0000, IMPL, USER}, /* CCCR */ + + /* spr registers 264-271 are reserved */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000003, 0x00000003, IMPL, USER}, /* LR */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* LCR */ + + /* spr registers 274-279 and 282-287 are reserved. */ + /* spr registers 280 and 281 are iacc0h and iacc0l (fr405). */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* IACC0H */ + {0x00000000, 0x00000000, 0x00000000, 0x00000000, IMPL, USER}, /* IACC0L */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x20000021, 0x20000000, 0xa0000000, 0xffffffc2, IMPL, USER}, /* ISR */ + + /* spr registers 289-351 are reserved */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* NEEAR0-31 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* NESR0-31 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* NECR is unimplemented on the fr400. */ + RESERVED, + + /* spr registers 417-431 are reserved */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* GNER0, GNER1, FNER0, FNER1 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 436-511 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EPCR0 */ + + /* EPCR1-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000100, 0x00000100, 0x00000100, 0xffffffff, IMPL, SUP}, /* ESR0 */ + + /* ESR1-13 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESR14 */ + {0x00000800, 0x00000800, 0x00000800, 0xffffffff, IMPL, SUP}, + + /* ESR16-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* EIR0-31 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* ESFR0 is unimplemented on the fr400. */ + RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* ESFR1 */ + + /* spr registers 674-767 are reserved */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + /* SR0-3 ARE unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 772-1023 are reserved */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* FSR0-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* FQ0-31 are unimplemented on the fr400. */ + /* Each FQ register is a pair of 32 bit registers. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 1152-1271 are reserved */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, + + /* MCILR0-1 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + /* spr registers 1274-1279 are reserved */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x01c00000, 0x0fff8fc0, IMPL, USER}, /* MSR0 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffcd, IMPL, USER}, + + /* MSR2-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* MQ0-31 are unimplemented on the fr400. */ + /* Each MQ register is a pair of 32 bit registers. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* Accumulators are read-only by the user except for special + insns and side effect of other insns. */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, /* ACC0 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + + /* ACC4-63 are unimplemented on the fr400. */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* Accumulator guards are read-only by the user except for special + insns and side effect of other insns. */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, /* ACCG0 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, USER}, + + /* ACCG4-63 are unimplemented on the fr400. */ + RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* EAR0-14 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* EAR15 */ + + /* EAR16-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* EDR0-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* IAMLR0-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, /* IAMPR0 */ + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0x000fff02, IMPL, SUP}, /* IAMPR7 */ + + /* IAMPR08-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + /* DAMLR0-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, /* DAMPR0 */ + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000001, 0x000fff00, IMPL, SUP}, /* DAMPR7 */ + + /* DAMPR08-63 are unimplemented on the fr400. */ + RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000808, 0x00000808, 0x00000808, 0xffffffff, IMPL, SUP}, /* AMCR */ + + /* STBAR, MMCR not implemented on the fr400. */ + RESERVED, RESERVED, + + /* spr registers 1923-2047 are reserved */ + RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DCR */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* BRR */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* NMAR */ + + RESERVED, /* spr register 2051 */ + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* IBAR0 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* IBAR3 */ + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBAR0 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBAR2-3 not implemented on the fr400. */ + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR00 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBDR02-03 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBDR10 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBDR12-13 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + /* DBDR20-23 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + /* DBDR30-33 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR00 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBMR02-03 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, /* DBMR10 */ + {0x00000000, 0x00000000, 0x00000000, 0xffffffff, IMPL, SUP}, + + /* DBMR12-13 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + /* DBMR20-23 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + /* DBMR30-33 are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, RESERVED, + + /* CPCFR, CPCR and CPSR are unimplemented on the fr400. */ + RESERVED, RESERVED, RESERVED, + + RESERVED, /* spr register 2095 */ + + /* CPESR0-1 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + /* CPEMR0-1 are unimplemented on the fr400. */ + RESERVED, RESERVED, + + /* spr registers 2100-2199 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2200-2299 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2300-2399 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2400-2499 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2500-2599 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2600-2699 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2700-2799 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2800-2899 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 2900-2999 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3000-3099 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3100-3199 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3200-3299 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3300-3399 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3400-3499 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3500-3599 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3600-3699 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3700-3799 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3800-3899 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 3900-3999 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + + /* spr registers 4000-4095 are reserved */ + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED, RESERVED, RESERVED, RESERVED, RESERVED, + RESERVED +}; + +/* Initialize register control for this cpu */ +void +frv_register_control_init (SIM_CPU *cpu) +{ + FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (cpu); + SIM_DESC sd = CPU_STATE (cpu); + int mach = STATE_ARCHITECTURE (sd)->mach; + + if (sizeof (fr400_spr) != FRV_MAX_SPR * sizeof (*fr400_spr)) + abort (); + if (sizeof (fr500_spr) != FRV_MAX_SPR * sizeof (*fr500_spr)) + abort (); + if (sizeof (fr550_spr) != FRV_MAX_SPR * sizeof (*fr550_spr)) + abort (); + if (sizeof (frv_spr) != FRV_MAX_SPR * sizeof (*frv_spr)) + abort (); + + switch (mach) { case bfd_mach_frvtomcat: case bfd_mach_fr500: @@ -4158,6 +5326,11 @@ frv_register_control_init (SIM_CPU *cpu) control->cpr = 0; control->spr = fr500_spr; return; + case bfd_mach_fr550: + control->fr = 1; + control->cpr = 0; + control->spr = fr550_spr; + return; case bfd_mach_fr400: control->fr = 1; control->cpr = 0; @@ -4273,20 +5446,22 @@ frv_check_spr_read_access (SIM_CPU *current_cpu, UINT spr) if (! control->spr[spr].implemented) { SIM_DESC sd = CPU_STATE (current_cpu); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400) + switch (STATE_ARCHITECTURE (sd)->mach) { + case bfd_mach_fr400: /* On the fr400: if this is an unimplemented accumulator, then generate an illegal_instruction_interrupt, otherwise no interrupt. */ if (spr >= H_SPR_ACC4 && spr <= H_SPR_ACC63 || spr >= H_SPR_ACCG4 && spr <= H_SPR_ACCG63) frv_queue_program_interrupt (current_cpu, FRV_ILLEGAL_INSTRUCTION); - } - else - { - /* On other machines, it's a register_exception. */ - frv_queue_register_exception_interrupt (current_cpu, - FRV_REC_UNIMPLEMENTED); + break; + case bfd_mach_fr550: + /* No interrupt on the fr550 */ + break; + default: + frv_queue_register_exception_interrupt (current_cpu, FRV_REC_UNIMPLEMENTED); + break; } } } @@ -4364,16 +5539,17 @@ frv_check_register_access ( /* The register is not available. Generate an exception. */ sd = CPU_STATE (current_cpu); - if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400) + switch (STATE_ARCHITECTURE (sd)->mach) { - /* On the fr400 this generates an illegal_instruction interrupt. */ + case bfd_mach_fr400: + case bfd_mach_fr550: + /* On some machines this generates an illegal_instruction interrupt. */ frv_queue_program_interrupt (current_cpu, FRV_ILLEGAL_INSTRUCTION); - } - else - { + break; + default: /* On other machines, it's a register_exception. */ - frv_queue_register_exception_interrupt (current_cpu, - FRV_REC_UNIMPLEMENTED); + frv_queue_register_exception_interrupt (current_cpu, FRV_REC_UNIMPLEMENTED); + break; } return 0; } -- cgit v1.1