From dd6a37e700ab12b5f5e89b747992324e74981872 Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Tue, 29 Nov 2011 20:28:55 +0000 Subject: opcode/ 2011-11-29 Andrew Pinski * mips-dis.c (mips_arch_choices): Add Octeon+. * mips-opc.c (IOCT): Include Octeon+. (IOCTP): New macro. (mips_builtin_opcodes): Add "saa" and "saad". bfd/ 2011-11-29 Andrew Pinski * archures.c (bfd_mach_mips_octeonp): New macro. * bfd-in2.h: Regenerate. * bfd/cpu-mips.c (I_mipsocteonp): New enum value. (arch_info_struct): Add bfd_mach_mips_octeonp. * elfxx-mips.c (mips_set_isa_flags): Add bfd_mach_mips_octeonp. (mips_mach_extensions): Add bfd_mach_mips_octeonp. include/opcodes/ 2011-11-29 Andrew Pinski * mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEONP. (INSN_OCTEONP): New macro. (CPU_OCTEONP): New macro. (OPCODE_IS_MEMBER): Add Octeon+. (M_SAA_AB, M_SAAD_AB, M_SAA_OB, M_SAAD_OB): New enum values. gas/ 2011-11-29 Andrew Pinski * config/tc-mips.c (CPU_IS_OCTEON): New macro function. (CPU_HAS_SEQ): Change to use CPU_IS_OCTEON. (NO_ISA_COP): Likewise. (macro) : Add support when off0 is true. Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB. (mips_cpu_info_table): Add octeon+. * doc/c-mips.texi: Document octeon+ as an acceptable value for -march=. gas/testsuite/ 2011-11-29 Andrew Pinski * gas/mips/mips.exp: Add octeon+ for an architecture. Run octeon-saa-saad test. (run_dump_test_arch): For Octeon architectures, also try octeon@. * gas/mips/octeon-pref.d: Remove -march=octeon from command line. * gas/mips/octeon.d: Likewise. * gas/mips/octeon-saa-saad.d: New file. * gas/mips/octeon-saa-saad.s: New file --- opcodes/ChangeLog | 7 +++++++ opcodes/mips-dis.c | 4 ++++ opcodes/mips-opc.c | 9 ++++++++- 3 files changed, 19 insertions(+), 1 deletion(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 045b9ca..9458f0e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2011-11-29 Andrew Pinski + + * mips-dis.c (mips_arch_choices): Add Octeon+. + * mips-opc.c (IOCT): Include Octeon+. + (IOCTP): New macro. + (mips_builtin_opcodes): Add "saa" and "saad". + 2011-11-25 Pierre Muller * mips-dis.c (print_insn_micromips): Rename local variable iprintf diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 72285de..09714ac 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -605,6 +605,10 @@ const struct mips_arch_choice mips_arch_choices[] = ISA_MIPS64R2 | INSN_OCTEON, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + { "octeon+", 1, bfd_mach_mips_octeonp, CPU_OCTEONP, + ISA_MIPS64R2 | INSN_OCTEON | INSN_OCTEONP, mips_cp0_names_numeric, + NULL, 0, mips_hwr_names_numeric }, + { "xlr", 1, bfd_mach_mips_xlr, CPU_XLR, ISA_MIPS64 | INSN_XLR, mips_cp0_names_xlr, diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 7adf337..a0e05f5 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -121,7 +121,8 @@ #define N5 (INSN_5400 | INSN_5500) #define N54 INSN_5400 #define N55 INSN_5500 -#define IOCT INSN_OCTEON +#define IOCT (INSN_OCTEON | INSN_OCTEONP) +#define IOCTP INSN_OCTEONP #define XLR INSN_XLR #define G1 (T3 \ @@ -1247,6 +1248,12 @@ const struct mips_opcode mips_builtin_opcodes[] = {"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_D|RD_T|FP_D, RD_MACC, MX|SB1 }, {"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T, 0, N54 }, {"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_D|RD_T|FP_D, RD_MACC, MX }, +{"saa", "t,o(b)", 0, (int) M_SAA_OB, INSN_MACRO, 0, IOCTP }, +{"saa", "t,A(b)", 0, (int) M_SAA_AB, INSN_MACRO, 0, IOCTP }, +{"saa", "t,(b)", 0x70000018, 0xfc00ffff, SM|RD_t|RD_b, 0, IOCTP }, +{"saad", "t,o(b)", 0, (int) M_SAAD_OB, INSN_MACRO, 0, IOCTP }, +{"saad", "t,A(b)", 0, (int) M_SAAD_AB, INSN_MACRO, 0, IOCTP }, +{"saad", "t,(b)", 0x70000019, 0xfc00ffff, SM|RD_t|RD_b, 0, IOCTP }, {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, {"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, 0, I1 }, {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, 0, I2 }, -- cgit v1.1