From 32a946987b2c683c06d55efc2d4d7e682f164e4e Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 12 Apr 2011 16:01:48 +0000 Subject: PR binutils/12534 * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn patterns. (print_insn_thumb32): Handle %L. * gas/arm/thumb32.s: Add PC relative LDRD and STRD insns. * gas/arm/thumb32.l: Update expected output. * gas/arm/thumb32.d: Update expected disassembly. --- opcodes/ChangeLog | 7 +++++++ opcodes/arm-dis.c | 24 ++++++++++++++++++++---- 2 files changed, 27 insertions(+), 4 deletions(-) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b41a624..37151f9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2011-04-12 Nick Clifton + + PR binutils/12534 + * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn + patterns. + (print_insn_thumb32): Handle %L. + 2011-04-11 Julian Brown * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index b624ac5..c8b090b 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1336,6 +1336,7 @@ static const struct opcode16 thumb_opcodes[] = %H print a 16-bit immediate from hw2[3:0],hw1[11:0] %S print a possibly-shifted Rm + %L print address for a ldrd/strd instruction %a print the address of a plain load/store %w print the width and signedness of a core load/store %m print register mask for ldm/stm @@ -1564,10 +1565,10 @@ static const struct opcode32 thumb32_opcodes[] = {ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"}, {ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"}, {ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"}, - {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"}, - {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"}, - {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"}, - {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"}, + {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"}, + {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"}, + {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"}, + {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"}, {ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"}, {ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"}, @@ -4285,6 +4286,21 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } break; + case 'L': + /* PR binutils/12534 + If we have a PC relative offset in an LDRD or STRD + instructions then display the decoded address. */ + if (((given >> 16) & 0xf) == 0xf) + { + bfd_vma offset = (given & 0xff) * 4; + + if ((given & (1 << 23)) == 0) + offset = - offset; + func (stream, "\t; "); + info->print_address_func ((pc & ~3) + 4 + offset, info); + } + break; + default: abort (); } -- cgit v1.1