From 78933a4ad9ae9c2e274d41e6b3036ea582c47810 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 31 Mar 2021 10:36:19 +1030 Subject: Use bool in opcodes cpu/ * frv.opc: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout. opcodes/ * sysdep.h (POISON_BFD_BOOLEAN): Define. * aarch64-asm-2.c, * aarch64-asm.c, * aarch64-asm.h, * aarch64-dis-2.c, * aarch64-dis.c, * aarch64-dis.h, * aarch64-gen.c, * aarch64-opc.c, * aarch64-opc.h, * arc-dis.c, * arc-dis.h, * arc-fxi.h, * arc-opc.c, * arm-dis.c, * bfin-dis.c, * cris-dis.c, * csky-dis.c, * csky-opc.h, * dis-buf.c, * disassemble.c, * frv-opc.c, * frv-opc.h, * h8300-dis.c, * i386-dis.c, * m68k-dis.c, * metag-dis.c, * microblaze-dis.c, * microblaze-dis.h, * micromips-opc.c, * mips-dis.c, * mips-formats.h, * mips-opc.c, * mips16-opc.c, * mmix-dis.c, * msp430-dis.c, * nds32-dis.c, * nfp-dis.c, * nios2-dis.c, * ppc-dis.c, * riscv-dis.c, * score-dis.c, * score7-dis.c, * tic6x-dis.c, * v850-dis.c, * vax-dis.c, * wasm32-dis.c, * xtensa-dis.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout. --- opcodes/tic6x-dis.c | 222 ++++++++++++++++++++++++++-------------------------- 1 file changed, 111 insertions(+), 111 deletions(-) (limited to 'opcodes/tic6x-dis.c') diff --git a/opcodes/tic6x-dis.c b/opcodes/tic6x-dis.c index 3b5eea1..41cbd40 100644 --- a/opcodes/tic6x-dis.c +++ b/opcodes/tic6x-dis.c @@ -189,7 +189,7 @@ tic6x_extract_16 (unsigned char *p, tic6x_fetch_packet_header *header, /* FP points to a fetch packet. Return whether it is header-based; if it is, fill in HEADER. */ -static bfd_boolean +static bool tic6x_check_fetch_packet_header (unsigned char *fp, tic6x_fetch_packet_header *header, struct disassemble_info *info) @@ -206,10 +206,10 @@ tic6x_check_fetch_packet_header (unsigned char *fp, header->br = 0; header->sat = 0; for (i = 0; i < 7; i++) - header->word_compact[i] = FALSE; + header->word_compact[i] = false; for (i = 0; i < 14; i++) - header->p_bits[i] = FALSE; - return FALSE; + header->p_bits[i] = false; + return false; } for (i = 0; i < 7; i++) @@ -225,7 +225,7 @@ tic6x_check_fetch_packet_header (unsigned char *fp, for (i = 0; i < 14; i++) header->p_bits[i] = (header->header & (1u << i)) != 0; - return TRUE; + return true; } /* Disassemble the instruction at ADDR and print it using @@ -241,10 +241,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) unsigned char fp[32]; unsigned int opcode; tic6x_opcode_id opcode_id; - bfd_boolean fetch_packet_header_based; + bool fetch_packet_header_based; tic6x_fetch_packet_header header; unsigned int num_bits; - bfd_boolean bad_offset = FALSE; + bool bad_offset = false; fp_offset = addr & 0x1f; fp_addr = addr - fp_offset; @@ -263,10 +263,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) if (fetch_packet_header_based) { if (fp_offset & 0x1) - bad_offset = TRUE; + bad_offset = true; if ((fp_offset & 0x3) && (fp_offset >= 28 || !header.word_compact[fp_offset >> 2])) - bad_offset = TRUE; + bad_offset = true; if (fp_offset == 28) { info->bytes_per_chunk = 4; @@ -280,7 +280,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { num_bits = 32; if (fp_offset & 0x3) - bad_offset = TRUE; + bad_offset = true; } if (bad_offset) @@ -311,7 +311,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) const tic6x_insn_format *const fmt = &tic6x_insn_format_table[opc->format]; const tic6x_insn_field *creg_field; - bfd_boolean p_bit; + bool p_bit; const char *parallel; const char *cond = ""; const char *func_unit; @@ -325,14 +325,14 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) separating commas and trailing NUL). */ char operands[TIC6X_MAX_OPERANDS][24] = { { 0 } }; bfd_vma operands_addresses[TIC6X_MAX_OPERANDS] = { 0 }; - bfd_boolean operands_text[TIC6X_MAX_OPERANDS] = { FALSE }; - bfd_boolean operands_pcrel[TIC6X_MAX_OPERANDS] = { FALSE }; + bool operands_text[TIC6X_MAX_OPERANDS] = { false }; + bool operands_pcrel[TIC6X_MAX_OPERANDS] = { false }; unsigned int fix; unsigned int num_operands; unsigned int op_num; - bfd_boolean fixed_ok; - bfd_boolean operands_ok; - bfd_boolean have_t = FALSE; + bool fixed_ok; + bool operands_ok; + bool have_t = false; if (opc->flags & TIC6X_FLAG_MACRO) continue; @@ -384,7 +384,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) const tic6x_insn_field *cc_field; unsigned int s_value = 0; unsigned int z_value = 0; - bfd_boolean cond_known = FALSE; + bool cond_known = false; static const char *const conds[2][2] = { { "[a0] ", "[!a0] " }, @@ -400,7 +400,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) cc_value = tic6x_field_bits (opcode, cc_field); s_value = (cc_value & 0x2) >> 1; z_value = (cc_value & 0x1); - cond_known = TRUE; + cond_known = true; } else { @@ -424,7 +424,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) } z_value = tic6x_field_bits (opcode, z_field); - cond_known = TRUE; + cond_known = true; } if (!cond_known) @@ -437,7 +437,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) /* All fixed fields must have matching values; all fields with restricted ranges must have values within those ranges. */ - fixed_ok = TRUE; + fixed_ok = true; for (fix = 0; fix < opc->num_fixed_fields; fix++) { unsigned int field_bits; @@ -455,7 +455,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) if (field_bits < opc->fixed_fields[fix].min_val || field_bits > opc->fixed_fields[fix].max_val) { - fixed_ok = FALSE; + fixed_ok = false; break; } } @@ -501,10 +501,10 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) status = info->read_memory_func (fp_addr - 32, fp_prev, 32, info); if (status) /* No previous instruction to be parallel with. */ - p_bit = FALSE; + p_bit = false; else { - bfd_boolean prev_header_based; + bool prev_header_based; tic6x_fetch_packet_header prev_header; prev_header_based @@ -537,8 +537,8 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) unsigned int fld_num; char func_unit_char; const char *data_str; - bfd_boolean have_areg = FALSE; - bfd_boolean have_cross = FALSE; + bool have_areg = false; + bool have_cross = false; func_unit_side = (opc->flags & TIC6X_FLAG_SIDE_B_ONLY) ? 2 : 0; func_unit_cross = 0; @@ -594,19 +594,19 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) opcode, fld_num); abort (); } - have_cross = TRUE; + have_cross = true; func_unit_cross = fld_val; break; case tic6x_coding_rside: /* If the format has a t field, use it for src/dst register side. */ - have_t = TRUE; + have_t = true; t_val = fld_val; func_unit_data_side = (t_val ? 2 : 1); break; case tic6x_coding_areg: - have_areg = TRUE; + have_areg = true; break; default: @@ -711,98 +711,98 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) /* For each operand there must be one or more fields set based on that operand, that can together be used to derive the operand value. */ - operands_ok = TRUE; + operands_ok = true; num_operands = opc->num_operands; for (op_num = 0; op_num < num_operands; op_num++) { unsigned int fld_num; unsigned int mem_base_reg = 0; - bfd_boolean mem_base_reg_known = FALSE; - bfd_boolean mem_base_reg_known_long = FALSE; + bool mem_base_reg_known = false; + bool mem_base_reg_known_long = false; unsigned int mem_offset = 0; - bfd_boolean mem_offset_known = FALSE; - bfd_boolean mem_offset_known_long = FALSE; + bool mem_offset_known = false; + bool mem_offset_known_long = false; unsigned int mem_mode = 0; - bfd_boolean mem_mode_known = FALSE; + bool mem_mode_known = false; unsigned int mem_scaled = 0; - bfd_boolean mem_scaled_known = FALSE; + bool mem_scaled_known = false; unsigned int crlo = 0; - bfd_boolean crlo_known = FALSE; + bool crlo_known = false; unsigned int crhi = 0; - bfd_boolean crhi_known = FALSE; - bfd_boolean spmask_skip_operand = FALSE; + bool crhi_known = false; + bool spmask_skip_operand = false; unsigned int fcyc_bits = 0; - bfd_boolean prev_sploop_found = FALSE; + bool prev_sploop_found = false; switch (opc->operand_info[op_num].form) { case tic6x_operand_b15reg: /* Fully determined by the functional unit. */ - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "b15"); continue; case tic6x_operand_zreg: /* Fully determined by the functional unit. */ - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%c0", (func_unit_side == 2 ? 'b' : 'a')); continue; case tic6x_operand_retreg: /* Fully determined by the functional unit. */ - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%c3", (func_unit_side == 2 ? 'b' : 'a')); continue; case tic6x_operand_irp: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "irp"); continue; case tic6x_operand_nrp: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "nrp"); continue; case tic6x_operand_ilc: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "ilc"); continue; case tic6x_operand_hw_const_minus_1: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "-1"); continue; case tic6x_operand_hw_const_0: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "0"); continue; case tic6x_operand_hw_const_1: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "1"); continue; case tic6x_operand_hw_const_5: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "5"); continue; case tic6x_operand_hw_const_16: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "16"); continue; case tic6x_operand_hw_const_24: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "24"); continue; case tic6x_operand_hw_const_31: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "31"); continue; @@ -844,13 +844,13 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { case tic6x_operand_asm_const: case tic6x_operand_link_const: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%u", fld_val); break; case tic6x_operand_mem_long: mem_offset = fld_val; - mem_offset_known_long = TRUE; + mem_offset_known_long = true; break; default: @@ -860,12 +860,12 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_coding_lcst_high16: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%u", fld_val << 16); break; case tic6x_coding_scst_l3i: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; if (fld_val == 0) { signed_fld_val = 8; @@ -880,7 +880,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_coding_scst: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; signed_fld_val = (signed int) fld_val; signed_fld_val ^= (1 << (tic6x_field_width (field) - 1)); signed_fld_val -= (1 << (tic6x_field_width (field) - 1)); @@ -888,7 +888,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_coding_ucst_minus_one: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%u", fld_val + 1); break; @@ -902,21 +902,21 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) signed_fld_val *= 2; else signed_fld_val *= 4; - operands_pcrel[op_num] = TRUE; + operands_pcrel[op_num] = true; operands_addresses[op_num] = fp_addr + signed_fld_val; break; case tic6x_coding_regpair_msb: if (opc->operand_info[op_num].form != tic6x_operand_regpair) abort (); - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%c%u:%c%u", (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1), (func_unit_side == 2 ? 'b' : 'a'), (fld_val | 0x1) - 1); break; case tic6x_coding_pcrel_half_unsigned: - operands_pcrel[op_num] = TRUE; + operands_pcrel[op_num] = true; operands_addresses[op_num] = fp_addr + 2 * fld_val; break; @@ -936,49 +936,49 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) printf ("opcode %x: operand treg but missing t field\n", opcode); abort (); } - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = t_val ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); break; case tic6x_operand_reg: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = (func_unit_side == 2) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); break; case tic6x_operand_reg_nors: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = (func_unit_side == 2) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u", reg_side, fld_val); break; case tic6x_operand_reg_bside: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "b%u", reg_base + fld_val); break; case tic6x_operand_reg_bside_nors: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "b%u", fld_val); break; case tic6x_operand_xreg: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = ((func_unit_side == 2) ^ func_unit_cross) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); break; case tic6x_operand_dreg: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = (func_unit_data_side == 2) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u", reg_side, reg_base + fld_val); break; case tic6x_operand_regpair: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; if (fld_val & 1) - operands_ok = FALSE; + operands_ok = false; reg_side = (func_unit_side == 2) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u:%c%u", reg_side, reg_base + fld_val + 1, @@ -986,9 +986,9 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_operand_xregpair: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; if (fld_val & 1) - operands_ok = FALSE; + operands_ok = false; reg_side = ((func_unit_side == 2) ^ func_unit_cross) ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u:%c%u", reg_side, reg_base + fld_val + 1, @@ -1001,9 +1001,9 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) printf ("opcode %x: operand tregpair but missing t field\n", opcode); abort (); } - operands_text[op_num] = TRUE; + operands_text[op_num] = true; if (fld_val & 1) - operands_ok = FALSE; + operands_ok = false; reg_side = t_val ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u:%c%u", reg_side, reg_base + fld_val + 1, @@ -1011,9 +1011,9 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_operand_dregpair: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; if (fld_val & 1) - operands_ok = FALSE; + operands_ok = false; reg_side = (func_unit_data_side) == 2 ? 'b' : 'a'; snprintf (operands[op_num], 24, "%c%u:%c%u", reg_side, reg_base + fld_val + 1, @@ -1021,7 +1021,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) break; case tic6x_operand_mem_deref: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; reg_side = func_unit_side == 2 ? 'b' : 'a'; snprintf (operands[op_num], 24, "*%c%u", reg_side, reg_base + fld_val); break; @@ -1029,7 +1029,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) case tic6x_operand_mem_short: case tic6x_operand_mem_ndw: mem_base_reg = fld_val; - mem_base_reg_known = TRUE; + mem_base_reg_known = true; break; default: @@ -1051,7 +1051,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) abort (); } mem_base_reg = 0x4 | fld_val; - mem_base_reg_known = TRUE; + mem_base_reg_known = true; break; default: @@ -1065,14 +1065,14 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) switch (opc->operand_info[op_num].form) { case tic6x_operand_areg: - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "b%u", fld_val ? 15u : 14u); break; case tic6x_operand_mem_long: mem_base_reg = fld_val ? 15u : 14u; - mem_base_reg_known_long = TRUE; + mem_base_reg_known_long = true; break; default: @@ -1088,42 +1088,42 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) case tic6x_coding_mem_offset_noscale: case tic6x_coding_mem_offset: mem_offset = fld_val; - mem_offset_known = TRUE; + mem_offset_known = true; if (num_bits == 16) { - mem_mode_known = TRUE; + mem_mode_known = true; mem_mode = TIC6X_INSN16_MEM_MODE_VAL (opc->flags); - mem_scaled_known = TRUE; - mem_scaled = TRUE; + mem_scaled_known = true; + mem_scaled = true; if (opc->flags & TIC6X_FLAG_INSN16_B15PTR) { - mem_base_reg_known = TRUE; + mem_base_reg_known = true; mem_base_reg = 15; } if ( enc->coding_method == tic6x_coding_mem_offset_noscale || enc->coding_method == tic6x_coding_mem_offset_noscale ) - mem_scaled = FALSE; + mem_scaled = false; } break; case tic6x_coding_mem_mode: mem_mode = fld_val; - mem_mode_known = TRUE; + mem_mode_known = true; break; case tic6x_coding_scaled: mem_scaled = fld_val; - mem_scaled_known = TRUE; + mem_scaled_known = true; break; case tic6x_coding_crlo: crlo = fld_val; - crlo_known = TRUE; + crlo_known = true; break; case tic6x_coding_crhi: crhi = fld_val; - crhi_known = TRUE; + crhi_known = true; break; case tic6x_coding_fstg: @@ -1132,7 +1132,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { bfd_vma search_fp_addr = fp_addr; bfd_vma search_fp_offset = fp_offset; - bfd_boolean search_fp_header_based + bool search_fp_header_based = fetch_packet_header_based; tic6x_fetch_packet_header search_fp_header = header; unsigned char search_fp[32]; @@ -1214,13 +1214,13 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) || ((search_opcode & 0x003ffffe) == 0x0003e000))) { - prev_sploop_found = TRUE; + prev_sploop_found = true; sploop_ii = ((search_opcode >> 23) & 0x1f) + 1; } else if (search_num_bits == 16 && (search_opcode & 0x3c7e) == 0x0c66) { - prev_sploop_found = TRUE; + prev_sploop_found = true; sploop_ii = (((search_opcode >> 7) & 0x7) | ((search_opcode >> 11) & 0x8)) + 1; @@ -1243,7 +1243,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) else if (sploop_ii <= 14) fcyc_bits = 4; else - prev_sploop_found = FALSE; + prev_sploop_found = false; } if (prev_sploop_found) break; @@ -1251,8 +1251,8 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) } if (!prev_sploop_found) { - operands_ok = FALSE; - operands_text[op_num] = TRUE; + operands_ok = false; + operands_text[op_num] = true; break; } if (fcyc_bits > tic6x_field_width(field)) @@ -1265,12 +1265,12 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) int i, t; for (t = 0, i = fcyc_bits; i < 6; i++) t = (t << 1) | ((fld_val >> i) & 1); - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%u", t); } else { - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%u", fld_val & ((1 << fcyc_bits) - 1)); } @@ -1278,13 +1278,13 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) case tic6x_coding_spmask: if (fld_val == 0) - spmask_skip_operand = TRUE; + spmask_skip_operand = true; else { char *p; unsigned int i; - operands_text[op_num] = TRUE; + operands_text[op_num] = true; p = operands[op_num]; for (i = 0; i < 8; i++) if (fld_val & (1 << i)) @@ -1317,7 +1317,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) printf ("opcode %x: long access but operands already known ?\n", opcode); abort (); } - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "*+b%u(%u)", mem_base_reg, mem_offset * opc->operand_info[op_num].size); } @@ -1329,8 +1329,8 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) { char side; char base[4]; - bfd_boolean offset_is_reg; - bfd_boolean offset_scaled; + bool offset_is_reg; + bool offset_scaled; char offset[4]; char offsetp[6]; @@ -1356,7 +1356,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) == tic6x_operand_mem_ndw) offset_scaled = mem_scaled != 0; else - offset_scaled = TRUE; + offset_scaled = true; } else { @@ -1368,7 +1368,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) } else { - offset_scaled = FALSE; + offset_scaled = false; snprintf (offset, 4, "%u", (mem_offset * opc->operand_info[op_num].size)); @@ -1380,7 +1380,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) else snprintf (offsetp, 6, "(%s)", offset); - operands_text[op_num] = TRUE; + operands_text[op_num] = true; switch (mem_mode & ~4u) { case 0: @@ -1393,7 +1393,7 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) case 2: case 3: - operands_ok = FALSE; + operands_ok = false; break; case 8: @@ -1456,12 +1456,12 @@ print_insn_tic6x (bfd_vma addr, struct disassemble_info *info) } if (crid == tic6x_ctrl_max) { - operands_text[op_num] = TRUE; - operands_ok = FALSE; + operands_text[op_num] = true; + operands_ok = false; } else { - operands_text[op_num] = TRUE; + operands_text[op_num] = true; snprintf (operands[op_num], 24, "%s", tic6x_ctrl_table[crid].name); } -- cgit v1.1