From a90a64c16870e6e27abc5984132a9ae498fa6689 Mon Sep 17 00:00:00 2001 From: Steve Chamberlain Date: Thu, 24 Nov 1994 06:36:28 +0000 Subject: * sh-opc.h (mov.l gbr): Get direction right. * sh-dis.c (print_insn_shx): New function. (print_insn_shl, print_insn_sh): Call print_insn_shx to print opcodes with right byte order. --- opcodes/sh-opc.h | 355 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 355 insertions(+) create mode 100644 opcodes/sh-opc.h (limited to 'opcodes/sh-opc.h') diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h new file mode 100644 index 0000000..b534806 --- /dev/null +++ b/opcodes/sh-opc.h @@ -0,0 +1,355 @@ +typedef enum { + HEX_0, + HEX_1, + HEX_2, + HEX_3, + HEX_4, + HEX_5, + HEX_6, + HEX_7, + HEX_8, + HEX_9, + HEX_A, + HEX_B, + HEX_C, + HEX_D, + HEX_E, + HEX_F, + REG_N, + REG_M, + BRANCH_12, + BRANCH_8, + DISP_8, + DISP_4, + IMM_4, + IMM_4BY2, + IMM_4BY4, + PCRELIMM_8BY2, + PCRELIMM_8BY4, + IMM_8, + IMM_8BY2, + IMM_8BY4, +} sh_nibble_type; +typedef enum { + A_END, + A_BDISP12, + A_BDISP8, + A_DEC_M, + A_DEC_N, + A_DISP_GBR, + A_DISP_PC, + A_DISP_REG_M, + A_DISP_REG_N, + A_GBR, + A_IMM, + A_INC_M, + A_INC_N, + A_IND_M, + A_IND_N, + A_IND_R0_REG_M, + A_IND_R0_REG_N, + A_MACH, + A_MACL, + A_PR, + A_R0, + A_R0_GBR, + A_REG_M, + A_REG_N, + A_SR, + A_VBR, +} sh_arg_type; +typedef struct { +char *name; +sh_arg_type arg[3]; +sh_nibble_type nibbles[4]; +} sh_opcode_info; +#ifdef DEFINE_TABLE +sh_opcode_info sh_table[]={ + +/* 0111nnnni8*1.... add #, */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM_8}}, + +/* 0011nnnnmmmm1100 add , */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}}, + +/* 0011nnnnmmmm1110 addc ,*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}}, + +/* 0011nnnnmmmm1111 addv ,*/{"addv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_F}}, + +/* 11001001i8*1.... and #,R0 */{"and",{A_IMM,A_R0},{HEX_C,HEX_9,IMM_8}}, + +/* 0010nnnnmmmm1001 and , */{"and",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_9}}, + +/* 11001101i8*1.... and.b #,@(R0,GBR)*/{"and.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_D,IMM_8}}, + +/* 1010i12......... bra */{"bra",{A_BDISP12},{HEX_A,BRANCH_12}}, + +/* 1011i12......... bsr */{"bsr",{A_BDISP12},{HEX_B,BRANCH_12}}, + +/* 10001001i8p1.... bt */{"bt",{A_BDISP8},{HEX_8,HEX_9,BRANCH_8}}, + +/* 10001011i8p1.... bf */{"bf",{A_BDISP8},{HEX_8,HEX_B,BRANCH_8}}, + +/* 10001101i8p1.... bt.s */{"bt.s",{A_BDISP8},{HEX_8,HEX_D,BRANCH_8}}, + +/* 10001111i8p1.... bf.s */{"bf.s",{A_BDISP8},{HEX_8,HEX_F,BRANCH_8}}, + +/* 0000000000101000 clrmac */{"clrmac",{0},{HEX_0,HEX_0,HEX_2,HEX_8}}, + +/* 0000000000001000 clrt */{"clrt",{0},{HEX_0,HEX_0,HEX_0,HEX_8}}, + +/* 10001000i8*1.... cmp/eq #,R0 */{"cmp/eq",{A_IMM,A_R0},{HEX_8,HEX_8,IMM_8}}, + +/* 0011nnnnmmmm0000 cmp/eq ,*/{"cmp/eq",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_0}}, + +/* 0011nnnnmmmm0011 cmp/ge ,*/{"cmp/ge",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_3}}, + +/* 0011nnnnmmmm0111 cmp/gt ,*/{"cmp/gt",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_7}}, + +/* 0011nnnnmmmm0110 cmp/hi ,*/{"cmp/hi",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_6}}, + +/* 0011nnnnmmmm0010 cmp/hs ,*/{"cmp/hs",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_2}}, + +/* 0100nnnn00010101 cmp/pl */{"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}}, + +/* 0100nnnn00010001 cmp/pz */{"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}}, + +/* 0010nnnnmmmm1100 cmp/str ,*/{"cmp/str",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_C}}, + +/* 0010nnnnmmmm0111 div0s ,*/{"div0s",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_7}}, + +/* 0000000000011001 div0u */{"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}}, + +/* 0011nnnnmmmm0100 div1 ,*/{"div1",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_4}}, + +/* 0110nnnnmmmm1110 exts.b ,*/{"exts.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_E}}, + +/* 0110nnnnmmmm1111 exts.w ,*/{"exts.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_F}}, + +/* 0110nnnnmmmm1100 extu.b ,*/{"extu.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_C}}, + +/* 0110nnnnmmmm1101 extu.w ,*/{"extu.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_D}}, + +/* 0100nnnn00101011 jmp @ */{"jmp",{A_IND_N},{HEX_4,REG_N,HEX_2,HEX_B}}, + +/* 0100nnnn00001011 jsr @ */{"jsr",{A_IND_N},{HEX_4,REG_N,HEX_0,HEX_B}}, + +/* 0100nnnn00011110 ldc ,GBR */{"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}}, + +/* 0100nnnn00001110 ldc ,SR */{"ldc",{A_REG_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_E}}, + +/* 0100nnnn00101110 ldc ,VBR */{"ldc",{A_REG_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_E}}, + +/* 0100nnnn00010111 ldc.l @+,GBR */{"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}}, + +/* 0100nnnn00000111 ldc.l @+,SR */{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}}, + +/* 0100nnnn00100111 ldc.l @+,VBR */{"ldc.l",{A_INC_N,A_VBR},{HEX_4,REG_N,HEX_2,HEX_7}}, + +/* 0100nnnn00001010 lds ,MACH */{"lds",{A_REG_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_A}}, + +/* 0100nnnn00011010 lds ,MACL */{"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}}, + +/* 0100nnnn00101010 lds ,PR */{"lds",{A_REG_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_A}}, + +/* 0100nnnn00000110 lds.l @+,MACH*/{"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}}, + +/* 0100nnnn00010110 lds.l @+,MACL*/{"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}}, + +/* 0100nnnn00100110 lds.l @+,PR */{"lds.l",{A_INC_N,A_PR},{HEX_4,REG_N,HEX_2,HEX_6}}, + +/* 0100nnnnmmmm1111 mac.w @+,@+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}}, + +/* 1110nnnni8*1.... mov #, */{"mov",{A_IMM,A_REG_N},{HEX_E,REG_N,IMM_8}}, + +/* 0110nnnnmmmm0011 mov , */{"mov",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_3}}, + +/* 0000nnnnmmmm0100 mov.b ,@(R0,)*/{"mov.b",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_4}}, + +/* 0010nnnnmmmm0100 mov.b ,@-*/{"mov.b",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_4}}, + +/* 0010nnnnmmmm0000 mov.b ,@*/{"mov.b",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_0}}, + +/* 10000100mmmmi4*1 mov.b @(,),R0*/{"mov.b",{A_DISP_REG_M,A_R0},{HEX_8,HEX_4,REG_M,IMM_4}}, + +/* 11000100i8*1.... mov.b @(,GBR),R0*/{"mov.b",{A_DISP_GBR,A_R0},{HEX_C,HEX_4,IMM_8}}, + +/* 0000nnnnmmmm1100 mov.b @(R0,),*/{"mov.b",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_C}}, + +/* 0110nnnnmmmm0100 mov.b @+,*/{"mov.b",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_4}}, + +/* 0110nnnnmmmm0000 mov.b @,*/{"mov.b",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_0}}, + +/* 10000000mmmmi4*1 mov.b R0,@(,)*/{"mov.b",{A_R0,A_DISP_REG_M},{HEX_8,HEX_0,REG_M,IMM_4}}, + +/* 11000000i8*1.... mov.b R0,@(,GBR)*/{"mov.b",{A_R0,A_DISP_GBR},{HEX_C,HEX_0,IMM_8}}, + +/* 0001nnnnmmmmi4*4 mov.l ,@(,)*/{"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}}, + +/* 0000nnnnmmmm0110 mov.l ,@(R0,)*/{"mov.l",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_6}}, + +/* 0010nnnnmmmm0110 mov.l ,@-*/{"mov.l",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_6}}, + +/* 0010nnnnmmmm0010 mov.l ,@*/{"mov.l",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_2}}, + +/* 0101nnnnmmmmi4*4 mov.l @(,),*/{"mov.l",{A_DISP_REG_M,A_REG_N},{HEX_5,REG_N,REG_M,IMM_4BY4}}, + +/* 11000110i8*4.... mov.l @(,GBR),R0*/{"mov.l",{A_DISP_GBR,A_R0},{HEX_C,HEX_6,IMM_8BY4}}, + +/* 1101nnnni8p4.... mov.l @(,PC),*/{"mov.l",{A_DISP_PC,A_REG_N},{HEX_D,REG_N,PCRELIMM_8BY4}}, + +/* 0000nnnnmmmm1110 mov.l @(R0,),*/{"mov.l",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_E}}, + +/* 0110nnnnmmmm0110 mov.l @+,*/{"mov.l",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_6}}, + +/* 0110nnnnmmmm0010 mov.l @,*/{"mov.l",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_2}}, + +/* 11000010i8*4.... mov.l R0,@(,GBR)*/{"mov.l",{A_R0,A_DISP_GBR},{HEX_C,HEX_2,IMM_8BY4}}, + +/* 0000nnnnmmmm0101 mov.w ,@(R0,)*/{"mov.w",{ A_REG_M,A_IND_R0_REG_N},{HEX_0,REG_N,REG_M,HEX_5}}, + +/* 0010nnnnmmmm0101 mov.w ,@-*/{"mov.w",{ A_REG_M,A_DEC_N},{HEX_2,REG_N,REG_M,HEX_5}}, + +/* 0010nnnnmmmm0001 mov.w ,@*/{"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}}, + +/* 10000101mmmmi4*2 mov.w @(,),R0*/{"mov.w",{A_DISP_REG_M,A_R0},{HEX_8,HEX_5,REG_M,IMM_4BY2}}, + +/* 11000101i8*2.... mov.w @(,GBR),R0*/{"mov.w",{A_DISP_GBR,A_R0},{HEX_C,HEX_5,IMM_8BY2}}, + +/* 1001nnnni8p2.... mov.w @(,PC),*/{"mov.w",{A_DISP_PC,A_REG_N},{HEX_9,REG_N,PCRELIMM_8BY2}}, + +/* 0000nnnnmmmm1101 mov.w @(R0,),*/{"mov.w",{A_IND_R0_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_D}}, + +/* 0110nnnnmmmm0101 mov.w @+,*/{"mov.w",{A_INC_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_5}}, + +/* 0110nnnnmmmm0001 mov.w @,*/{"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}}, + +/* 10000001mmmmi4*2 mov.w R0,@(,)*/{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}}, + +/* 11000001i8*2.... mov.w R0,@(,GBR)*/{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}}, + +/* 11000111i8p4.... mova @(,PC),R0*/{"mova",{A_DISP_PC,A_R0},{HEX_C,HEX_7,PCRELIMM_8BY4}}, + +/* 0000nnnn00101001 movt */{"movt",{A_REG_N},{HEX_0,REG_N,HEX_2,HEX_9}}, + +/* 0010nnnnmmmm1111 muls ,*/{"muls",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_F}}, + +/* 0000nnnnmmmm0111 mul.l ,*/{"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}}, + +/* 0010nnnnmmmm1110 mulu ,*/{"mulu",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_E}}, + +/* 0110nnnnmmmm1011 neg , */{"neg",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_B}}, + +/* 0110nnnnmmmm1010 negc ,*/{"negc",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_A}}, + +/* 0000000000001001 nop */{"nop",{0},{HEX_0,HEX_0,HEX_0,HEX_9}}, + +/* 0110nnnnmmmm0111 not , */{"not",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_7}}, + +/* 11001011i8*1.... or #,R0 */{"or",{A_IMM,A_R0},{HEX_C,HEX_B,IMM_8}}, + +/* 0010nnnnmmmm1011 or , */{"or",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_B}}, + +/* 11001111i8*1.... or.b #,@(R0,GBR)*/{"or.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_F,IMM_8}}, + +/* 0100nnnn00100100 rotcl */{"rotcl",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_4}}, + +/* 0100nnnn00100101 rotcr */{"rotcr",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_5}}, + +/* 0100nnnn00000100 rotl */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}}, + +/* 0100nnnn00000101 rotr */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}}, + +/* 0000000000101011 rte */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}}, + +/* 0000000000001011 rts */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}}, + +/* 0000000000011000 sett */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}}, + +/* 0100nnnnmmmm1100 shad ,*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}}, + +/* 0100nnnnmmmm1101 shld ,*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}}, + +/* 0100nnnn00100000 shal */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}}, + +/* 0100nnnn00100001 shar */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}}, + +/* 0100nnnn00000000 shll */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}}, + +/* 0100nnnn00101000 shll16 */{"shll16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_8}}, + +/* 0100nnnn00001000 shll2 */{"shll2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_8}}, + +/* 0100nnnn00011000 shll8 */{"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}}, + +/* 0100nnnn00000001 shlr */{"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}}, + +/* 0100nnnn00101001 shlr16 */{"shlr16",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_9}}, + +/* 0100nnnn00001001 shlr2 */{"shlr2",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_9}}, + +/* 0100nnnn00011001 shlr8 */{"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}}, + +/* 0000000000011011 sleep */{"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}}, + +/* 0000nnnn00010010 stc GBR, */{"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}}, + +/* 0000nnnn00000010 stc SR, */{"stc",{A_SR,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_2}}, + +/* 0000nnnn00100010 stc VBR, */{"stc",{A_VBR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_2}}, + +/* 0100nnnn00010011 stc.l GBR,@- */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}}, + +/* 0100nnnn00000011 stc.l SR,@- */{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}}, + +/* 0100nnnn00100011 stc.l VBR,@- */{"stc.l",{A_VBR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_3}}, + +/* 0000nnnn00001010 sts MACH, */{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}}, + +/* 0000nnnn00011010 sts MACL, */{"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}}, + +/* 0000nnnn00101010 sts PR, */{"sts",{A_PR,A_REG_N},{HEX_0,REG_N,HEX_2,HEX_A}}, + +/* 0100nnnn00000010 sts.l MACH,@-*/{"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}}, + +/* 0100nnnn00010010 sts.l MACL,@-*/{"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}}, + +/* 0100nnnn00100010 sts.l PR,@- */{"sts.l",{A_PR,A_DEC_N},{HEX_4,REG_N,HEX_2,HEX_2}}, + +/* 0011nnnnmmmm1000 sub , */{"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}}, + +/* 0011nnnnmmmm1010 subc ,*/{"subc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_A}}, + +/* 0011nnnnmmmm1011 subv ,*/{"subv",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_B}}, + +/* 0110nnnnmmmm1000 swap.b ,*/{"swap.b",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_8}}, + +/* 0110nnnnmmmm1001 swap.w ,*/{"swap.w",{ A_REG_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_9}}, + +/* 0100nnnn00011011 tas.b @ */{"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}}, + +/* 11000011i8*1.... trapa # */{"trapa",{A_IMM},{HEX_C,HEX_3,IMM_8}}, + +/* 11001000i8*1.... tst #,R0 */{"tst",{A_IMM,A_R0},{HEX_C,HEX_8,IMM_8}}, + +/* 0010nnnnmmmm1000 tst , */{"tst",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_8}}, + +/* 11001100i8*1.... tst.b #,@(R0,GBR)*/{"tst.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_C,IMM_8}}, + +/* 11001010i8*1.... xor #,R0 */{"xor",{A_IMM,A_R0},{HEX_C,HEX_A,IMM_8}}, + +/* 0010nnnnmmmm1010 xor , */{"xor",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_A}}, + +/* 11001110i8*1.... xor.b #,@(R0,GBR)*/{"xor.b",{A_IMM,A_R0_GBR},{HEX_C,HEX_E,IMM_8}}, + +/* 0010nnnnmmmm1101 xtrct ,*/{"xtrct",{ A_REG_M,A_REG_N},{HEX_2,REG_N,REG_M,HEX_D}}, + +/* 0000nnnnmmmm0111 mul.l ,*/{"mul.l",{ A_REG_M,A_REG_N},{HEX_0,REG_N,REG_M,HEX_7}}, + +/* 0100nnnn00010000 dt */{"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}}, + +/* 0011nnnnmmmm1101 dmuls.l ,*/{"dmuls.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_D}}, + +/* 0011nnnnmmmm0101 dmulu.l ,*/{"dmulu.l",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_5}}, + +/* 0000nnnnmmmm1111 mac.l @+,@+*/{"mac.l",{A_INC_M,A_INC_N},{HEX_0,REG_N,REG_M,HEX_F}}, +0}; +#endif -- cgit v1.1