From db51cc60e255cb54b8960598beb1350b056a23e7 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 20 Sep 2007 17:38:38 +0000 Subject: gas/ 2007-09-20 H.J. Lu PR 658 * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed. (set_allow_index_reg): New. (allow_index_reg): Likewise. (md_pseudo_table): Add "allow_index_reg" and "disallow_index_reg". (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for fake index registers. (i386_scale): Updated. (i386_index_check): Support fake index registers. (parse_real_register): Return NULL on eiz/riz if fake index registers aren't allowed. gas/testsuite/ 2007-09-20 H.J. Lu PR 658 * gas/i386/i386.exp: Run sib-intel, x86-64-sib and x86-64-sib-intel. * gas/i386/nops-1-i386-i686.d: Updated. * gas/i386/nops-1-i386.d: Likewise. * gas/i386/nops-1.d: Likewise. * gas/i386/nops-2-i386.d: Likewise. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3.d : Likewise. * gas/i386/sib.d: Likewise. * gas/i386/sib.s: Use %eiz in testcases. * gas/i386/sib-intel.d: New. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. * gas/i386/x86-64-sib.s: Likewise. ld/testsuite/ 2007-09-20 H.J. Lu PR 658 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsld1.dd: Likewise. opcodes/ 2007-09-20 H.J. Lu PR 658 * 386-dis.c (index64): New. (index32): Likewise. (intel_index64): Likewise. (intel_index32): Likewise. (att_index64): Likewise. (att_index32): Likewise. (print_insn): Set index64 and index32. (OP_E_extended): Use index64/index32 for index register for SIB with INDEX == 4. * i386-opc.h (RegEiz): New. (RegRiz): Likewise. * i386-reg.tbl: Add eiz and riz. * i386-tbl.h: Regenerated. --- opcodes/i386-reg.tbl | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'opcodes/i386-reg.tbl') diff --git a/opcodes/i386-reg.tbl b/opcodes/i386-reg.tbl index 28debd7..373aba7 100644 --- a/opcodes/i386-reg.tbl +++ b/opcodes/i386-reg.tbl @@ -190,6 +190,10 @@ xmm15, RegXMM, RegRex, 7 // No type will make this register rejected for all purposes except // for addressing. This saves creating one extra type for RIP. rip, BaseIndex, 0, RegRip +// No type will make these registers rejected for all purposes except +// for addressing. +eiz, BaseIndex, 0, RegEiz +riz, BaseIndex, 0, RegRiz // fp regs. st(0), FloatReg|FloatAcc, 0, 0 st(1), FloatReg, 0, 1 -- cgit v1.1