From 20afcfb756e30b8fa84544ff141dc14364ffbcc5 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 20 Sep 2007 20:13:26 +0000 Subject: gas/testsuite/ 2007-09-20 H.J. Lu * gas/i386/sib.s: Add more eiz tests. * gas/i386/x86-64-sib.s: Add more riz tests. * gas/i386/sib-intel.d: Updated. * gas/i386/sib.d: Likewise. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2007-09-20 H.J. Lu * i386-dis.c (OP_E_extended): Display eiz for [eiz*1 + offset]. --- opcodes/i386-dis.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'opcodes/i386-dis.c') diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 9a45e91..ecb428f 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -6314,6 +6314,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) int havesib; int havebase; int haveindex; + int needindex; int base; int index = 0; int scale = 0; @@ -6368,7 +6369,15 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) break; } - havedisp = havebase || (havesib && (haveindex || scale != 0)); + /* In 32bit mode, we need index register to tell [offset] from + [eiz*1 + offset]. */ + needindex = (havesib + && !havebase + && !haveindex + && address_mode == mode_32bit); + havedisp = (havebase + || needindex + || (havesib && (haveindex || scale != 0))); if (!intel_syntax) if (modrm.mod != 0 || (base & 7) == 5) @@ -6402,6 +6411,7 @@ OP_E_extended (int bytemode, int sizeflag, int has_drex) /* ESP/RSP won't allow index. If base isn't ESP/RSP, print index to tell base + index from base. */ if (scale != 0 + || needindex || haveindex || (havebase && base != ESP_REG_NUM)) { -- cgit v1.1