From d6aab7a11b8bd85de43f9fe6b1cea95b504e73ad Mon Sep 17 00:00:00 2001
From: Xuepeng Guo <xuepeng.guo@intel.com>
Date: Fri, 5 Apr 2019 11:03:01 -0700
Subject: x86: Support Intel AVX512 BF16

Add assembler and disassembler support Intel AVX512 BF16:

https://software.intel.com/en-us/download/intel-architecture-instruction-set-extensions-programming-reference

gas/

2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>

	* config/tc-i386.c (cpu_arch): Add .avx512_bf16.
	(cpu_noarch): Add noavx512_bf16.
	* doc/c-i386.texi: Document avx512_bf16.
	* testsuite/gas/i386/avx512_bf16.d: New file.
	* testsuite/gas/i386/avx512_bf16.s: Likewise.
	* testsuite/gas/i386/avx512_bf16_vl-inval.l: Likewise.
	* testsuite/gas/i386/avx512_bf16_vl-inval.s: Likewise.
	* testsuite/gas/i386/avx512_bf16_vl.d: Likewise.
	* testsuite/gas/i386/avx512_bf16_vl.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512_bf16.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512_bf16.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.l: Likesie.
	* testsuite/gas/i386/x86-64-avx512_bf16_vl-inval.s: Likewise.
	* testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Likewise.
	* testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Likewise.
	* testsuite/gas/i386/i386.exp: Add BF16 related tests.

opcodes/

2019-04-05  Xuepeng Guo  <xuepeng.guo@intel.com>

	* i386-dis-evex.h (evex_table): Updated to support BF16
	instructions.
	* i386-dis.c (enum): Add EVEX_W_0F3852_P_1, EVEX_W_0F3872_P_1
	and EVEX_W_0F3872_P_3.
	* i386-gen.c (cpu_flag_init): Add CPU_AVX512_BF16_FLAGS.
	(cpu_flags): Add bitfield for CpuAVX512_BF16.
	* i386-opc.h (enum): Add CpuAVX512_BF16.
	(i386_cpu_flags): Add bitfield for cpuavx512_bf16.
	* i386-opc.tbl: Add AVX512 BF16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
---
 opcodes/i386-dis-evex.h | 20 ++++++++++++++++++--
 1 file changed, 18 insertions(+), 2 deletions(-)

(limited to 'opcodes/i386-dis-evex.h')

diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index dec7fc4..9fea25d 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -2020,7 +2020,7 @@ static const struct dis386 evex_table[][256] = {
   /* PREFIX_EVEX_0F3852 */
   {
     { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (EVEX_W_0F3852_P_1) },
     { "vpdpwssd",	{ XM, Vex, EXx }, 0 },
     { "vp4dpwssd",	{ XM, Vex, EXxmm }, 0 },
   },
@@ -2112,8 +2112,9 @@ static const struct dis386 evex_table[][256] = {
   /* PREFIX_EVEX_0F3872 */
   {
     { Bad_Opcode },
-    { Bad_Opcode },
+    { VEX_W_TABLE (EVEX_W_0F3872_P_1) },
     { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
+    { VEX_W_TABLE (EVEX_W_0F3872_P_3) },
   },
   /* PREFIX_EVEX_0F3873 */
   {
@@ -3705,6 +3706,11 @@ static const struct dis386 evex_table[][256] = {
     { "vpmulld",	{ XM, Vex, EXx }, 0 },
     { "vpmullq",	{ XM, Vex, EXx }, 0 },
   },
+  /* EVEX_W_0F3852_P_1 */
+  {
+    { "vdpbf16ps",	{ XM, Vex, EXx }, 0 },
+    { Bad_Opcode },
+  },
   /* EVEX_W_0F3854_P_2 */
   {
     { "vpopcntb",	{ XM, EXx }, 0 },
@@ -3759,11 +3765,21 @@ static const struct dis386 evex_table[][256] = {
     { "vpshldvd",  { XM, Vex, EXx }, 0 },
     { "vpshldvq",  { XM, Vex, EXx }, 0 },
   },
+  /* EVEX_W_0F3872_P_1 */
+  {
+    { "vcvtneps2bf16%XY", { XMxmmq, EXx }, 0 },
+    { Bad_Opcode },
+  },
   /* EVEX_W_0F3872_P_2 */
   {
     { Bad_Opcode },
     { "vpshrdvw",  { XM, Vex, EXx }, 0 },
   },
+  /* EVEX_W_0F3872_P_3 */
+  {
+    { "vcvtne2ps2bf16", { XM, Vex, EXx}, 0 },
+    { Bad_Opcode },
+  },
   /* EVEX_W_0F3873_P_2 */
   {
     { "vpshrdvd",  { XM, Vex, EXx }, 0 },
-- 
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