From b50c9f31661be05bcd73fb1158e02f606e696948 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Tue, 6 Nov 2018 11:43:55 +0100 Subject: x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* PEXTR{B,W} and PINSR{B,W}, just like for AVX512BW, are WIG, no matter that the SDM uses a nonstandard description of that fact. PEXTRD, even with EVEX.W set, ignores that bit outside of 64-bit mode, just like its AVX counterpart. --- opcodes/i386-dis-evex.h | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) (limited to 'opcodes/i386-dis-evex.h') diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index 73b6568..22c9165 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -2663,7 +2663,7 @@ static const struct dis386 evex_table[][256] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (EVEX_W_0F3A16_P_2) }, + { "vpextrK", { Edq, XM, Ib }, 0 }, }, /* PREFIX_EVEX_0F3A17 */ { @@ -2729,7 +2729,7 @@ static const struct dis386 evex_table[][256] = { { { Bad_Opcode }, { Bad_Opcode }, - { VEX_W_TABLE (EVEX_W_0F3A22_P_2) }, + { "vpinsrK", { XM, Vex128, Edq, Ib }, 0 }, }, /* PREFIX_EVEX_0F3A23 */ { @@ -3892,11 +3892,6 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { "vrndscalesd", { XMScalar, VexScalar, EXxmm_mq, EXxEVexS, Ib }, 0 }, }, - /* EVEX_W_0F3A16_P_2 */ - { - { "vpextrd", { Edqd, XM, Ib }, 0 }, - { "vpextrq", { Eq, XM, Ib }, 0 }, - }, /* EVEX_W_0F3A18_P_2 */ { { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, 0 }, @@ -3925,11 +3920,6 @@ static const struct dis386 evex_table[][256] = { { { "vinsertps", { XMM, Vex, EXxmm_md, Ib }, 0 }, }, - /* EVEX_W_0F3A22_P_2 */ - { - { "vpinsrd", { XM, Vex128, Edqd, Ib }, 0 }, - { "vpinsrq", { XM, Vex128, Eq, Ib }, 0 }, - }, /* EVEX_W_0F3A23_P_2 */ { { "vshuff32x4", { XM, Vex, EXx, Ib }, 0 }, -- cgit v1.1