From 7b08cc32165912395838e7bb995d880f623fe636 Mon Sep 17 00:00:00 2001 From: Victor Do Nascimento Date: Wed, 15 Nov 2023 12:21:33 +0000 Subject: aarch64: Add +d128 architectural feature support Indicating the presence of the Armv9.4-a features concerning 128-bit Page Table Descriptors, 128-bit System Registers and Instructions, the "+d128" architectural extension flag is added to the list of possible -march options in Binutils, together with the necessary macro for encoding d128 instructions. --- opcodes/aarch64-tbl.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'opcodes/aarch64-tbl.h') diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 5058cc9..27550fd 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2582,6 +2582,8 @@ static const aarch64_feature_set aarch64_feature_gcs = AARCH64_FEATURE (GCS); static const aarch64_feature_set aarch64_feature_ite = AARCH64_FEATURE (ITE); +static const aarch64_feature_set aarch64_feature_d128 = + AARCH64_FEATURE (D128); #define CORE &aarch64_feature_v8 #define FP &aarch64_feature_fp @@ -2645,6 +2647,7 @@ static const aarch64_feature_set aarch64_feature_ite = #define CHK &aarch64_feature_chk #define GCS &aarch64_feature_gcs #define ITE &aarch64_feature_ite +#define D128 &aarch64_feature_d128 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \ { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL } @@ -2798,6 +2801,8 @@ static const aarch64_feature_set aarch64_feature_ite = { NAME, OPCODE, MASK, ic_system, 0, CHK, OPS, QUALS, FLAGS, 0, 0, NULL } #define GCS_INSN(NAME, OPCODE, MASK, OPS, QUALS, FLAGS) \ { NAME, OPCODE, MASK, gcs, 0, GCS, OPS, QUALS, FLAGS, 0, 0, NULL } +#define D128_INSN(NAME,OPCODE,MASK,OPS,QUALS,FLAGS) \ + { NAME, OPCODE, MASK, ic_system, 0, D128, OPS, QUALS, FLAGS, 0, 0, NULL } #define MOPS_CPY_OP1_OP2_PME_INSN(NAME, OPCODE, MASK, FLAGS, CONSTRAINTS) \ MOPS_INSN (NAME, OPCODE, MASK, 0, \ -- cgit v1.1