From de863c74750924a0c3e8fae251c49c69e3ddff36 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Fri, 9 Nov 2012 17:36:19 +0000 Subject: 2012-11-09 Nick Clifton * Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo. (ALL_MACHINES_CFILES): Add cpu-v850-rh850.c. * archures.c (bfd_arch_info): Add bfd_v850_rh850_arch. * config.bfd: Likewise. * configure.in: Add bfd_elf32_v850_rh850_vec. * cpu-v850.c: Update printed description. * cpu-v850_rh850.c: New file. * elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI relocs. (v850_elf_perform_relocation): Likewise. (v850_elf_final_link_relocate): Likewise. (v850_elf_relocate_section): Likewise. (v850_elf_relax_section): Likewise. (v800_elf_howto_table): New. (v850_elf_object_p): Add support for RH850 ABI values. (v850_elf_final_write_processing): Likewise. (v850_elf_merge_private_bfd_data): Likewise. (v850_elf_print_private_bfd_data): Likewise. (v800_elf_reloc_map): New. (v800_elf_reloc_type_lookup): New. (v800_elf_reloc_name_lookup): New. (v800_elf_info_to_howto): New. (bfd_elf32_v850_rh850_vec): New. (bfd_arch_v850_rh850): New. * targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI. (guess_is_rela): Add EM_V800. (dump_relocations): Likewise. (get_machine_name): Update EM_V800. (get_machine_flags): Add support for RH850 ABI flags. (is_32bit_abs_reloc): Add support for RH850 ABI reloc. * config/tc-v850.c (v850_target_arch): New. (v850_target_format): New. (set_machine): Use v850_target_arch. (md_begin): Likewise. (md_show_usage): Document new switches. (md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and -m4byte-align. * config/tc-v850.c (TARGET_ARCH) Use v850_target_arch. (TARGET_FORMAT): Use v850_target_format. * doc/c-v850.texi: Document new options. * v850.h: Add RH850 ABI values. * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. * Makefile.in: Regenerate. * configure.tgt (v850*-*-*): Make v850_rh850 the default emulation. Add vanilla v850 as an extra emulation. * emulparams/v850_rh850.sh: New file. * scripttempl/v850_rh850.sc: New file. * configure.in: Add bfd_v850_rh850_arch. * configure: Regenerate. * disassemble.c (disassembler): Likewise. --- ld/ChangeLog | 7 ++ ld/Makefile.am | 4 + ld/Makefile.in | 3 + ld/configure.tgt | 3 +- ld/emulparams/v850_rh850.sh | 15 +++ ld/scripttempl/v850_rh850.sc | 259 +++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 290 insertions(+), 1 deletion(-) create mode 100644 ld/emulparams/v850_rh850.sh create mode 100644 ld/scripttempl/v850_rh850.sc (limited to 'ld') diff --git a/ld/ChangeLog b/ld/ChangeLog index 4da5193..afb0b99 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -6,6 +6,13 @@ (PARSE_AND_LIST_ARG_CASES): Add support for --flag-mismatch-warnings. + * Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c. + * Makefile.in: Regenerate. + * configure.tgt (v850*-*-*): Make v850_rh850 the default + emulation. Add vanilla v850 as an extra emulation. + * emulparams/v850_rh850.sh: New file. + * scripttempl/v850_rh850.sc: New file. + 2012-11-09 Edgar E. Iglesias * Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c. diff --git a/ld/Makefile.am b/ld/Makefile.am index f6f814f..bda68a8 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -453,6 +453,7 @@ ALL_EMULATION_SOURCES = \ etic54xcoff.c \ etic80coff.c \ ev850.c \ + ev850_rh850.c \ evanilla.c \ evax.c \ evaxnbsd.c \ @@ -1924,6 +1925,9 @@ etic80coff.c: $(srcdir)/emulparams/tic80coff.sh \ ev850.c: $(srcdir)/emulparams/v850.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/v850.sc ${GEN_DEPENDS} ${GENSCRIPTS} v850 "$(tdir_v850)" +ev850_rh850.c: $(srcdir)/emulparams/v850_rh850.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/v850_rh850.sc ${GEN_DEPENDS} + ${GENSCRIPTS} v850_rh850 "$(tdir_v850_rh850)" evanilla.c: $(srcdir)/emulparams/vanilla.sh \ $(srcdir)/emultempl/vanilla.em $(srcdir)/scripttempl/vanilla.sc ${GEN_DEPENDS} ${GENSCRIPTS} vanilla "$(tdir_vanilla)" diff --git a/ld/Makefile.in b/ld/Makefile.in index fb0c21e..660dbab 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -3395,6 +3395,9 @@ etic80coff.c: $(srcdir)/emulparams/tic80coff.sh \ ev850.c: $(srcdir)/emulparams/v850.sh \ $(ELF_DEPS) $(srcdir)/scripttempl/v850.sc ${GEN_DEPENDS} ${GENSCRIPTS} v850 "$(tdir_v850)" +ev850_rh850.c: $(srcdir)/emulparams/v850_rh850.sh \ + $(ELF_DEPS) $(srcdir)/scripttempl/v850_rh850.sc ${GEN_DEPENDS} + ${GENSCRIPTS} v850_rh850 "$(tdir_v850_rh850)" evanilla.c: $(srcdir)/emulparams/vanilla.sh \ $(srcdir)/emultempl/vanilla.em $(srcdir)/scripttempl/vanilla.sc ${GEN_DEPENDS} ${GENSCRIPTS} vanilla "$(tdir_vanilla)" diff --git a/ld/configure.tgt b/ld/configure.tgt index 9f0025a..3504ee6 100644 --- a/ld/configure.tgt +++ b/ld/configure.tgt @@ -716,7 +716,8 @@ tilegxbe-*-*) targ_emul=elf64tilegx_be targ_extra_emuls="elf64tilegx elf32tilegx elf32tilegx_be" targ_extra_libpath=$targ_extra_emuls ;; tilepro-*-*) targ_emul=elf32tilepro ;; -v850*-*-*) targ_emul=v850 +v850*-*-*) targ_emul=v850_rh850 + targ_extra_emuls=v850 ;; vax-dec-ultrix* | vax-dec-bsd*) targ_emul=vax ;; vax-*-netbsdelf*) targ_emul=elf32vax diff --git a/ld/emulparams/v850_rh850.sh b/ld/emulparams/v850_rh850.sh new file mode 100644 index 0000000..4315d2b --- /dev/null +++ b/ld/emulparams/v850_rh850.sh @@ -0,0 +1,15 @@ +MACHINE= +SCRIPT_NAME=v850_rh850 +OUTPUT_FORMAT="elf32-v850-rh850" +TEXT_START_ADDR=0x100000 +ZDATA_START_ADDR=0x160 +ROZDATA_START_ADDR="ALIGN (4)" +SDATA_START_ADDR="ALIGN (4)" +ROSDATA_START_ADDR="ALIGN (4)" +TDATA_START_ADDR="ALIGN (4)" +CALL_TABLE_START_ADDR="ALIGN (4)" +ARCH=v850_rh850 +MAXPAGESIZE=256 +ENTRY=_start +EMBEDDED=yes +TEMPLATE_NAME=elf32 diff --git a/ld/scripttempl/v850_rh850.sc b/ld/scripttempl/v850_rh850.sc new file mode 100644 index 0000000..5f79d34 --- /dev/null +++ b/ld/scripttempl/v850_rh850.sc @@ -0,0 +1,259 @@ +cat << EOF +OUTPUT_FORMAT("elf32-v850-rh850", "elf32-v850-rh850", + "elf32-v850-rh850") +OUTPUT_ARCH(v850-rh850) +${RELOCATING+ENTRY(_start)} +SEARCH_DIR(.); +EXTERN(__ctbp __ep __gp); +SECTIONS +{ + /* This saves a little space in the ELF file, since the zda starts + at a higher location that the ELF headers take up. */ + + .zdata ${ZDATA_START_ADDR} : + { + *(.zdata) + *(.zdata23) + *(.zbss) + *(.zbss23) + *(reszdata) + *(.zcommon) + } + + /* This is the read only part of the zero data area. + Having it as a seperate section prevents its + attributes from being inherited by the zdata + section. Specifically it prevents the zdata + section from being marked READONLY. */ + + .rozdata ${ROZDATA_START_ADDR} : + { + *(.rozdata) + *(romzdata) + *(romzbss) + *(.zconst) + *(.zconst23) + } + + /* Read-only sections, merged into text segment. */ + . = ${TEXT_START_ADDR}; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.gcc_except_table : { *(.rel.gcc_except_table) } + .rela.gcc_except_table : { *(.rela.gcc_except_table) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.init : { *(.rel.init) } + .rela.init : { *(.rela.init) } + .rel.fini : { *(.rel.fini) } + .rela.fini : { *(.rela.fini) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { KEEP (*(.init)) } =0 + .plt : { *(.plt) } + + .text : + { + *(.text) + ${RELOCATING+*(.text.*)} + + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t*) + } =0 + + ${RELOCATING+_etext = .;} + ${RELOCATING+PROVIDE (etext = .);} + + /* This is special code area at the end of the normal text section. + It contains a small lookup table at the start followed by the + code pointed to by entries in the lookup table. */ + + .call_table_data ${CALL_TABLE_START_ADDR} : + { + ${RELOCATING+PROVIDE(__ctbp = .);} + *(.call_table_data) + } = 0xff /* Fill gaps with 0xff. */ + + .call_table_text : + { + *(.call_table_text) + } + + .fini : { KEEP (*(.fini)) } =0 + .rodata : + { + *(.rodata) + ${RELOCATING+*(.rodata.*)} + *(.gnu.linkonce.r*) + *(.const) + } + .rodata1 : { *(.rodata1) } + + .data : + { + *(.data) + ${RELOCATING+*(.data.*)} + *(.gnu.linkonce.d*) + CONSTRUCTORS + } + .data1 : { *(.data1) } + .ctors : + { + ${CONSTRUCTING+___ctors = .;} + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend(.ctors)) + ${CONSTRUCTING+___ctors_end = .;} + } + .dtors : + { + ${CONSTRUCTING+___dtors = .;} + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + ${CONSTRUCTING+___dtors_end = .;} + } + .jcr : + { + KEEP (*(.jcr)) + } + + .gcc_except_table : { *(.gcc_except_table) } + + .got : { *(.got.plt) *(.got) } + .dynamic : { *(.dynamic) } + + .tdata ${TDATA_START_ADDR} : + { + ${RELOCATING+PROVIDE (__ep = .);} + *(.edata) + *(.edata23) + *(.tbyte) + *(.tcommon_byte) + *(.tdata) + *(.tdata*) + *(.ebss) + *(.ebss23) + *(.tbss) + *(.tbss*) + *(.tcommon) + } + + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + + .sdata ${SDATA_START_ADDR} : + { + ${RELOCATING+PROVIDE (__gp = . + 0x8000);} + *(.sdata) + *(.sdata23) + } + + /* See comment about .rozdata. */ + .rosdata ${ROSDATA_START_ADDR} : + { + *(.rosdata) + *(.sconst) + *(.sconst23) + } + + /* We place the .sbss data section AFTER the .rosdata section, so that + it can directly preceed the .bss section. This allows runtime startup + code to initialise all the zero-data sections by simply taking the + value of '_edata' and zeroing until it reaches '_end'. */ + + .sbss : + { + ${RELOCATING+__sbss_start = .;} + *(.sbss) + *(.sbss23) + *(.scommon) + } + + ${RELOCATING+_edata = DEFINED (__sbss_start) ? __sbss_start : . ;} + ${RELOCATING+PROVIDE (edata = _edata);} + + .bss : + { + ${RELOCATING+__bss_start = DEFINED (__sbss_start) ? __sbss_start : . ;} + ${RELOCATING+__real_bss_start = . ;} + *(.dynbss) + *(.bss) + *(COMMON) + } + + ${RELOCATING+_end = . ;} + ${RELOCATING+PROVIDE (end = .);} + ${RELOCATING+PROVIDE (_heap_start = .);} + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions. */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + + /* User stack. */ + .stack 0x200000 : + { + ${RELOCATING+__stack = .;} + *(.stack) + } +} +EOF -- cgit v1.1