From 73a63ccf2f0f856eebf7fee67309fe2a276c39d6 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 22 Sep 2010 20:59:00 +0000 Subject: opcodes/gas: blackfin: support OUTC debug insn The disassembler has partial (but incomplete/broken) support already for the pseudo debug insn OUTC, so let's fix it up and finish it. And now that the disassembler can handle it, make sure our assembler can output it too. Signed-off-by: Mike Frysinger --- include/opcode/ChangeLog | 4 ++++ include/opcode/bfin.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) (limited to 'include') diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 2774194..e467f5a 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2010-09-22 Mike Frysinger + + * bfin.h: Declare pseudoChr structs/defines. + 2010-09-21 Mike Frysinger * bfin.h: Strip trailing whitespace. diff --git a/include/opcode/bfin.h b/include/opcode/bfin.h index 925bf14..819ba6e 100755 --- a/include/opcode/bfin.h +++ b/include/opcode/bfin.h @@ -987,6 +987,34 @@ typedef struct PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \ }; +/* pseudoChr ++---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ +| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................| ++---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ +*/ + +typedef struct +{ + unsigned short opcode; + int bits_ch; + int mask_ch; + int bits_code; + int mask_code; +} PseudoChr; + +#define PseudoChr_opcode 0xf900 +#define PseudoChr_ch_bits 0 +#define PseudoChr_ch_mask 0xff +#define PseudoChr_code_bits 8 +#define PseudoChr_code_mask 0xff + +#define init_PseudoChr \ +{ \ + PseudoChr_opcode, \ + PseudoChr_ch_bits, PseudoChr_ch_mask, \ + PseudoChr_code_bits, PseudoChr_code_mask \ +}; + /* CaCTRL +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| -- cgit v1.1