From e38d4e1aae6fb86cfae320ae6ae9b2b48cd1ddb7 Mon Sep 17 00:00:00 2001 From: Daniel Jacobowitz Date: Sun, 27 Jul 2008 20:52:42 +0000 Subject: * mips-linux-tdep.c (mips_linux_syscall_next_pc): New function. (mips_linux_init_abi): Set tdep->syscall_next_pc. * mips-tdep.c (enum mips_fpu_type, struct gdbarch_tdep): Move to mips-tdep.h. (mips32_next_pc): Handle the syscall instruction. * mips-tdep.h (enum mips_fpu_type, struct gdbarch_tdep): New, from mips-tdep.c. Add syscall_next_pc to gdbarch_tdep. --- gdb/mips-tdep.h | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'gdb/mips-tdep.h') diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h index 3917951..85c40d9 100644 --- a/gdb/mips-tdep.h +++ b/gdb/mips-tdep.h @@ -56,6 +56,51 @@ struct mips_regnum }; extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch); +/* Some MIPS boards don't support floating point while others only + support single-precision floating-point operations. */ + +enum mips_fpu_type +{ + MIPS_FPU_DOUBLE, /* Full double precision floating point. */ + MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */ + MIPS_FPU_NONE /* No floating point. */ +}; + +/* MIPS specific per-architecture information */ +struct gdbarch_tdep +{ + /* from the elf header */ + int elf_flags; + + /* mips options */ + enum mips_abi mips_abi; + enum mips_abi found_abi; + enum mips_fpu_type mips_fpu_type; + int mips_last_arg_regnum; + int mips_last_fp_arg_regnum; + int default_mask_address_p; + /* Is the target using 64-bit raw integer registers but only + storing a left-aligned 32-bit value in each? */ + int mips64_transfers_32bit_regs_p; + /* Indexes for various registers. IRIX and embedded have + different values. This contains the "public" fields. Don't + add any that do not need to be public. */ + const struct mips_regnum *regnum; + /* Register names table for the current register set. */ + const char **mips_processor_reg_names; + + /* The size of register data available from the target, if known. + This doesn't quite obsolete the manual + mips64_transfers_32bit_regs_p, since that is documented to force + left alignment even for big endian (very strange). */ + int register_size_valid_p; + int register_size; + + /* Return the expected next PC if FRAME is stopped at a syscall + instruction. */ + CORE_ADDR (*syscall_next_pc) (struct frame_info *frame); +}; + /* Register numbers of various important registers. */ enum -- cgit v1.1