From 0ac7be2557fff39765e8a16724e90966f50efa67 Mon Sep 17 00:00:00 2001 From: Joel Brobecker Date: Tue, 28 Sep 2010 21:46:09 +0000 Subject: Add a sparc simulator with the sparc bareboard target. gdb/ChangeLog: * configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a. (sparc-*-rtems*): Delete, now redundant with the sparc-*-* case. --- gdb/configure.tgt | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'gdb/configure.tgt') diff --git a/gdb/configure.tgt b/gdb/configure.tgt index 80cfb49..24a6bf9 100644 --- a/gdb/configure.tgt +++ b/gdb/configure.tgt @@ -514,15 +514,11 @@ sparc-*-solaris2* | sparcv9-*-solaris2* | sparc64-*-solaris2*) gdb_target_obs="sparc64-tdep.o sparc64-sol2-tdep.o sparc-tdep.o \ sparc-sol2-tdep.o sol2-tdep.o solib.o solib-svr4.o" ;; -sparc-*-rtems*) - # Target: SPARC embedded with simulator - gdb_target_obs="sparc-tdep.o" - gdb_sim=../sim/erc32/libsim.a - ;; sparc-*-*) # Target: SPARC gdb_target_obs="sparc-tdep.o ravenscar-thread.o \ ravenscar-sparc-thread.o" + gdb_sim=../sim/erc32/libsim.a ;; sparc64-*-*) # Target: UltraSPARC -- cgit v1.1