From 8b89fe14b522cd6e5d160ff17defa8ecec243b11 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 3 Nov 2016 09:13:01 -0700 Subject: X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80 in 32-bit mode. gas/ PR binutils/20754 * testsuite/gas/i386/opcode.s: Add tests for opcode 0x82. * testsuite/gas/i386/opcode-intel.d: Updated. * testsuite/gas/i386/opcode.d: Likewise. opcodes/ PR binutils/20754 * i386-dis.c (REG_82): New. (X86_64_82_REG_0): Likewise. (X86_64_82_REG_1): Likewise. (X86_64_82_REG_2): Likewise. (X86_64_82_REG_3): Likewise. (X86_64_82_REG_4): Likewise. (X86_64_82_REG_5): Likewise. (X86_64_82_REG_6): Likewise. (X86_64_82_REG_7): Likewise. (dis386): Use REG_82. (reg_table): Add REG_82. (x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1, X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4, X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7. --- gas/ChangeLog | 7 +++++++ gas/testsuite/gas/i386/opcode-intel.d | 8 ++++++++ gas/testsuite/gas/i386/opcode.d | 8 ++++++++ gas/testsuite/gas/i386/opcode.s | 9 +++++++++ 4 files changed, 32 insertions(+) (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 0030ab3..9fc7e1b 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2016-11-03 H.J. Lu + + PR binutils/20754 + * testsuite/gas/i386/opcode.s: Add tests for opcode 0x82. + * testsuite/gas/i386/opcode-intel.d: Updated. + * testsuite/gas/i386/opcode.d: Likewise. + 2016-11-02 Jiong Wang * config/tc-arm.c (SBIT_SHIFT): New. diff --git a/gas/testsuite/gas/i386/opcode-intel.d b/gas/testsuite/gas/i386/opcode-intel.d index 23b7afa..6a6c86f 100644 --- a/gas/testsuite/gas/i386/opcode-intel.d +++ b/gas/testsuite/gas/i386/opcode-intel.d @@ -592,4 +592,12 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp edx,DWORD PTR \[eax-0x6f6f6f70\] [ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp dx,WORD PTR \[eax-0x6f6f6f70\] [ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnp dx,WORD PTR \[eax-0x6f6f6f70\] + +[a-f0-9]+: 82 c3 01 add bl,0x1 + +[a-f0-9]+: 82 f3 01 xor bl,0x1 + +[a-f0-9]+: 82 d3 01 adc bl,0x1 + +[a-f0-9]+: 82 db 01 sbb bl,0x1 + +[a-f0-9]+: 82 e3 01 and bl,0x1 + +[a-f0-9]+: 82 eb 01 sub bl,0x1 + +[a-f0-9]+: 82 f3 01 xor bl,0x1 + +[a-f0-9]+: 82 fb 01 cmp bl,0x1 #pass diff --git a/gas/testsuite/gas/i386/opcode.d b/gas/testsuite/gas/i386/opcode.d index 1a94fc8..2294f64 100644 --- a/gas/testsuite/gas/i386/opcode.d +++ b/gas/testsuite/gas/i386/opcode.d @@ -591,4 +591,12 @@ Disassembly of section .text: [ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%edx [ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%dx [ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%dx + +[a-f0-9]+: 82 c3 01 add \$0x1,%bl + +[a-f0-9]+: 82 f3 01 xor \$0x1,%bl + +[a-f0-9]+: 82 d3 01 adc \$0x1,%bl + +[a-f0-9]+: 82 db 01 sbb \$0x1,%bl + +[a-f0-9]+: 82 e3 01 and \$0x1,%bl + +[a-f0-9]+: 82 eb 01 sub \$0x1,%bl + +[a-f0-9]+: 82 f3 01 xor \$0x1,%bl + +[a-f0-9]+: 82 fb 01 cmp \$0x1,%bl #pass diff --git a/gas/testsuite/gas/i386/opcode.s b/gas/testsuite/gas/i386/opcode.s index a07e423..001a114 100644 --- a/gas/testsuite/gas/i386/opcode.s +++ b/gas/testsuite/gas/i386/opcode.s @@ -589,3 +589,12 @@ foo: cmovpo 0x90909090(%eax),%edx cmovpe 0x90909090(%eax),%dx cmovpo 0x90909090(%eax),%dx + + .byte 0x82, 0xc3, 0x01 + .byte 0x82, 0xf3, 0x01 + .byte 0x82, 0xd3, 0x01 + .byte 0x82, 0xdb, 0x01 + .byte 0x82, 0xe3, 0x01 + .byte 0x82, 0xeb, 0x01 + .byte 0x82, 0xf3, 0x01 + .byte 0x82, 0xfb, 0x01 -- cgit v1.1