From 5b7c81bd8cc80253a48c7045e4d2c8d2bf178eb9 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 31 Mar 2021 10:42:05 +1030 Subject: Use bool in gas * as.h (POISON_BFD_BOOLEAN): Define. * as.c, * as.h, * atof-generic.c, * config/atof-ieee.c, * config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c, * config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c, * config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c, * config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h, * config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c, * config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h, * config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c, * config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h, * config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c, * config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h, * config/tc-metag.c, * config/tc-metag.h, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c, * config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h, * config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c, * config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c, * config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h, * config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c, * config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xstormy16.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z8k.c, * config/xtensa-istack.h, * config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c, * dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c, * frags.h, * listing.c, * macro.c, * output-file.c, * read.c, * read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true. --- gas/ChangeLog | 48 ++ gas/as.c | 12 +- gas/as.h | 8 +- gas/atof-generic.c | 2 +- gas/config/atof-ieee.c | 2 +- gas/config/bfin-aux.h | 2 +- gas/config/obj-coff.c | 8 +- gas/config/obj-ecoff.c | 2 +- gas/config/obj-elf.c | 58 +-- gas/config/obj-elf.h | 2 +- gas/config/obj-som.c | 2 +- gas/config/tc-aarch64.c | 408 +++++++-------- gas/config/tc-alpha.c | 2 +- gas/config/tc-arc.c | 224 ++++---- gas/config/tc-arc.h | 2 +- gas/config/tc-arm.c | 856 +++++++++++++++--------------- gas/config/tc-arm.h | 14 +- gas/config/tc-avr.c | 64 +-- gas/config/tc-avr.h | 2 +- gas/config/tc-bfin.c | 30 +- gas/config/tc-bfin.h | 6 +- gas/config/tc-bpf.c | 2 +- gas/config/tc-cris.c | 38 +- gas/config/tc-csky.c | 666 ++++++++++++------------ gas/config/tc-csky.h | 2 +- gas/config/tc-d10v.c | 14 +- gas/config/tc-d10v.h | 2 +- gas/config/tc-d30v.c | 34 +- gas/config/tc-d30v.h | 4 +- gas/config/tc-dlx.c | 4 +- gas/config/tc-dlx.h | 2 +- gas/config/tc-epiphany.c | 32 +- gas/config/tc-epiphany.h | 2 +- gas/config/tc-fr30.c | 4 +- gas/config/tc-fr30.h | 2 +- gas/config/tc-frv.c | 30 +- gas/config/tc-frv.h | 4 +- gas/config/tc-ft32.c | 28 +- gas/config/tc-ft32.h | 4 +- gas/config/tc-h8300.c | 2 +- gas/config/tc-hppa.c | 44 +- gas/config/tc-i386-intel.c | 14 +- gas/config/tc-i386.c | 136 ++--- gas/config/tc-ia64.c | 12 +- gas/config/tc-ip2k.c | 4 +- gas/config/tc-iq2000.c | 14 +- gas/config/tc-iq2000.h | 6 +- gas/config/tc-lm32.c | 6 +- gas/config/tc-lm32.h | 2 +- gas/config/tc-m32c.c | 12 +- gas/config/tc-m32c.h | 2 +- gas/config/tc-m32r.c | 14 +- gas/config/tc-m32r.h | 2 +- gas/config/tc-m68hc11.c | 20 +- gas/config/tc-m68k.c | 2 +- gas/config/tc-mcore.c | 2 +- gas/config/tc-mcore.h | 8 +- gas/config/tc-mep.c | 4 +- gas/config/tc-mep.h | 2 +- gas/config/tc-metag.c | 348 ++++++------- gas/config/tc-metag.h | 2 +- gas/config/tc-microblaze.c | 38 +- gas/config/tc-mips.c | 1035 +++++++++++++++++++------------------ gas/config/tc-mips.h | 2 +- gas/config/tc-mmix.c | 2 +- gas/config/tc-mn10200.c | 20 +- gas/config/tc-mn10300.c | 72 +-- gas/config/tc-mn10300.h | 8 +- gas/config/tc-moxie.c | 2 +- gas/config/tc-msp430.c | 276 +++++----- gas/config/tc-msp430.h | 4 +- gas/config/tc-mt.c | 14 +- gas/config/tc-mt.h | 2 +- gas/config/tc-nds32.c | 550 ++++++++++---------- gas/config/tc-nds32.h | 6 +- gas/config/tc-nios2.c | 60 +-- gas/config/tc-ns32k.c | 2 +- gas/config/tc-or1k.c | 12 +- gas/config/tc-or1k.h | 2 +- gas/config/tc-pdp11.c | 8 +- gas/config/tc-ppc.c | 118 ++--- gas/config/tc-pru.c | 46 +- gas/config/tc-pru.h | 3 +- gas/config/tc-riscv.c | 228 ++++---- gas/config/tc-riscv.h | 2 +- gas/config/tc-rx.c | 38 +- gas/config/tc-rx.h | 2 +- gas/config/tc-s12z.c | 172 +++--- gas/config/tc-s12z.h | 2 +- gas/config/tc-s390.c | 64 +-- gas/config/tc-score.c | 110 ++-- gas/config/tc-score.h | 2 +- gas/config/tc-score7.c | 92 ++-- gas/config/tc-sh.c | 20 +- gas/config/tc-sh.h | 2 +- gas/config/tc-spu.c | 2 +- gas/config/tc-tic54x.c | 4 +- gas/config/tc-tic6x.c | 359 +++++++------ gas/config/tc-tic6x.h | 16 +- gas/config/tc-tilegx.c | 4 +- gas/config/tc-tilepro.c | 4 +- gas/config/tc-v850.c | 122 ++--- gas/config/tc-v850.h | 2 +- gas/config/tc-visium.c | 2 +- gas/config/tc-visium.h | 2 +- gas/config/tc-wasm32.c | 24 +- gas/config/tc-wasm32.h | 2 +- gas/config/tc-xc16x.c | 2 +- gas/config/tc-xgate.c | 16 +- gas/config/tc-xstormy16.c | 18 +- gas/config/tc-xstormy16.h | 2 +- gas/config/tc-xtensa.c | 1235 ++++++++++++++++++++++---------------------- gas/config/tc-xtensa.h | 6 +- gas/config/tc-z80.c | 36 +- gas/config/tc-z8k.c | 2 +- gas/config/xtensa-istack.h | 10 +- gas/config/xtensa-relax.c | 114 ++-- gas/config/xtensa-relax.h | 4 +- gas/dw2gencfi.c | 42 +- gas/dwarf2dbg.c | 76 +-- gas/dwarf2dbg.h | 4 +- gas/expr.c | 4 +- gas/expr.h | 2 +- gas/frags.c | 28 +- gas/frags.h | 8 +- gas/listing.c | 4 +- gas/macro.c | 8 +- gas/output-file.c | 2 +- gas/read.c | 10 +- gas/read.h | 4 +- gas/stabs.c | 12 +- gas/symbols.c | 2 +- gas/write.c | 16 +- 133 files changed, 4275 insertions(+), 4237 deletions(-) (limited to 'gas') diff --git a/gas/ChangeLog b/gas/ChangeLog index 174cc86..8c4eab1 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,53 @@ 2021-03-31 Alan Modra + * as.h (POISON_BFD_BOOLEAN): Define. + * as.c, * as.h, * atof-generic.c, * config/atof-ieee.c, + * config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c, + * config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c, + * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, + * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, + * config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c, + * config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c, + * config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c, + * config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h, + * config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c, + * config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h, + * config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c, + * config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c, + * config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c, + * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h, + * config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c, + * config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h, + * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c, + * config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h, + * config/tc-metag.c, * config/tc-metag.h, + * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h, + * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, + * config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c, + * config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h, + * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c, + * config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h, + * config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c, + * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, + * config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c, + * config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c, + * config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c, + * config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c, + * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c, + * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h, + * config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c, + * config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c, + * config/tc-xstormy16.c, * config/tc-xstormy16.h, + * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, + * config/tc-z8k.c, * config/xtensa-istack.h, + * config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c, + * dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c, + * frags.h, * listing.c, * macro.c, * output-file.c, * read.c, + * read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean + with bool, FALSE with false, and TRUE with true. + +2021-03-31 Alan Modra + * config/tc-aarch64.c: Include stdint.h in place of bfd_stdint.h. * config/tc-crx.c: Likewise. * config/tc-nds32.h: Likewise. diff --git a/gas/as.c b/gas/as.c index caa1c30..d12cb0f 100644 --- a/gas/as.c +++ b/gas/as.c @@ -108,7 +108,7 @@ unsigned int dwarf_level = 3; #if defined OBJ_ELF || defined OBJ_MAYBE_ELF int flag_use_elf_stt_common = DEFAULT_GENERATE_ELF_STT_COMMON; -bfd_boolean flag_generate_build_notes = DEFAULT_GENERATE_BUILD_NOTES; +bool flag_generate_build_notes = DEFAULT_GENERATE_BUILD_NOTES; #endif /* Keep the output file. */ @@ -862,7 +862,7 @@ This program has absolutely no warranty.\n")); break; case OPTION_GDWARF_SECTIONS: - flag_dwarf_sections = TRUE; + flag_dwarf_sections = true; break; case OPTION_GDWARF_CIE_VERSION: @@ -961,9 +961,9 @@ This program has absolutely no warranty.\n")); case OPTION_SIZE_CHECK: if (strcasecmp (optarg, "error") == 0) - flag_allow_nonconst_size = FALSE; + flag_allow_nonconst_size = false; else if (strcasecmp (optarg, "warning") == 0) - flag_allow_nonconst_size = TRUE; + flag_allow_nonconst_size = true; else as_fatal (_("Invalid --size-check= option: `%s'"), optarg); break; @@ -984,9 +984,9 @@ This program has absolutely no warranty.\n")); case OPTION_ELF_BUILD_NOTES: if (strcasecmp (optarg, "no") == 0) - flag_generate_build_notes = FALSE; + flag_generate_build_notes = false; else if (strcasecmp (optarg, "yes") == 0) - flag_generate_build_notes = TRUE; + flag_generate_build_notes = true; else as_fatal (_("Invalid --generate-missing-build-notes option: `%s'"), optarg); diff --git a/gas/as.h b/gas/as.h index d6ac208..295d20e 100644 --- a/gas/as.h +++ b/gas/as.h @@ -411,7 +411,7 @@ enum debug_info_type extern enum debug_info_type debug_type; extern int use_gnu_debug_info_extensions; -COMMON bfd_boolean flag_dwarf_sections; +COMMON bool flag_dwarf_sections; extern int flag_dwarf_cie_version; extern unsigned int dwarf_level; @@ -487,7 +487,7 @@ char * app_push (void); char * atof_ieee (char *, int, LITTLENUM_TYPE *); char * atof_ieee_detail (char *, int, int, LITTLENUM_TYPE *, FLONUM_TYPE *); -const char * ieee_md_atof (int, char *, int *, bfd_boolean); +const char * ieee_md_atof (int, char *, int *, bool); const char * vax_md_atof (int, char *, int *); char * input_scrub_include_file (const char *, char *); void input_scrub_insert_line (const char *); @@ -609,7 +609,7 @@ extern int flag_use_elf_stt_common; /* TRUE iff GNU Build attribute notes should be generated if none are in the input files. */ -extern bfd_boolean flag_generate_build_notes; +extern bool flag_generate_build_notes; /* If section name substitution sequences should be honored */ COMMON int flag_sectname_subst; @@ -662,4 +662,6 @@ COMMON int flag_sectname_subst; #define SEC_OCTETS 0 #endif +#define POISON_BFD_BOOLEAN 1 + #endif /* GAS */ diff --git a/gas/atof-generic.c b/gas/atof-generic.c index d123f02..91d8aba 100644 --- a/gas/atof-generic.c +++ b/gas/atof-generic.c @@ -233,7 +233,7 @@ atof_generic (/* return pointer to just AFTER number we read. */ if ( /* seen_significant_digit || */ c > '0') { - seen_significant_digit = TRUE; + seen_significant_digit = true; } } else diff --git a/gas/config/atof-ieee.c b/gas/config/atof-ieee.c index eeeabf7..fa988aa 100644 --- a/gas/config/atof-ieee.c +++ b/gas/config/atof-ieee.c @@ -755,7 +755,7 @@ const char * ieee_md_atof (int type, char *litP, int *sizeP, - bfd_boolean big_wordian) + bool big_wordian) { LITTLENUM_TYPE words[MAX_LITTLENUMS]; LITTLENUM_TYPE *wordP; diff --git a/gas/config/bfin-aux.h b/gas/config/bfin-aux.h index 8deb783..6653217 100644 --- a/gas/config/bfin-aux.h +++ b/gas/config/bfin-aux.h @@ -64,5 +64,5 @@ INSTR_T bfin_gen_linkage (int, int); INSTR_T bfin_gen_pseudodbg (int, int, int); INSTR_T bfin_gen_pseudodbg_assert (int, REG_T, int); INSTR_T bfin_gen_pseudochr (int); -bfd_boolean bfin_resource_conflict (INSTR_T, INSTR_T, INSTR_T); +bool bfin_resource_conflict (INSTR_T, INSTR_T, INSTR_T); INSTR_T bfin_gen_multi_instr (INSTR_T, INSTR_T, INSTR_T); diff --git a/gas/config/obj-coff.c b/gas/config/obj-coff.c index 05b4699..3c008a3 100644 --- a/gas/config/obj-coff.c +++ b/gas/config/obj-coff.c @@ -374,7 +374,7 @@ coff_obj_symbol_new_hook (symbolS *symbolP) memset (s, 0, sz); coffsymbol (symbol_get_bfdsym (symbolP))->native = (combined_entry_type *) s; - coffsymbol (symbol_get_bfdsym (symbolP))->native->is_sym = TRUE; + coffsymbol (symbol_get_bfdsym (symbolP))->native->is_sym = true; S_SET_DATA_TYPE (symbolP, T_NULL); S_SET_STORAGE_CLASS (symbolP, 0); @@ -1527,7 +1527,7 @@ obj_coff_section (int ignore ATTRIBUTE_UNUSED) unsigned int exp; flagword flags, oldflags; asection *sec; - bfd_boolean is_bss = FALSE; + bool is_bss = false; if (flag_mri) { @@ -1577,7 +1577,7 @@ obj_coff_section (int ignore ATTRIBUTE_UNUSED) /* Uninitialised data section. */ flags |= SEC_ALLOC; flags &=~ SEC_LOAD; - is_bss = TRUE; + is_bss = true; break; case 'n': @@ -1800,7 +1800,7 @@ obj_coff_init_stab_section (segT seg) memset (p, 0, 12); file = as_where ((unsigned int *) NULL); stabstr_name = concat (seg->name, "str", (char *) NULL); - stroff = get_stab_string_offset (file, stabstr_name, TRUE); + stroff = get_stab_string_offset (file, stabstr_name, true); know (stroff == 1); md_number_to_chars (p, stroff, 4); } diff --git a/gas/config/obj-ecoff.c b/gas/config/obj-ecoff.c index 37dbeb9..adc7077 100644 --- a/gas/config/obj-ecoff.c +++ b/gas/config/obj-ecoff.c @@ -189,7 +189,7 @@ obj_ecoff_set_ext (symbolS *sym, EXTR *ext) know (bfd_asymbol_flavour (symbol_get_bfdsym (sym)) == bfd_target_ecoff_flavour); esym = ecoffsymbol (symbol_get_bfdsym (sym)); - esym->local = FALSE; + esym->local = false; esym->native = xmalloc (debug_swap->external_ext_size); (*debug_swap->swap_ext_out) (stdoutput, ext, esym->native); } diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 2fb8ccd..8e8c6d5 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -520,7 +520,7 @@ static struct section_stack *section_stack; /* Return TRUE iff SEC matches the section info INF. */ -static bfd_boolean +static bool get_section_by_match (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf) { struct elf_section_match *match = (struct elf_section_match *) inf; @@ -621,7 +621,7 @@ obj_elf_change_section (const char *name, if (ssect != NULL) { - bfd_boolean override = FALSE; + bool override = false; if (type == SHT_NULL) type = ssect->type; @@ -694,15 +694,15 @@ obj_elf_change_section (const char *name, && (strcmp (name, ".interp") == 0 || strcmp (name, ".strtab") == 0 || strcmp (name, ".symtab") == 0)) - override = TRUE; + override = true; /* .note.GNU-stack can have SHF_EXECINSTR. */ else if (generic_attr == SHF_EXECINSTR && strcmp (name, ".note.GNU-stack") == 0) - override = TRUE; + override = true; #ifdef TC_ALPHA /* A section on Alpha may have SHF_ALPHA_GPREL. */ else if ((generic_attr & ~ssect->attr) == SHF_ALPHA_GPREL) - override = TRUE; + override = true; #endif #ifdef TC_RX else if (generic_attr == (SHF_EXECINSTR | SHF_WRITE | SHF_ALLOC) @@ -717,7 +717,7 @@ obj_elf_change_section (const char *name, if (match_p->group_name == NULL) as_warn (_("setting incorrect section attributes for %s"), name); - override = TRUE; + override = true; } } @@ -832,10 +832,10 @@ obj_elf_change_section (const char *name, static bfd_vma obj_elf_parse_section_letters (char *str, size_t len, - bfd_boolean *is_clone, bfd_vma *gnu_attr) + bool *is_clone, bfd_vma *gnu_attr) { bfd_vma attr = 0; - *is_clone = FALSE; + *is_clone = false; while (len > 0) { @@ -875,7 +875,7 @@ obj_elf_parse_section_letters (char *str, size_t len, *gnu_attr |= SHF_GNU_RETAIN; break; case '?': - *is_clone = TRUE; + *is_clone = true; break; /* Compatibility. */ case 'm': @@ -947,7 +947,7 @@ obj_elf_parse_section_letters (char *str, size_t len, } static int -obj_elf_section_type (char *str, size_t len, bfd_boolean warn) +obj_elf_section_type (char *str, size_t len, bool warn) { if (len == 8 && strncmp (str, "progbits", 8) == 0) return SHT_PROGBITS; @@ -1010,7 +1010,7 @@ obj_elf_section_word (char *str, size_t len, int *type) } #endif - ret = obj_elf_section_type (str, len, FALSE); + ret = obj_elf_section_type (str, len, false); if (ret != 0) *type = ret; else @@ -1184,7 +1184,7 @@ obj_elf_section (int push) if (*input_line_pointer == '"') { - bfd_boolean is_clone; + bool is_clone; beg = demand_copy_C_string (&dummy); if (beg == NULL) @@ -1212,7 +1212,7 @@ obj_elf_section (int push) ignore_rest_of_line (); return; } - type = obj_elf_section_type (beg, strlen (beg), TRUE); + type = obj_elf_section_type (beg, strlen (beg), true); } else if (c == '@' || c == '%') { @@ -1226,7 +1226,7 @@ obj_elf_section (int push) (void) restore_line_pointer (c); type = obj_elf_section_type (beg, input_line_pointer - beg, - TRUE); + true); } } else @@ -1278,7 +1278,7 @@ obj_elf_section (int push) if ((attr & SHF_GROUP) != 0 && is_clone) { as_warn (_("? section flag ignored with G present")); - is_clone = FALSE; + is_clone = false; } if ((attr & SHF_GROUP) != 0 && *input_line_pointer == ',') @@ -1356,7 +1356,7 @@ obj_elf_section (int push) if (ISDIGIT (* input_line_pointer)) { bfd_vma id; - bfd_boolean overflow; + bool overflow; char *t = input_line_pointer; if (sizeof (bfd_vma) <= sizeof (unsigned long)) { @@ -1430,7 +1430,7 @@ obj_elf_section (int push) if ((gnu_attr & (SHF_GNU_MBIND | SHF_GNU_RETAIN)) != 0) { const struct elf_backend_data *bed; - bfd_boolean mbind_p = (gnu_attr & SHF_GNU_MBIND) != 0; + bool mbind_p = (gnu_attr & SHF_GNU_MBIND) != 0; if (mbind_p && (attr & SHF_ALLOC) == 0) as_bad (_("SHF_ALLOC isn't set for GNU_MBIND section: %s"), name); @@ -1654,7 +1654,7 @@ obj_elf_find_and_add_versioned_name (const char *version_name, return NULL; } } - sy_obj->rename = TRUE; + sy_obj->rename = true; break; default: as_bad (_("invalid version name '%s' for symbol `%s'"), @@ -1735,7 +1735,7 @@ obj_elf_symver (int ignore ATTRIBUTE_UNUSED) if (obj_elf_find_and_add_versioned_name (name, sym_name, p, sy_obj) == NULL) { - sy_obj->bad_version = TRUE; + sy_obj->bad_version = true; ignore_rest_of_line (); return; } @@ -1946,7 +1946,7 @@ record_attribute (int vendor, unsigned int tag) /* Return true if we have seen an explicit specification of attribute TAG for vendor VENDOR. */ -bfd_boolean +bool obj_elf_seen_attribute (int vendor, unsigned int tag) { unsigned int base; @@ -1958,7 +1958,7 @@ obj_elf_seen_attribute (int vendor, unsigned int tag) for (rai = recorded_attributes; rai; rai = rai->next) if (rai->vendor == vendor && rai->base == base) return (rai->mask & mask) != 0; - return FALSE; + return false; } /* Parse an attribute directive for VENDOR. @@ -2489,7 +2489,7 @@ obj_elf_init_stab_section (segT seg) memset (p, 0, 12); file = remap_debug_filename (as_where (NULL)); stabstr_name = concat (segment_name (seg), "str", (char *) NULL); - stroff = get_stab_string_offset (file, stabstr_name, TRUE); + stroff = get_stab_string_offset (file, stabstr_name, true); know (stroff == 1 || (stroff == 0 && file[0] == '\0')); md_number_to_chars (p, stroff, 4); seg_info (seg)->stabu.p = p; @@ -2550,13 +2550,13 @@ elf_ecoff_set_ext (symbolS *sym, struct ecoff_extr *ext) supposed to *EXT to the external symbol information, and return whether the symbol should be used at all. */ -static bfd_boolean +static bool elf_get_extr (asymbol *sym, EXTR *ext) { if (sym->udata.p == NULL) - return FALSE; + return false; *ext = *(EXTR *) sym->udata.p; - return TRUE; + return true; } /* This function is called by bfd_ecoff_debug_externals. It has @@ -2613,7 +2613,7 @@ elf_frob_symbol (symbolS *symp, int *puntp) /* We will have already reported an version error. */ if (sy_obj->bad_version) - *puntp = TRUE; + *puntp = true; /* elf_frob_file_before_adjust only allows one version symbol for renamed symbol. */ else if (sy_obj->rename) @@ -2622,7 +2622,7 @@ elf_frob_symbol (symbolS *symp, int *puntp) { as_bad (_("`%s' can't be versioned to common symbol '%s'"), versioned_name->name, S_GET_NAME (symp)); - *puntp = TRUE; + *puntp = true; } else { @@ -2912,7 +2912,7 @@ elf_frob_file_before_adjust (void) return; } - sy_obj->rename = TRUE; + sy_obj->rename = true; } } @@ -2994,7 +2994,7 @@ elf_frob_file_after_relocs (void) /* Set up the external symbols. */ debug.ssext = debug.ssext_end = NULL; debug.external_ext = debug.external_ext_end = NULL; - if (! bfd_ecoff_debug_externals (stdoutput, &debug, debug_swap, TRUE, + if (! bfd_ecoff_debug_externals (stdoutput, &debug, debug_swap, true, elf_get_extr, elf_set_index)) as_fatal (_("failed to set up debugging information: %s"), bfd_errmsg (bfd_get_error ())); diff --git a/gas/config/obj-elf.h b/gas/config/obj-elf.h index c967db6..c096cfc 100644 --- a/gas/config/obj-elf.h +++ b/gas/config/obj-elf.h @@ -198,7 +198,7 @@ extern void obj_elf_vtable_inherit (int); extern void obj_elf_vtable_entry (int); extern struct fix * obj_elf_get_vtable_inherit (void); extern struct fix * obj_elf_get_vtable_entry (void); -extern bfd_boolean obj_elf_seen_attribute +extern bool obj_elf_seen_attribute (int, unsigned int); extern int obj_elf_vendor_attribute (int); diff --git a/gas/config/obj-som.c b/gas/config/obj-som.c index f3f028c..19c364b 100644 --- a/gas/config/obj-som.c +++ b/gas/config/obj-som.c @@ -247,7 +247,7 @@ obj_som_init_stab_section (segT seg) p = frag_more (12); memset (p, 0, 12); file = as_where ((unsigned int *) NULL); - stroff = get_stab_string_offset (file, "$GDB_STRINGS$", FALSE); + stroff = get_stab_string_offset (file, "$GDB_STRINGS$", false); know (stroff == 1); md_number_to_chars (p, stroff, 4); seg_info (seg)->stabu.p = p; diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 9dd1def..fdc1440 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -146,8 +146,8 @@ typedef struct aarch64_instruction aarch64_instruction; static aarch64_instruction inst; -static bfd_boolean parse_operands (char *, const aarch64_opcode *); -static bfd_boolean programmer_friendly_fixup (aarch64_instruction *); +static bool parse_operands (char *, const aarch64_opcode *); +static bool programmer_friendly_fixup (aarch64_instruction *); #ifdef OBJ_ELF # define now_instr_sequence seg_info \ @@ -180,7 +180,7 @@ clear_error (void) inst.parsing_error.error = NULL; } -static inline bfd_boolean +static inline bool error_p (void) { return inst.parsing_error.kind != AARCH64_OPDE_NIL; @@ -532,23 +532,23 @@ const char FLT_CHARS[] = "rRsSfFdDxXeEpPhH"; #define skip_whitespace(str) do { if (*(str) == ' ') ++(str); } while (0) -static inline bfd_boolean +static inline bool skip_past_char (char **str, char c) { if (**str == c) { (*str)++; - return TRUE; + return true; } else - return FALSE; + return false; } #define skip_past_comma(str) skip_past_char (str, ',') /* Arithmetic expressions (possibly involving symbols). */ -static bfd_boolean in_my_get_expression_p = FALSE; +static bool in_my_get_expression_p = false; /* Third argument to my_get_expression. */ #define GE_NO_PREFIX 0 @@ -558,7 +558,7 @@ static bfd_boolean in_my_get_expression_p = FALSE; as an valid expression; *EP will be filled with the information of such an expression. Otherwise return FALSE. */ -static bfd_boolean +static bool my_get_expression (expressionS * ep, char **str, int prefix_mode, int reject_absent) { @@ -585,9 +585,9 @@ my_get_expression (expressionS * ep, char **str, int prefix_mode, save_in = input_line_pointer; input_line_pointer = *str; - in_my_get_expression_p = TRUE; + in_my_get_expression_p = true; seg = expression (ep); - in_my_get_expression_p = FALSE; + in_my_get_expression_p = false; if (ep->X_op == O_illegal || (reject_absent && ep->X_op == O_absent)) { @@ -598,7 +598,7 @@ my_get_expression (expressionS * ep, char **str, int prefix_mode, set_fatal_syntax_error (_("bad expression")); else set_first_syntax_error (_("bad expression")); - return FALSE; + return false; } #ifdef OBJ_AOUT @@ -610,7 +610,7 @@ my_get_expression (expressionS * ep, char **str, int prefix_mode, set_syntax_error (_("bad segment")); *str = input_line_pointer; input_line_pointer = save_in; - return FALSE; + return false; } #else (void) seg; @@ -618,7 +618,7 @@ my_get_expression (expressionS * ep, char **str, int prefix_mode, *str = input_line_pointer; input_line_pointer = save_in; - return TRUE; + return true; } /* Turn a string in input_line_pointer into a floating point constant @@ -769,7 +769,7 @@ parse_reg (char **ccp) /* Return TRUE if REG->TYPE is a valid type of TYPE; otherwise return FALSE. */ -static bfd_boolean +static bool aarch64_check_reg_type (const reg_entry *reg, aarch64_reg_type type) { return (reg_type_masks[type] & (1 << reg->type)) != 0; @@ -852,7 +852,7 @@ aarch64_reg_parse_32_64 (char **ccp, aarch64_opnd_qualifier_t *qualifier) Accept only one occurrence of: 4b 8b 16b 2h 4h 8h 2s 4s 1d 2d b h s d q */ -static bfd_boolean +static bool parse_vector_type_for_operand (aarch64_reg_type reg_type, struct vector_type_el *parsed_type, char **str) { @@ -874,7 +874,7 @@ parse_vector_type_for_operand (aarch64_reg_type reg_type, if (width != 1 && width != 2 && width != 4 && width != 8 && width != 16) { first_error_fmt (_("bad size %d in vector width specifier"), width); - return FALSE; + return false; } elt_size: @@ -909,7 +909,7 @@ parse_vector_type_for_operand (aarch64_reg_type reg_type, first_error_fmt (_("unexpected character `%c' in element size"), *ptr); else first_error (_("missing element size")); - return FALSE; + return false; } if (width != 0 && width * element_size != 64 && width * element_size != 128 @@ -919,7 +919,7 @@ parse_vector_type_for_operand (aarch64_reg_type reg_type, first_error_fmt (_ ("invalid element size %d and vector size combination %c"), width, *ptr); - return FALSE; + return false; } ptr++; @@ -928,13 +928,13 @@ parse_vector_type_for_operand (aarch64_reg_type reg_type, *str = ptr; - return TRUE; + return true; } /* *STR contains an SVE zero/merge predication suffix. Parse it into *PARSED_TYPE and point *STR at the end of the suffix. */ -static bfd_boolean +static bool parse_predication_for_operand (struct vector_type_el *parsed_type, char **str) { char *ptr = *str; @@ -956,11 +956,11 @@ parse_predication_for_operand (struct vector_type_el *parsed_type, char **str) *ptr); else first_error (_("missing predication type")); - return FALSE; + return false; } parsed_type->width = 0; *str = ptr + 1; - return TRUE; + return true; } /* Parse a register of the type TYPE. @@ -977,13 +977,13 @@ parse_predication_for_operand (struct vector_type_el *parsed_type, char **str) static int parse_typed_reg (char **ccp, aarch64_reg_type type, aarch64_reg_type *rtype, - struct vector_type_el *typeinfo, bfd_boolean in_reg_list) + struct vector_type_el *typeinfo, bool in_reg_list) { char *str = *ccp; const reg_entry *reg = parse_reg (&str); struct vector_type_el atype; struct vector_type_el parsetype; - bfd_boolean is_typed_vecreg = FALSE; + bool is_typed_vecreg = false; atype.defined = 0; atype.type = NT_invtype; @@ -1021,7 +1021,7 @@ parse_typed_reg (char **ccp, aarch64_reg_type type, aarch64_reg_type *rtype, } /* Register if of the form Vn.[bhsdq]. */ - is_typed_vecreg = TRUE; + is_typed_vecreg = true; if (type == REG_TYPE_ZN || type == REG_TYPE_PN) { @@ -1118,7 +1118,7 @@ aarch64_reg_parse (char **ccp, aarch64_reg_type type, struct vector_type_el atype; char *str = *ccp; int reg = parse_typed_reg (&str, type, rtype, &atype, - /*in_reg_list= */ FALSE); + /*in_reg_list= */ false); if (reg == PARSE_FAIL) return PARSE_FAIL; @@ -1131,7 +1131,7 @@ aarch64_reg_parse (char **ccp, aarch64_reg_type type, return reg; } -static inline bfd_boolean +static inline bool eq_vector_type_el (struct vector_type_el e1, struct vector_type_el e2) { return @@ -1172,8 +1172,8 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, int in_range; int ret_val; int i; - bfd_boolean error = FALSE; - bfd_boolean expect_index = FALSE; + bool error = false; + bool expect_index = false; if (*str != '{') { @@ -1199,23 +1199,23 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, val_range = val; } val = parse_typed_reg (&str, type, NULL, &typeinfo, - /*in_reg_list= */ TRUE); + /*in_reg_list= */ true); if (val == PARSE_FAIL) { set_first_syntax_error (_("invalid vector register in list")); - error = TRUE; + error = true; continue; } /* reject [bhsd]n */ if (type == REG_TYPE_VN && typeinfo.defined == 0) { set_first_syntax_error (_("invalid scalar register in list")); - error = TRUE; + error = true; continue; } if (typeinfo.defined & NTA_HASINDEX) - expect_index = TRUE; + expect_index = true; if (in_range) { @@ -1223,7 +1223,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, { set_first_syntax_error (_("invalid range in vector register list")); - error = TRUE; + error = true; } val_range++; } @@ -1236,7 +1236,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, { set_first_syntax_error (_("type mismatch in vector register list")); - error = TRUE; + error = true; } } if (! error) @@ -1253,7 +1253,7 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, if (*str != '}') { set_first_syntax_error (_("end of vector register list not found")); - error = TRUE; + error = true; } str++; @@ -1269,29 +1269,29 @@ parse_vector_reg_list (char **ccp, aarch64_reg_type type, if (exp.X_op != O_constant) { set_first_syntax_error (_("constant expression required.")); - error = TRUE; + error = true; } if (! skip_past_char (&str, ']')) - error = TRUE; + error = true; else typeinfo_first.index = exp.X_add_number; } else { set_first_syntax_error (_("expected index")); - error = TRUE; + error = true; } } if (nb_regs > 4) { set_first_syntax_error (_("too many registers in vector register list")); - error = TRUE; + error = true; } else if (nb_regs == 0) { set_first_syntax_error (_("empty vector register list")); - error = TRUE; + error = true; } *ccp = str; @@ -1329,7 +1329,7 @@ insert_reg_alias (char *str, int number, aarch64_reg_type type) new->name = name; new->number = number; new->type = type; - new->builtin = FALSE; + new->builtin = false; str_hash_insert (aarch64_reg_hsh, name, new, 0); @@ -1343,7 +1343,7 @@ insert_reg_alias (char *str, int number, aarch64_reg_type type) If we find one, or if it looks sufficiently like one that we want to handle any error here, return TRUE. Otherwise return FALSE. */ -static bfd_boolean +static bool create_register_alias (char *newname, char *p) { const reg_entry *old; @@ -1354,17 +1354,17 @@ create_register_alias (char *newname, char *p) collapsed to single spaces. */ oldname = p; if (strncmp (oldname, " .req ", 6) != 0) - return FALSE; + return false; oldname += 6; if (*oldname == '\0') - return FALSE; + return false; old = str_hash_find (aarch64_reg_hsh, oldname); if (!old) { as_warn (_("unknown register '%s' -- .req ignored"), oldname); - return TRUE; + return true; } /* If TC_CASE_SENSITIVE is defined, then newname already points to @@ -1401,7 +1401,7 @@ create_register_alias (char *newname, char *p) if (insert_reg_alias (nbuf, old->number, old->type) == NULL) { free (nbuf); - return TRUE; + return true; } } @@ -1413,7 +1413,7 @@ create_register_alias (char *newname, char *p) } free (nbuf); - return TRUE; + return true; } /* Should never be called, as .req goes between the alias and the @@ -1746,7 +1746,7 @@ find_or_make_literal_pool (int size) /* Add the literal of size SIZE in *EXP to the relevant literal pool. Return TRUE on success, otherwise return FALSE. */ -static bfd_boolean +static bool add_to_lit_pool (expressionS *exp, int size) { literal_pool *pool; @@ -1779,7 +1779,7 @@ add_to_lit_pool (expressionS *exp, int size) if (entry >= MAX_LITERAL_POOL_SIZE) { set_syntax_error (_("literal pool overflow")); - return FALSE; + return false; } pool->literals[entry].exp = *exp; @@ -1801,7 +1801,7 @@ add_to_lit_pool (expressionS *exp, int size) exp->X_add_number = ((int) entry) * size; exp->X_add_symbol = pool->symbol; - return TRUE; + return true; } /* Can't use symbol_new here, so have to create a symbol and then at @@ -2165,14 +2165,14 @@ const pseudo_typeS md_pseudo_table[] = { state from being spoiled. The function currently serves parse_constant_immediate and parse_big_immediate only. */ -static bfd_boolean +static bool reg_name_p (char *str, aarch64_reg_type reg_type) { int reg; /* Prevent the diagnostics state from being spoiled. */ if (error_p ()) - return FALSE; + return false; reg = aarch64_reg_parse (&str, reg_type, NULL, NULL); @@ -2180,13 +2180,13 @@ reg_name_p (char *str, aarch64_reg_type reg_type) clear_error (); if (reg == PARSE_FAIL) - return FALSE; + return false; skip_whitespace (str); if (*str == ',' || is_end_of_line[(unsigned char) *str]) - return TRUE; + return true; - return FALSE; + return false; } /* Parser functions used exclusively in instruction operands. */ @@ -2198,14 +2198,14 @@ reg_name_p (char *str, aarch64_reg_type reg_type) done to find out whether STR is a register of type REG_TYPE followed by a comma or the end of line. Return FALSE if STR is such a string. */ -static bfd_boolean +static bool parse_immediate_expression (char **str, expressionS *exp, aarch64_reg_type reg_type) { if (reg_name_p (*str, reg_type)) { set_recoverable_error (_("immediate operand required")); - return FALSE; + return false; } my_get_expression (exp, str, GE_OPT_PREFIX, 1); @@ -2213,10 +2213,10 @@ parse_immediate_expression (char **str, expressionS *exp, if (exp->X_op == O_absent) { set_fatal_syntax_error (_("missing immediate expression")); - return FALSE; + return false; } - return TRUE; + return true; } /* Constant immediate-value read function for use in insn parsing. @@ -2226,22 +2226,22 @@ parse_immediate_expression (char **str, expressionS *exp, Return TRUE on success; otherwise return FALSE. */ -static bfd_boolean +static bool parse_constant_immediate (char **str, int64_t *val, aarch64_reg_type reg_type) { expressionS exp; if (! parse_immediate_expression (str, &exp, reg_type)) - return FALSE; + return false; if (exp.X_op != O_constant) { set_syntax_error (_("constant expression required")); - return FALSE; + return false; } *val = exp.X_add_number; - return TRUE; + return true; } static uint32_t @@ -2258,7 +2258,7 @@ encode_imm_float_bits (uint32_t imm) (+/-) n / 16 * power (2, r) where n and r are integers such that 16 <= n <=31 and -3 <= r <= 4. */ -static bfd_boolean +static bool aarch64_imm_float_p (uint32_t imm) { /* If a single-precision floating-point value has the following bit @@ -2288,7 +2288,7 @@ aarch64_imm_float_p (uint32_t imm) as an IEEE float without any loss of precision. Store the value in *FPWORD if so. */ -static bfd_boolean +static bool can_convert_double_to_float (uint64_t imm, uint32_t *fpword) { /* If a double-precision floating-point value has the following bit @@ -2310,7 +2310,7 @@ can_convert_double_to_float (uint64_t imm, uint32_t *fpword) /* Lower 29 bits need to be 0s. */ if ((imm & 0x1fffffff) != 0) - return FALSE; + return false; /* Prepare the pattern for 'Eeeeeeeee'. */ if (((high32 >> 30) & 0x1) == 0) @@ -2320,21 +2320,21 @@ can_convert_double_to_float (uint64_t imm, uint32_t *fpword) /* Check E~~~. */ if ((high32 & 0x78000000) != pattern) - return FALSE; + return false; /* Check Eeee_eeee != 1111_1111. */ if ((high32 & 0x7ff00000) == 0x47f00000) - return FALSE; + return false; *fpword = ((high32 & 0xc0000000) /* 1 n bit and 1 E bit. */ | ((high32 << 3) & 0x3ffffff8) /* 7 e and 20 s bits. */ | (low32 >> 29)); /* 3 S bits. */ - return TRUE; + return true; } /* Return true if we should treat OPERAND as a double-precision floating-point operand rather than a single-precision one. */ -static bfd_boolean +static bool double_precision_operand_p (const aarch64_opnd_info *operand) { /* Check for unsuffixed SVE registers, which are allowed @@ -2356,8 +2356,8 @@ double_precision_operand_p (const aarch64_opnd_info *operand) This routine accepts any IEEE float; it is up to the callers to reject invalid ones. */ -static bfd_boolean -parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p, +static bool +parse_aarch64_imm_float (char **ccp, int *immed, bool dp_p, aarch64_reg_type reg_type) { char *str = *ccp; @@ -2365,7 +2365,7 @@ parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p, LITTLENUM_TYPE words[MAX_LITTLENUMS]; int64_t val = 0; unsigned fpword = 0; - bfd_boolean hex_p = FALSE; + bool hex_p = false; skip_past_char (&str, '#'); @@ -2390,12 +2390,12 @@ parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p, else fpword = val; - hex_p = TRUE; + hex_p = true; } else if (reg_name_p (str, reg_type)) { set_recoverable_error (_("immediate operand required")); - return FALSE; + return false; } if (! hex_p) @@ -2415,11 +2415,11 @@ parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p, *immed = fpword; *ccp = str; - return TRUE; + return true; invalid_fp: set_fatal_syntax_error (_("invalid floating-point constant")); - return FALSE; + return false; } /* Less-generic immediate-value read function with the possibility of loading @@ -2431,7 +2431,7 @@ parse_aarch64_imm_float (char **ccp, int *immed, bfd_boolean dp_p, out whether STR is a register of type REG_TYPE followed by a comma or the end of line. Return FALSE if STR is such a register. */ -static bfd_boolean +static bool parse_big_immediate (char **str, int64_t *imm, aarch64_reg_type reg_type) { char *ptr = *str; @@ -2439,7 +2439,7 @@ parse_big_immediate (char **str, int64_t *imm, aarch64_reg_type reg_type) if (reg_name_p (ptr, reg_type)) { set_syntax_error (_("immediate operand required")); - return FALSE; + return false; } my_get_expression (&inst.reloc.exp, &ptr, GE_OPT_PREFIX, 1); @@ -2449,7 +2449,7 @@ parse_big_immediate (char **str, int64_t *imm, aarch64_reg_type reg_type) *str = ptr; - return TRUE; + return true; } /* Set operand IDX of the *INSTR that needs a GAS internal fixup. @@ -2470,7 +2470,7 @@ aarch64_set_gas_internal_fixup (struct reloc *reloc, /* Return TRUE if the instruction needs to be fixed up later internally by the GAS; otherwise return FALSE. */ -static inline bfd_boolean +static inline bool aarch64_gas_internal_fixup_p (void) { return inst.reloc.type == BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP; @@ -3096,7 +3096,7 @@ enum parse_shift_mode /* Parse a operator on an AArch64 data processing instruction. Return TRUE on success; otherwise return FALSE. */ -static bfd_boolean +static bool parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) { const struct aarch64_name_value_pair *shift_op; @@ -3112,7 +3112,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (p == *str) { set_syntax_error (_("shift expression expected")); - return FALSE; + return false; } shift_op = str_hash_find_n (aarch64_shift_hsh, *str, p - *str); @@ -3120,7 +3120,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (shift_op == NULL) { set_syntax_error (_("shift operator expected")); - return FALSE; + return false; } kind = aarch64_get_operand_modifier (shift_op); @@ -3128,7 +3128,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (kind == AARCH64_MOD_MSL && mode != SHIFTED_LSL_MSL) { set_syntax_error (_("invalid use of 'MSL'")); - return FALSE; + return false; } if (kind == AARCH64_MOD_MUL @@ -3136,7 +3136,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) && mode != SHIFTED_MUL_VL) { set_syntax_error (_("invalid use of 'MUL'")); - return FALSE; + return false; } switch (mode) @@ -3145,7 +3145,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (aarch64_extend_operator_p (kind)) { set_syntax_error (_("extending shift is not permitted")); - return FALSE; + return false; } break; @@ -3153,7 +3153,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (kind == AARCH64_MOD_ROR) { set_syntax_error (_("'ROR' shift is not permitted")); - return FALSE; + return false; } break; @@ -3161,7 +3161,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (kind != AARCH64_MOD_LSL) { set_syntax_error (_("only 'LSL' shift is permitted")); - return FALSE; + return false; } break; @@ -3169,7 +3169,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (kind != AARCH64_MOD_MUL) { set_syntax_error (_("only 'MUL' is permitted")); - return FALSE; + return false; } break; @@ -3187,7 +3187,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) } } set_syntax_error (_("only 'MUL VL' is permitted")); - return FALSE; + return false; case SHIFTED_REG_OFFSET: if (kind != AARCH64_MOD_UXTW && kind != AARCH64_MOD_LSL @@ -3195,7 +3195,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) { set_fatal_syntax_error (_("invalid shift for the register offset addressing mode")); - return FALSE; + return false; } break; @@ -3203,7 +3203,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (kind != AARCH64_MOD_LSL && kind != AARCH64_MOD_MSL) { set_syntax_error (_("invalid shift operator")); - return FALSE; + return false; } break; @@ -3236,14 +3236,14 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) if (!aarch64_extend_operator_p (kind) || exp_has_prefix) { set_syntax_error (_("missing shift amount")); - return FALSE; + return false; } operand->shifter.amount = 0; } else if (exp.X_op != O_constant) { set_syntax_error (_("constant shift amount required")); - return FALSE; + return false; } /* For parsing purposes, MUL #n has no inherent range. The range depends on the operand and will be checked by operand-specific @@ -3252,7 +3252,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) && (exp.X_add_number < 0 || exp.X_add_number > 63)) { set_fatal_syntax_error (_("shift amount out of range 0 to 63")); - return FALSE; + return false; } else { @@ -3264,7 +3264,7 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) operand->shifter.kind = kind; *str = p; - return TRUE; + return true; } /* Parse a for a data processing instruction: @@ -3276,36 +3276,36 @@ parse_shift (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) Return TRUE on success; otherwise return FALSE. */ -static bfd_boolean +static bool parse_shifter_operand_imm (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) { char *p; if (mode != SHIFTED_ARITH_IMM && mode != SHIFTED_LOGIC_IMM) - return FALSE; + return false; p = *str; /* Accept an immediate expression. */ if (! my_get_expression (&inst.reloc.exp, &p, GE_OPT_PREFIX, 1)) - return FALSE; + return false; /* Accept optional LSL for arithmetic immediate values. */ if (mode == SHIFTED_ARITH_IMM && skip_past_comma (&p)) if (! parse_shift (&p, operand, SHIFTED_LSL)) - return FALSE; + return false; /* Not accept any shifter for logical immediate values. */ if (mode == SHIFTED_LOGIC_IMM && skip_past_comma (&p) && parse_shift (&p, operand, mode)) { set_syntax_error (_("unexpected shift operator")); - return FALSE; + return false; } *str = p; - return TRUE; + return true; } /* Parse a for a data processing instruction: @@ -3322,7 +3322,7 @@ parse_shifter_operand_imm (char **str, aarch64_opnd_info *operand, Return TRUE on success; otherwise return FALSE. */ -static bfd_boolean +static bool parse_shifter_operand (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) { @@ -3337,13 +3337,13 @@ parse_shifter_operand (char **str, aarch64_opnd_info *operand, if (opd_class == AARCH64_OPND_CLASS_IMMEDIATE) { set_syntax_error (_("unexpected register in the immediate operand")); - return FALSE; + return false; } if (!aarch64_check_reg_type (reg, REG_TYPE_R_Z)) { set_syntax_error (_(get_reg_expected_msg (REG_TYPE_R_Z))); - return FALSE; + return false; } operand->reg.regno = reg->number; @@ -3351,19 +3351,19 @@ parse_shifter_operand (char **str, aarch64_opnd_info *operand, /* Accept optional shift operation on register. */ if (! skip_past_comma (str)) - return TRUE; + return true; if (! parse_shift (str, operand, mode)) - return FALSE; + return false; - return TRUE; + return true; } else if (opd_class == AARCH64_OPND_CLASS_MODIFIED_REG) { set_syntax_error (_("integer register expected in the extended/shifted operand " "register")); - return FALSE; + return false; } /* We have a shifted immediate variable. */ @@ -3372,7 +3372,7 @@ parse_shifter_operand (char **str, aarch64_opnd_info *operand, /* Return TRUE on success; return FALSE otherwise. */ -static bfd_boolean +static bool parse_shifter_operand_reloc (char **str, aarch64_opnd_info *operand, enum parse_shift_mode mode) { @@ -3397,14 +3397,14 @@ parse_shifter_operand_reloc (char **str, aarch64_opnd_info *operand, if (!(entry = find_reloc_table_entry (str))) { set_syntax_error (_("unknown relocation modifier")); - return FALSE; + return false; } if (entry->add_type == 0) { set_syntax_error (_("this relocation modifier is not allowed on this instruction")); - return FALSE; + return false; } /* Save str before we decompose it. */ @@ -3412,7 +3412,7 @@ parse_shifter_operand_reloc (char **str, aarch64_opnd_info *operand, /* Next, we parse the expression. */ if (! my_get_expression (&inst.reloc.exp, str, GE_NO_PREFIX, 1)) - return FALSE; + return false; /* Record the relocation type (use the ADD variant here). */ inst.reloc.type = entry->add_type; @@ -3420,7 +3420,7 @@ parse_shifter_operand_reloc (char **str, aarch64_opnd_info *operand, /* If str is empty, we've reached the end, stop here. */ if (**str == '\0') - return TRUE; + return true; /* Otherwise, we have a shifted reloc modifier, so rewind to recover the variable name and continue parsing for the shifter. */ @@ -3501,7 +3501,7 @@ parse_shifter_operand_reloc (char **str, aarch64_opnd_info *operand, for addressing modes not supported by the instruction, and to set inst.reloc.type. */ -static bfd_boolean +static bool parse_address_main (char **str, aarch64_opnd_info *operand, aarch64_opnd_qualifier_t *base_qualifier, aarch64_opnd_qualifier_t *offset_qualifier, @@ -3533,7 +3533,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (! entry) { set_syntax_error (_("unknown relocation modifier")); - return FALSE; + return false; } switch (operand->type) @@ -3553,14 +3553,14 @@ parse_address_main (char **str, aarch64_opnd_info *operand, set_syntax_error (_("this relocation modifier is not allowed on this " "instruction")); - return FALSE; + return false; } /* #:: */ if (! my_get_expression (exp, &p, GE_NO_PREFIX, 1)) { set_syntax_error (_("invalid relocation expression")); - return FALSE; + return false; } /* #:: */ @@ -3578,12 +3578,12 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (!my_get_expression (exp, &p, GE_NO_PREFIX, 1)) { set_syntax_error (_("invalid address")); - return FALSE; + return false; } } *str = p; - return TRUE; + return true; } /* [ */ @@ -3592,7 +3592,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (!reg || !aarch64_check_reg_type (reg, base_type)) { set_syntax_error (_(get_reg_expected_msg (base_type))); - return FALSE; + return false; } operand->addr.base_regno = reg->number; @@ -3608,7 +3608,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (!aarch64_check_reg_type (reg, offset_type)) { set_syntax_error (_(get_reg_expected_msg (offset_type))); - return FALSE; + return false; } /* [Xn,Rm */ @@ -3621,7 +3621,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (! parse_shift (&p, operand, SHIFTED_REG_OFFSET)) /* Use the diagnostics set in parse_shift, so not set new error message here. */ - return FALSE; + return false; } /* We only accept: [base,Xm] # For vector plus scalar SVE2 indexing. @@ -3635,7 +3635,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (*offset_qualifier == AARCH64_OPND_QLF_W) { set_syntax_error (_("invalid use of 32-bit register offset")); - return FALSE; + return false; } if (aarch64_get_qualifier_esize (*base_qualifier) != aarch64_get_qualifier_esize (*offset_qualifier) @@ -3644,13 +3644,13 @@ parse_address_main (char **str, aarch64_opnd_info *operand, || *offset_qualifier != AARCH64_OPND_QLF_X)) { set_syntax_error (_("offset has different size from base")); - return FALSE; + return false; } } else if (*offset_qualifier == AARCH64_OPND_QLF_X) { set_syntax_error (_("invalid use of 64-bit register offset")); - return FALSE; + return false; } } else @@ -3666,7 +3666,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (!(entry = find_reloc_table_entry (&p))) { set_syntax_error (_("unknown relocation modifier")); - return FALSE; + return false; } if (entry->ldst_type == 0) @@ -3674,7 +3674,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, set_syntax_error (_("this relocation modifier is not allowed on this " "instruction")); - return FALSE; + return false; } /* [Xn,#:: */ @@ -3684,7 +3684,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (! my_get_expression (exp, &p, GE_NO_PREFIX, 1)) { set_syntax_error (_("invalid relocation expression")); - return FALSE; + return false; } /* [Xn,#:: */ @@ -3697,13 +3697,13 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (! my_get_expression (exp, &p, GE_OPT_PREFIX, 1)) { set_syntax_error (_("invalid expression in the address")); - return FALSE; + return false; } /* [Xn, */ if (imm_shift_mode != SHIFTED_NONE && skip_past_comma (&p)) /* [Xn,, */ if (! parse_shift (&p, operand, imm_shift_mode)) - return FALSE; + return false; } } } @@ -3711,7 +3711,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (! skip_past_char (&p, ']')) { set_syntax_error (_("']' expected")); - return FALSE; + return false; } if (skip_past_char (&p, '!')) @@ -3720,7 +3720,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, { set_syntax_error (_("register offset not allowed in pre-indexed " "addressing mode")); - return FALSE; + return false; } /* [Xn]! */ operand->addr.writeback = 1; @@ -3734,7 +3734,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (operand->addr.preind) { set_syntax_error (_("cannot combine pre- and post-indexing")); - return FALSE; + return false; } reg = aarch64_reg_parse_32_64 (&p, offset_qualifier); @@ -3744,7 +3744,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, if (!aarch64_check_reg_type (reg, REG_TYPE_R_64)) { set_syntax_error (_(get_reg_expected_msg (REG_TYPE_R_64))); - return FALSE; + return false; } operand->addr.offset.regno = reg->number; @@ -3754,7 +3754,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, { /* [Xn],#expr */ set_syntax_error (_("invalid expression in the address")); - return FALSE; + return false; } } @@ -3778,7 +3778,7 @@ parse_address_main (char **str, aarch64_opnd_info *operand, { /* Reject [Rn]! */ set_syntax_error (_("missing offset in the pre-indexed address")); - return FALSE; + return false; } } else @@ -3799,12 +3799,12 @@ parse_address_main (char **str, aarch64_opnd_info *operand, } *str = p; - return TRUE; + return true; } /* Parse a base AArch64 address (as opposed to an SVE one). Return TRUE on success. */ -static bfd_boolean +static bool parse_address (char **str, aarch64_opnd_info *operand) { aarch64_opnd_qualifier_t base_qualifier, offset_qualifier; @@ -3815,7 +3815,7 @@ parse_address (char **str, aarch64_opnd_info *operand) /* Parse an address in which SVE vector registers and MUL VL are allowed. The arguments have the same meaning as for parse_address_main. Return TRUE on success. */ -static bfd_boolean +static bool parse_sve_address (char **str, aarch64_opnd_info *operand, aarch64_opnd_qualifier_t *base_qualifier, aarch64_opnd_qualifier_t *offset_qualifier) @@ -3827,7 +3827,7 @@ parse_sve_address (char **str, aarch64_opnd_info *operand, /* Parse an operand for a MOVZ, MOVN or MOVK instruction. Return TRUE on success; otherwise return FALSE. */ -static bfd_boolean +static bool parse_half (char **str, int *internal_fixup_p) { char *p = *str; @@ -3846,14 +3846,14 @@ parse_half (char **str, int *internal_fixup_p) if (!(entry = find_reloc_table_entry (&p))) { set_syntax_error (_("unknown relocation modifier")); - return FALSE; + return false; } if (entry->movw_type == 0) { set_syntax_error (_("this relocation modifier is not allowed on this instruction")); - return FALSE; + return false; } inst.reloc.type = entry->movw_type; @@ -3862,17 +3862,17 @@ parse_half (char **str, int *internal_fixup_p) *internal_fixup_p = 1; if (! my_get_expression (&inst.reloc.exp, &p, GE_NO_PREFIX, 1)) - return FALSE; + return false; *str = p; - return TRUE; + return true; } /* Parse an operand for an ADRP instruction: ADRP ,