From 13c02f06ff791ad9a09b562b141f07d9cefd52f8 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sun, 13 Feb 2011 18:55:22 +0000 Subject: opcodes: blackfin: fix decoding of ABS The single cycle dual mac ABS insn was incorrectly decoding the mac1 part of the insn. Once we fix the decode, update the gas tests to have the correct output. Signed-off-by: Mike Frysinger --- gas/testsuite/ChangeLog | 4 ++++ gas/testsuite/gas/bfin/arithmetic.d | 2 +- gas/testsuite/gas/bfin/parallel.d | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) (limited to 'gas') diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index fb8816d..50c23da 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2011-02-13 Mike Frysinger + * gas/bfin/arithmetic.d, gas/bfin/parallel.d: Change A0 to A1. + +2011-02-13 Mike Frysinger + * gas/bfin/arithmetic.d, gas/bfin/parallel.d, gas/bfin/parallel3.d, gas/bfin/vector.d, gas/bfin/vector2.d: Add ".L" to dsp mult insns. diff --git a/gas/testsuite/gas/bfin/arithmetic.d b/gas/testsuite/gas/bfin/arithmetic.d index 0f145e0..2cbdb71 100644 --- a/gas/testsuite/gas/bfin/arithmetic.d +++ b/gas/testsuite/gas/bfin/arithmetic.d @@ -10,7 +10,7 @@ Disassembly of section .text: 4: 10 c4 [0-3][[:xdigit:]] 40 A0 = ABS A1; 8: 30 c4 [0-3][[:xdigit:]] 00 A1 = ABS A0; c: 30 c4 [0-3][[:xdigit:]] 40 A1 = ABS A1; - 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A0, A0 = ABS A0; + 10: 10 c4 [0-3][[:xdigit:]] c0 A1 = ABS A1, A0 = ABS A0; 14: 07 c4 10 80 R0 = ABS R2; 00000018 : diff --git a/gas/testsuite/gas/bfin/parallel.d b/gas/testsuite/gas/bfin/parallel.d index db4c8fe..bd4269c 100644 --- a/gas/testsuite/gas/bfin/parallel.d +++ b/gas/testsuite/gas/bfin/parallel.d @@ -37,7 +37,7 @@ Disassembly of section .text: 74: fc b9 0a 9c 78: 30 cc 00 40 A1 = ABS A1 \|\| FP = \[SP\] \|\| R3 = \[I2--\]; 7c: 77 91 93 9c - 80: 10 cc 00 c0 A1 = ABS A0, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\]; + 80: 10 cc 00 c0 A1 = ABS A1, A0 = ABS A0 \|\| R4 = \[P5 \+ 0x38\] \|\| R0.H = W\[I0\]; 84: ac a3 40 9d 88: 07 cc 10 80 R0 = ABS R2 \|\| B\[SP\] = R0 \|\| R1.H = W\[I1\+\+\]; 8c: 30 9b 49 9c -- cgit v1.1