From 286d2f2cd79ef42dfd76de7f7ce046673848a02d Mon Sep 17 00:00:00 2001
From: Marcus Comstedt <marcus@mc.pp.se>
Date: Tue, 5 Jan 2021 22:50:37 +0100
Subject: RISC-V: Mention -mbig-endian and -mlittle-endian in doc

gas/
    * doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
    * doc/c-riscv.texi: Likewise.
---
 gas/doc/as.texi      | 1 +
 gas/doc/c-riscv.texi | 8 ++++++++
 2 files changed, 9 insertions(+)

(limited to 'gas/doc')

diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index ac45967..cf3597f 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -536,6 +536,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
    [@b{-fpic}|@b{-fPIC}|@b{-fno-pic}]
    [@b{-march}=@var{ISA}]
    [@b{-mabi}=@var{ABI}]
+   [@b{-mlittle-endian}|@b{-mbig-endian}]
 @end ifset
 @ifset RL78
 
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index eedd831..e945482 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -99,6 +99,14 @@ read-only CSR can not be written by the CSR instructions.
 @cindex @samp{-mno-csr-check} option, RISC-V
 @item -mno-csr-check
 Don't do CSR checking.
+
+@cindex @samp{-mlittle-endian} option, RISC-V
+@item -mlittle-endian
+Generate code for a little endian machine.
+
+@cindex @samp{-mbig-endian} option, RISC-V
+@item -mbig-endian
+Generate code for a big endian machine.
 @end table
 @c man end
 
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