From b8e61daa1ad56330fd8931c8a53bfa16d8e4a47a Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Tue, 10 Dec 2019 18:06:09 +1030 Subject: ubsan: epiphany: left shift of negative value Two places in epiphany_cgen_extract_operand, "value" is a long. value = ((((value) << (1))) + (pc)); cpu/ * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than shift left to avoid UB on left shift of negative values. opcodes/ * epiphany-ibld.c: Regenerate. --- cpu/ChangeLog | 5 +++++ cpu/epiphany.cpu | 4 ++-- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 87cec69..fd26cb7 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,8 @@ +2019-12-11 Alan Modra + + * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than + shift left to avoid UB on left shift of negative values. + 2019-11-20 Jose E. Marchesi * bpf.cpu: Fix comment describing the 128-bit instruction format. diff --git a/cpu/epiphany.cpu b/cpu/epiphany.cpu index 33c81d0..9f873b3 100644 --- a/cpu/epiphany.cpu +++ b/cpu/epiphany.cpu @@ -149,11 +149,11 @@ (df f-simm8 "branch displacement" (PCREL-ADDR RELOC) 15 8 INT ((value pc) (sra SI (sub SI value pc) 1)) - ((value pc) (add SI (sll SI value 1) pc))) + ((value pc) (add SI (mul SI value 2) pc))) (df f-simm24 "branch displacement" (PCREL-ADDR RELOC) 31 24 INT ((value pc) (sra SI (sub SI value pc) 1)) - ((value pc) (add SI (sll SI value 1) pc))) + ((value pc) (add SI (mul SI value 2) pc))) (df f-sdisp3 "signed immediate 3 bit" () 9 3 INT #f #f) -- cgit v1.1