From ae440402f54c634baddc462f8561442befe2cafe Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Tue, 19 May 2020 20:40:27 +0900 Subject: or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts Reported by Rich Felker when building on 32-bit hosts. Backwards jump negative offsets were not calculated correctly due to improper 32-bit to 64-bit zero-extension. The 64-bit fields are present because we are mixing 32-bit and 64-bit architectures in our cpu descriptions. Removing 64-bit fixes the issue. We don't use 64-bit, there is an architecture spec for 64-bit but no implementations or simulators. My thought is if we need them in the future we should do the proper work to support both 32-bit and 64-bit implementations co-existing then. cpu/ChangeLog: yyyy-mm-dd Stafford Horne PR 25184 * or1k.cpu (arch or1k): Remove or64 and or64nd machs. (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros. (cpu or1k64bf, mach or64, mach or64nd): Remove definitions. * or1kcommon.cpu (h-fdr): Remove hardware. * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions. (float-regreg-insn): Remove lf- mnemonic -d instruction pattern. (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern. (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern. (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove. --- cpu/or1kcommon.cpu | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'cpu/or1kcommon.cpu') diff --git a/cpu/or1kcommon.cpu b/cpu/or1kcommon.cpu index 6515440..9f102c9 100644 --- a/cpu/or1kcommon.cpu +++ b/cpu/or1kcommon.cpu @@ -115,20 +115,6 @@ ) ; -; Hardware: virtual registerts for FPU (double precision) -; mapped to GPRs -; -(define-hardware - (name h-fdr) - (comment "or64 floating point registers (double, virtual)") - (attrs VIRTUAL (MACH ORFPX64-MACHS)) - (type register DF (32)) - (indices keyword "" REG-INDICES) - (get (index) (subword DF (trunc DI (reg h-gpr index)) 0)) - (set (index newval) (set UDI (reg h-gpr index) (zext UDI (subword DI newval 0)))) - ) - -; ; Register pairs are offset by 2 for registers r16 and above. This is to ; be able to allow registers to be call saved in GCC across function calls. ; -- cgit v1.1