From bd434cc4d94ec3d2f9fc1e7c00c27b074f962bc1 Mon Sep 17 00:00:00 2001 From: "Jose E. Marchesi" Date: Thu, 30 Jan 2020 13:59:04 +0100 Subject: cpu,opcodes,gas: fix neg and neg32 instructions in BPF This patch fixes the neg/neg32 BPF instructions, which have K (=0) instead of X (=1) in their header source bit, despite operating on registes. cpu/ChangeLog: 2020-01-30 Jose E. Marchesi * bpf.cpu (define-alu-insn-un): The unary BPF instructions (neg and neg32) use OP_SRC_K even if they operate only in registers. opcodes/ChangeLog: 2020-01-30 Jose E. Marchesi * bpf-opc.c: Regenerate. gas/ChangeLog: 2020-01-30 Jose E. Marchesi * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'. * testsuite/gas/bpf/alu-be.d: Likewise. * testsuite/gas/bpf/alu32.d: Likewise for `neg32'. * testsuite/gas/bpf/alu32-be.d: Likewise. --- cpu/bpf.cpu | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/bpf.cpu') diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu index d5a8eac..1378bda 100644 --- a/cpu/bpf.cpu +++ b/cpu/bpf.cpu @@ -373,7 +373,7 @@ ((ISA (.sym ebpf x-endian))) (.str x-basename x-suffix " $dst" x-endian) (+ (f-imm32 0) (f-offset16 0) ((.sym f-src x-endian) 0) (.sym dst x-endian) - x-op-class OP_SRC_X x-op-code) () ())) + x-op-class OP_SRC_K x-op-code) () ())) (define-pmacro (define-alu-insn-bin x-basename x-suffix x-op-class x-op-code x-endian) (begin -- cgit v1.1