From 334d91b9407c5f9f37f224b0f43551c01964eff1 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 6 May 2019 08:43:32 +0930 Subject: PowerPC reloc symbols that shouldn't be adjusted GOT and PLT relocs shouldn't have their symbols replaced with a section symbol plus added. Nor should the HIGHA TLS relocations, which failed to be caught by the range test in ppc_fix_adjustable. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA), (BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry. gas/ * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT relocs, and VLE sdarel relocs. * testsuite/gas/ppc/power4.d: Adjust. --- bfd/libbfd.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'bfd/libbfd.h') diff --git a/bfd/libbfd.h b/bfd/libbfd.h index b51df73..d9b7fb7 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1508,20 +1508,20 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_PPC_GOT_DTPREL16_HA", "BFD_RELOC_PPC64_TPREL16_DS", "BFD_RELOC_PPC64_TPREL16_LO_DS", + "BFD_RELOC_PPC64_TPREL16_HIGH", + "BFD_RELOC_PPC64_TPREL16_HIGHA", "BFD_RELOC_PPC64_TPREL16_HIGHER", "BFD_RELOC_PPC64_TPREL16_HIGHERA", "BFD_RELOC_PPC64_TPREL16_HIGHEST", "BFD_RELOC_PPC64_TPREL16_HIGHESTA", "BFD_RELOC_PPC64_DTPREL16_DS", "BFD_RELOC_PPC64_DTPREL16_LO_DS", + "BFD_RELOC_PPC64_DTPREL16_HIGH", + "BFD_RELOC_PPC64_DTPREL16_HIGHA", "BFD_RELOC_PPC64_DTPREL16_HIGHER", "BFD_RELOC_PPC64_DTPREL16_HIGHERA", "BFD_RELOC_PPC64_DTPREL16_HIGHEST", "BFD_RELOC_PPC64_DTPREL16_HIGHESTA", - "BFD_RELOC_PPC64_TPREL16_HIGH", - "BFD_RELOC_PPC64_TPREL16_HIGHA", - "BFD_RELOC_PPC64_DTPREL16_HIGH", - "BFD_RELOC_PPC64_DTPREL16_HIGHA", "BFD_RELOC_I370_D12", "BFD_RELOC_CTOR", "BFD_RELOC_ARM_PCREL_BRANCH", -- cgit v1.1