From 19f7b01094d236648a8b0de2ef24cf8510594e9c Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 20 Oct 2000 10:38:47 +0000 Subject: gas/ * config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p instructions to loose any special insn->architecture mask. * config/tc-sparc.c (v9a_asr_table): Add v9b ASRs. (sparc_md_end, sparc_arch_types, sparc_arch, sparc_elf_final_processing): Handle v8plusb and v9b architectures. (sparc_ip): Handle siam mode operands. Support v9b ASRs (and request v9b architecture if they are used). bfd/ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data, elf32_sparc_object_p, elf32_sparc_final_write_processing): Support v8plusb. * elf64-sparc.c (sparc64_elf_merge_private_bfd_data, sparc64_elf_object_p): Support v9b. * archures.c: Declare v8plusb and v9b machines. * bfd-in2.h: Ditto. * cpu-sparc.c: Ditto. include/opcode/ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. Note that '3' is used for siam operand. opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. (compute_arch_mask): Add v8plusb and v9b machines. (print_insn_sparc): siam mode decoding, accept ASRs up to 25. * opcodes/sparc-opc.c: Support for Cheetah instruction set. (prefetch_table): Add #invalidate. --- bfd/elf64-sparc.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) (limited to 'bfd/elf64-sparc.c') diff --git a/bfd/elf64-sparc.c b/bfd/elf64-sparc.c index 2efe034..e63bc3b 100644 --- a/bfd/elf64-sparc.c +++ b/bfd/elf64-sparc.c @@ -2929,25 +2929,26 @@ sparc64_elf_merge_private_bfd_data (ibfd, obfd) else /* Incompatible flags */ { error = false; - + +#define EF_SPARC_ISA_EXTENSIONS \ + (EF_SPARC_SUN_US1 | EF_SPARC_SUN_US3 | EF_SPARC_HAL_R1) + if ((ibfd->flags & DYNAMIC) != 0) { /* We don't want dynamic objects memory ordering and architecture to have any role. That's what dynamic linker should do. */ - new_flags &= ~(EF_SPARCV9_MM | EF_SPARC_SUN_US1 | EF_SPARC_HAL_R1); + new_flags &= ~(EF_SPARCV9_MM | EF_SPARC_ISA_EXTENSIONS); new_flags |= (old_flags - & (EF_SPARCV9_MM - | EF_SPARC_SUN_US1 - | EF_SPARC_HAL_R1)); + & (EF_SPARCV9_MM | EF_SPARC_ISA_EXTENSIONS)); } else { /* Choose the highest architecture requirements. */ - old_flags |= (new_flags & (EF_SPARC_SUN_US1 | EF_SPARC_HAL_R1)); - new_flags |= (old_flags & (EF_SPARC_SUN_US1 | EF_SPARC_HAL_R1)); - if ((old_flags & (EF_SPARC_SUN_US1 | EF_SPARC_HAL_R1)) - == (EF_SPARC_SUN_US1 | EF_SPARC_HAL_R1)) + old_flags |= (new_flags & EF_SPARC_ISA_EXTENSIONS); + new_flags |= (old_flags & EF_SPARC_ISA_EXTENSIONS); + if ((old_flags & (EF_SPARC_SUN_US1 | EF_SPARC_SUN_US3)) + && (old_flags & EF_SPARC_HAL_R1)) { error = true; (*_bfd_error_handler) @@ -3020,8 +3021,10 @@ sparc64_elf_object_p (abfd) bfd *abfd; { unsigned long mach = bfd_mach_sparc_v9; - - if (elf_elfheader (abfd)->e_flags & EF_SPARC_SUN_US1) + + if (elf_elfheader (abfd)->e_flags & EF_SPARC_SUN_US3) + mach = bfd_mach_sparc_v9b; + else if (elf_elfheader (abfd)->e_flags & EF_SPARC_SUN_US1) mach = bfd_mach_sparc_v9a; return bfd_default_set_arch_mach (abfd, bfd_arch_sparc, mach); } -- cgit v1.1