From 45f764234a71431b581340957a3c8338e0593fdb Mon Sep 17 00:00:00 2001
From: Andrew Waterman <andrew@sifive.com>
Date: Sun, 18 Dec 2016 22:53:48 -0800
Subject: Rework RISC-V relocations

Before this commit we didn't cleanly support CFI directives because the
internal offsets used to get relaxed which broke them.  This patch
significantly reworks how we handle linker relaxations:

 * DWARF is now properly supported

 * There is a ".option norelax" to disable relaxations, for when users
   write assembly that can't be relaxed (if it's to be later patched up,
   for example).

 * There is an additional _RELAX relocation that specifies when previous
   relocations can be relaxed.

We're in the process of documenting the RISC-V ELF ABI, which will
include documentation of our relocations

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

but we expect that this relocation set will remain ABI compatible in the
future (ie, it's safe to release).

Thanks to Kuan-Lin Chen for figuring out how to correctly relax the
debug info!

include/
	* elf/riscv.h: Add R_RISCV_TPREL_I through R_RISCV_SET32.
bfd/
	* reloc.c (BFD_RELOC_RISCV_TPREL_I): New relocation.
	(BFD_RELOC_RISCV_TPREL_S): Likewise.
	(BFD_RELOC_RISCV_RELAX): Likewise.
	(BFD_RELOC_RISCV_CFA): Likewise.
	(BFD_RELOC_RISCV_SUB6): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET8): Likewise.
	(BFD_RELOC_RISCV_SET16): Likewise.
	(BFD_RELOC_RISCV_SET32): Likewise.
	* elfnn-riscv.c (perform_relocation): Handle the new
	relocations.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Likewise.
	(howto_table): Likewise.
	(riscv_reloc_map): Likewise.
	(relax_func_t): New type.
	(_bfd_riscv_relax_call): Add reserve_size argument, which
	controls the maximal offset pessimism.  Correct type of max_alignment.
	(_bfd_riscv_relax_lui): Likewise.
	(_bfd_riscv_relax_tls_le): Likewise.
	(_bfd_riscv_relax_align): Likewise.
	(_bfd_riscv_relax_section): Compute the required reserve size
	when relocating and use it to when calling relax_func.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Likewise.
gas/
	* config/tc-riscv.c (riscv_set_options): Add relax.
	(riscv_opts): Likewise.
	(s_riscv_option): Add relax and norelax.
	(riscv_apply_const_reloc): New function.
	(append_insn): Move constant relocation handling to
	riscv_apply_const_reloc.
	(md_pcrel_from): Likewise.
	(parse_relocation): Skip BFD_RELOC_UNUSED.
	(md_pcrel_from): Handle BFD_RELOC_RISCV_SUB6,
	BFD_RELOC_RISCV_RELAX, BFD_RELOC_RISCV_CFA.
	(md_apply_fix): Likewise.
	(riscv_pre_output_hook): New function.
	* config/tc-riscv.h (md_pre_output_hook): Define.
	(riscv_pre_output_hook): Declare.
	(DWARF_CIE_DATA_ALIGNMENT): Always -4.
---
 bfd/bfd-in2.h | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'bfd/bfd-in2.h')

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 1c6b70f..b5ac178 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -4737,6 +4737,15 @@ number for the SBIC, SBIS, SBI and CBI instructions  */
   BFD_RELOC_RISCV_RVC_LUI,
   BFD_RELOC_RISCV_GPREL_I,
   BFD_RELOC_RISCV_GPREL_S,
+  BFD_RELOC_RISCV_TPREL_I,
+  BFD_RELOC_RISCV_TPREL_S,
+  BFD_RELOC_RISCV_RELAX,
+  BFD_RELOC_RISCV_CFA,
+  BFD_RELOC_RISCV_SUB6,
+  BFD_RELOC_RISCV_SET6,
+  BFD_RELOC_RISCV_SET8,
+  BFD_RELOC_RISCV_SET16,
+  BFD_RELOC_RISCV_SET32,
 
 /* Renesas RL78 Relocations.  */
   BFD_RELOC_RL78_NEG8,
-- 
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