From 70151fb54ab6e3d5dc7f99fe3fbfa7ad2f1ab2af Mon Sep 17 00:00:00 2001 From: Jiong Wang Date: Tue, 11 Aug 2015 17:38:49 +0100 Subject: [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 2015-08-11 Jiong Wang include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise. --- bfd/ChangeLog | 8 ++++++++ bfd/bfd-in2.h | 3 +++ bfd/elfnn-aarch64.c | 15 +++++++++++++++ bfd/libbfd.h | 1 + bfd/reloc.c | 4 ++++ gas/ChangeLog | 7 +++++++ gas/config/tc-aarch64.c | 11 +++++++++++ gas/testsuite/ChangeLog | 7 +++++++ gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d | 9 +++++++++ gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s | 5 +++++ gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d | 10 ++++++++++ gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s | 5 +++++ include/elf/ChangeLog | 4 ++++ include/elf/aarch64.h | 1 + 14 files changed, 90 insertions(+) create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d create mode 100644 gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 8c6de6f..61554a7 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,5 +1,13 @@ 2015-08-11 Jiong Wang + * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. + * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for + BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. + +2015-08-11 Jiong Wang + * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_reloc_got_type): Likewise. diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 350b955..3299055 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -5794,6 +5794,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */ /* AArch64 TLS INITIAL EXEC relocation. */ BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19, +/* Unsigned 12 bit byte offset to module TLS base address. */ + BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12, + /* Unsigned 12 bit byte offset to global offset table entry for a symbols tls_index structure. Used in conjunction with BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. */ diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c index 72d64fe..80beda7 100644 --- a/bfd/elfnn-aarch64.c +++ b/bfd/elfnn-aarch64.c @@ -1027,6 +1027,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] = 0x1ffffc, /* dst_mask */ FALSE), /* pcrel_offset */ + /* Unsigned 12 bit byte offset to module TLS base address. */ + HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12), /* type */ + 0, /* rightshift */ + 2, /* size (0 = byte, 1 = short, 2 = long) */ + 12, /* bitsize */ + FALSE, /* pc_relative */ + 0, /* bitpos */ + complain_overflow_unsigned, /* complain_on_overflow */ + bfd_elf_generic_reloc, /* special_function */ + AARCH64_R_STR (TLSLD_ADD_DTPREL_LO12), /* name */ + FALSE, /* partial_inplace */ + 0xfff, /* src_mask */ + 0xfff, /* dst_mask */ + FALSE), /* pcrel_offset */ + /* ADD: GOT offset G(S) & 0xff8 [no overflow check] */ HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */ 0, /* rightshift */ diff --git a/bfd/libbfd.h b/bfd/libbfd.h index d6ed8fd..72c50f5 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -2759,6 +2759,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19", + "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12", "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC", "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21", "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21", diff --git a/bfd/reloc.c b/bfd/reloc.c index df22f9b..376f0a7 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -6844,6 +6844,10 @@ ENUM ENUMDOC AArch64 TLS INITIAL EXEC relocation. ENUM + BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 +ENUMDOC + Unsigned 12 bit byte offset to module TLS base address. +ENUM BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC ENUMDOC Unsigned 12 bit byte offset to global offset table entry for a symbols diff --git a/gas/ChangeLog b/gas/ChangeLog index 314735a..e483f4f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,12 @@ 2015-08-11 Jiong Wang + * config/tc-aarch64.c (reloc_table): New relocation modifiers + "dtprel_lo12". + (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. + (aarch64_force_relocation): Likewise. + +2015-08-11 Jiong Wang + * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_force_relocation): Likewise. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index a633b04..df37541 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -2522,6 +2522,15 @@ static struct reloc_table_entry reloc_table[] = { 0, 0}, + /* 12 bit offset into the module TLS base address. */ + {"dtprel_lo12", 0, + 0, /* adr_type */ + 0, + 0, + BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12, + 0, + 0}, + /* Get to the page containing GOT TLS entry for a symbol */ {"gottprel", 0, 0, /* adr_type */ @@ -6787,6 +6796,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg) case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: + case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12: case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC: case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21: case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: @@ -6999,6 +7009,7 @@ aarch64_force_relocation (struct fix *fixp) case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: + case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12: case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC: case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21: case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9449f1d..958bf71 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,12 @@ 2015-08-11 Jiong Wang + * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. + * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. + * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. + * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise. + +2015-08-11 Jiong Wang + * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file. diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d new file mode 100644 index 0000000..0b1f5f8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.d @@ -0,0 +1,9 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0000000000000000 <.*>: + 0: 91000347 add x7, x26, #0x0 + 0: R_AARCH64_TLSLD_ADD_DTPREL_LO12 x diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s new file mode 100644 index 0000000..eac7ac6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-1.s @@ -0,0 +1,5 @@ +// Test file for AArch64 GAS -- dtprel_lo12 + +func: + // BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 + add x7, x26, #:dtprel_lo12:x diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d new file mode 100644 index 0000000..a44f9d2 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.d @@ -0,0 +1,10 @@ +#as: -mabi=ilp32 +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +00000000 <.*>: + 0: 110002a8 add w8, w21, #0x0 + 0: R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 x diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s new file mode 100644 index 0000000..ccbe385 --- /dev/null +++ b/gas/testsuite/gas/aarch64/reloc-dtprel_lo12-ilp32-1.s @@ -0,0 +1,5 @@ +// Test file for AArch64 GAS -- dtprel_lo12 ILP32 + +func: + // BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12 + add w8, w21, #:dtprel_lo12:x diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 3b1b75d..879daa0 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,5 +1,9 @@ 2015-08-11 Jiong Wang + * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. + +2015-08-11 Jiong Wang + * aarch64.h (R_AARCH64_P32_TLSLD_ADD_LO12_NC): Define. 2015-08-11 Jiong Wang diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h index 0eb97f3..8e23278 100644 --- a/include/elf/aarch64.h +++ b/include/elf/aarch64.h @@ -132,6 +132,7 @@ RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82) RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83) RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84) RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85) +RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91) RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103) RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104) RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105) -- cgit v1.1