From 5db33d76e135084aeffd36529325a76376cbf6e0 Mon Sep 17 00:00:00 2001 From: Joern Rennecke Date: Wed, 19 Jun 2002 14:28:09 +0000 Subject: * config/tc-sh.c (get_specific): Revert 2002-05-01 change. (assemble_ppi): Generate warning if the same register is used twice as destination in the same padd / pmuls instruction. --- gas/ChangeLog | 6 ++++++ gas/config/tc-sh.c | 30 +++++++++--------------------- 2 files changed, 15 insertions(+), 21 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 81c4d96..caebb52 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +Wed Jun 19 15:12:00 2002 Dhananjay R. Deshpande + + * config/tc-sh.c (get_specific): Revert 2002-05-01 change. + (assemble_ppi): Generate warning if the same register is used + twice as destination in the same padd / pmuls instruction. + 2002-06-18 Dave Brolley From Catherine Moore, Michael Meissner, Richard Sandiford, Dave Brolley: diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index e62a6f9..968ab4c 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -1589,27 +1589,6 @@ get_specific (opcode, operands) sh_operand_info *user = operands + n; sh_arg_type arg = this_try->arg[n]; - /* If this is a parallel insn check to see if both - parts have the same destination register. */ - if ((n == 2) && (this_try->nibbles[0] == PPI)) - { - static boolean bIsPPI = false; - static int nLastDestReg; - - if (!bIsPPI) - { - bIsPPI = true; - nLastDestReg = user->reg; - } - else /* Second insn. */ - { - if (nLastDestReg == user->reg) - as_warn (_("destination register is same for parallel insns")); - - bIsPPI = false; - } - } - switch (arg) { case A_DISP_PC: @@ -2280,6 +2259,15 @@ assemble_ppi (op_end, opcode) default: as_bad (_("bad padd / psub pmuls output operand")); } + /* Generate waring if destination register for padd / psub + and pmuls is same ( only for A0 or A1 ) + If last nibble is 1010 then A0 is used in both padd / psub + and pmuls. If it is 1111 then A1 is used as destination + register in both padd / psub and pmuls */ + + if ((((field_b | reg_efg) & 0x000F) == 0x000A) + || (((field_b | reg_efg) & 0x000F) == 0x000F)) + as_warn (_("destination register is same for parallel insns")); } field_b += 0x4000 + reg_efg; break; -- cgit v1.1