Age | Commit message (Collapse) | Author | Files | Lines |
|
* configure.host (xscale*): Don't handle target.
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
gdb/gdbserver:
* README: Don't mention xscale*-*-linux*.
* configure.srv (xscale*-*-linux*): Don't handle target.
gdb/testsuite:
* gdb.base/a2-run.exp (strongarm-*-coff): Don't handle target.
* gdb.base/float.exp (xscale*-*-*, strongarm*-*-*): Don't handle
targets.
* gdb.base/long_long.exp (xscale*-*-*, strongarm*-*-*): Don't
handle targets.
sim:
* configure.tgt (thumb*-*-* | strongarm*-*-* | xscale-*-*): Don't
handle targets.
* configure: Regenerate.
sim/testsuite:
* configure: Regenerate.
* sim/arm/allinsn.exp (xscale*-*-*): Don't handle target.
* sim/arm/misc.exp (thumb*-*-*, xscale*-*-*): Don't handle
targets.
* sim/arm/iwmmxt/iwmmxt.exp: Test for arm*-*-* instead of
xscale*-*-*.
* sim/arm/thumb/allthumb.exp (thumb*-*-*): Don't handle target.
* sim/arm/xscale/xscale.exp: Test for arm*-*-* instead of
xscale*-*-*.
|
|
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Make all of the pins bidirectional, and support sending signals when
software drives the pins as outputs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
When the mask a/b MMRs are written, the output signal might change levels
(as pins are [un]masked), so make sure we update the output level.
Further, make sure we handle edge ints correctly by first sending a high
signal followed by a low signal.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion. These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
A bunch of 32bit insns were not using the store buffer, so when they were
used in parallel insns, they would incorrectly clobber a register early.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
For now, only the sub-command name is completed. No support yet for
completing options to that command. But even this is a huge step as
currently, nothing is completed, and the basic "help sim" is fairly
obtuse as to what exactly the "sim" command accepts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
When most video related insns are used in parallel with Ireg loads, the
DISALGNEXCPT insn behavior is implicitly in effect.
Reported-by: Anton Shokurov <shokurov.anton.v@yandex.ru>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The SIC latches ints from peripherals to the CEC, but the peripherals
need to be able to tell the SIC when to stop. So use the incoming level
to figure out when to set the int bits and when to clear it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Each GPIO block has 16 pins, and I only added 15 in the original
port list. So add the missing 16th.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
This touches up the code a bit to match GNU style. No functional changes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
This touches up the code a bit to match GNU style. No functional changes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
This doesn't currently generate any interrupts (as there doesn't appear
to be any documentation to *when* it would even do so), but since the
HRM does say an interrupt line exists between the OTP and the SIC, add
one for completeness sake. This will make a follow up patch easier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
This simulates a CFI flash. Its pretty configurable via the device
tree. For now, only basic read/write/erase operations are supported
for the Intel command set, but it's easy enough to extend support.
It's certainly enough to trick Das U-Boot into using it for probing,
reading, writing, and erasing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The current implementation attempts to handle the 16bit sign extension
itself. Unfortunately, it gets it right in some cases. So rather than
fix that logic, just drop it in favor of using 16bit signed casts. Now
gcc will take care of getting the logic right.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The current handling of the subtraction insn with the RND12 modifier
works when saturation isn't involved. So add handling for this edge
case to match the hardware.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The 16bit add/sub insns missed setting the VS bit in ASTAT whenever the
V bit was also set.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Makes it a lot easier to find out what's going on with interrupt lines
if the ports have tracing output.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
We need the DIR bit cleared, not set, in order for the pin to be treated
as an input.
When looking up the data value, we need to shift the "level" value over by
"my_port" rather than "bit" as the latter has already been shifted over.
We also should normalize the "level" coming in from the outside worlds to
the set of {0,1} since those are the only values that matter to GPIOs.
We need the BOTH bit set, not cleared, in order for the pin to trigger
on both edges.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The clear/set/toggle MMRs aren't backed by "real" data; they implicitly
perform bit operations on the associated data register. So when we go
to process writes to them, we need to adjust the pointer accordingly so
that the actual backing data is modified.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
When I originally wrote the w1c helper funcs, I used it in a few places.
Then I forgot how it worked and when I later documented it, I described
the 3rd arg in the exact opposite way it is actually used. This error
propagated to a bunch of devices registers that were not explicitly
tested (a bunch of the devices are stubs which merely exist to say "no
device is connected" to make device drivers happy).
So once the documentation is unscrewed, fix all of the broken call sites.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
We'll need these bits in an upcoming patch, so map out the whole
LSR MMR now.
Fix up indentation style while we're here.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The Blackfin PRM says that the top 8 bits of the accumulator must be
cleared when using the VIT_MAX insn, so the sim has followed this spec.
Matching the hardware behavior though when the high bits are not cleared
is easy to do and doesn't break existing behavior, so go for it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The Blackfin PRM does not cover this case, but the hardware is clear: even
if the search criteria is not met (and thus a new 16bit value is loaded up
into the accumulator), the accumulator undergoes 16bit sign extension. So
simply reload the low signed 16bits in that case.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The Acc=-Acc insn can overflow or carry with edge values, so make sure
we update the ASTAT bits accordingly to match the hardware. Also fix
a thinko where we always updated AC0 even when working with A1 regs.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
When encoding the SIC/pin info into unique input port ids, I used bases
of 100 when I meant to use 0x100. Rather than simply fix the decoding
math in the different functions, create a few helper macros to simplify
the SIC/pin encoding and decoding steps. This makes the resulting tables
nice & clear.
And now that pins are clear, the 533 and 537 port_event handlers may
easily be merged into one.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The hardware allows the byteop[123]p insns to use the same src reg pair,
so remove the combination check in the sim.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The bus addresses have to be valid numbers, so 'g' and 'h' won't work.
Oddly, the common code silently ignored this which is why I didn't notice
in the first place.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
fcntl.h and sys/fcntl.h, for constants.
* nltvals.def: Regenerate.
* sim-io.c (sim_io_stat, sim_io_fstat): New functions.
* sim-io.h (sys/types.h, sys/stat.h): Include.
(sim_io_stat, sim_io_fstat): Declare.
|
|
do not invoke the host's functionality directly. Invoke
sim_io_stat() instead of stat() for implementing TARGET_SYS_stat.
Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink.
|
|
If the host system (like Windows) doesn't support these functions,
then make sure we don't use them.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
This takes care of the MMR interface and pushing up interrupts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
We weren't updating AZ when doing a 16bit add or sub insn. Implement it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
No point in moving unchanged acc values to the acc regs, and avoid
updating the acc ASTAT bits when only reading. This fixes incorrect
changing of the ASTAT bits when they're only being read.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The current dsp mult handler does not take care of overflows which turn
values negative (and thus set AN in ASTAT). So implement it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The current dsp mult handler does not take care of overflows and updating
the V ASTAT bit. So implement it.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
When testing ASTAT regs, specific bit differences carry a lot more meaning
than when checking the value of a data register. So automatically decode
the bits of the two values and print things out so that people don't have
to manually do it themselves every time.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The saturation behavior with fract modes differs from non-fract modes.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
This can boot Das U-Boot and a Linux kernel. It also supports Linux
userspace FLAT and FDPIC (dynamic and static) ELFs.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
file descriptors.
|
|
The sim keeps track of which allocations are zero-ed internally (via
zalloc) and then calls a helper "zfree" function rather than "free".
But this "zfree" function simply calls "free" itself. Since I can
see no point in this and it is simply useless overhead, punt it.
The only real change is in hw-alloc.c where we remove the zalloc_p
tracking, and sim-utils.c where zfree is delete. The rest of the
changes are a simple `sed` from "zfree" to "free".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
|
The sim-events code jumps through some hoops to avoid using 64bit math
to manage the current time. One fundamental assumption here is that by
constantly scheduling the sim poll event a short time into the future,
the 64bit difference will always fall into a signed 32bit value. This
does work most of the time, except for when processing the sim poll event
itself.
Normally, sim_events_process() will dequeue the sim poll event, update
the current time (time_from_event) according to the next pending event,
process the sim poll event (which will then requeue the sim poll event),
and then continue on.
The problem here of course is that the current time is updated in that
small window before the sim poll event gets a chance to reschedule itself.
So if the 64bit difference between the current time and the next event
does not fit into the signed 32bit value, time_from_event overflows, and
the internal assert at the end of update_time_from_event() triggers.
Since attempts at tweaking sim_events_process() logic introduced other
subtle bugs (due to tangled assumptions between most pieces of the sim
time keeping code), change the time_from_event to a real 64bit value.
Tests on my system between a 32bit ELF and a 64bit ELF show no practical
difference (it's all lost in the system noise). Basically, I booted a
Linux kernel to userspace and then paniced it; this gave me a constant
sample size of about 18 million insns.
This was noticed when simulating Blackfin Das U-Boot. The simulated core
timer is given the max unsigned timeout value possible on a 32bit processor
(0xffffffff). This timeout value is used directly to schedule a hw event
in the sim future (the IRQ firing). Once the sim poll event is kicked off,
the next pending event is the core timer event which is more than 2^31
ticks in the future, and the sim aborts with:
sim-events.c:435: assertion failed - current_time == sim_events_time (sd)
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|