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AgeCommit message (Expand)AuthorFilesLines
1997-06-02o Fix padd insnAndrew Cagney1-8/+12
1997-05-30Add assembler information to igen input files.Andrew Cagney7-153/+309
1997-05-29Fix subu immed - was incorrectly using unsigned.Andrew Cagney3-1/+10
1997-05-29Add a simple dissasembler to igenAndrew Cagney4-38/+740
1997-05-27Fix watching PC for 64bit (mips) target.Andrew Cagney2-42/+146
1997-05-27Extend xor-endian and per-cpu support in core module.Andrew Cagney11-63/+294
1997-05-23Preliminary suport for xor-endian suport in core module.Andrew Cagney6-79/+181
1997-05-23Incorrect test for zero-r0 code gen.Andrew Cagney2-2/+12
1997-05-23Enumerate longjmp's return type.Andrew Cagney1-0/+5
1997-05-22ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined.Gavin Romig-Koch2-0/+9
1997-05-22Change longjmp param/setjmp return value used for simulator restart from 0 to 2.Gavin Romig-Koch3-6/+27
1997-05-22 * interp.c (sim_resume): Add missing case in big switchJeff Law2-0/+6
1997-05-21Watchpoint interface.Andrew Cagney16-817/+1486
1997-05-20 * interp.c: Replace all references to load_mem and store_memJeff Law3-340/+295
1997-05-20Part II of adding callback argument to sim_open(). Update all theAndrew Cagney7-56/+48
1997-05-20Depreciate sim_set_callbacks() function. Set simulator callbacksAndrew Cagney3-18/+19
1997-05-19Make getpid, kill supported system callsMichael Meissner6-39/+157
1997-05-19 * interp.c (dispatch): Make this an inline function.Jeff Law3-7/+10
1997-05-19Graft sim/common event and other code onto the mips simulator.Andrew Cagney5-220/+196
1997-05-19Update.Andrew Cagney1-3/+8
1997-05-19Make simulator event-queue manager a bit more signal safe.Andrew Cagney3-0/+26
1997-05-19o Implement generic halt/restart/abort module.Andrew Cagney18-368/+1406
1997-05-19Pacify gcc.Andrew Cagney1-0/+4
1997-05-18 * interp.c (load_mem_big): Remove function. It's now a macroJeff Law2-26/+34
1997-05-17Treat infinities like normal numbers for purposes of comparisonsMichael Meissner2-6/+11
1997-05-16 * callback.c (os_close): Mark the descriptor as beingJeff Law2-6/+127
1997-05-16 * interp.c (load_mem): If we get a load from an out of rangeJeff Law2-0/+18
1997-05-16o Make tic80 insn file more `cache ready'Andrew Cagney9-174/+218
1997-05-15Remove some of the flake from the c80 floating point.Andrew Cagney5-50/+617
1997-05-15More floating point operations.Andrew Cagney3-21/+137
1997-05-15Fix double conversion problem.Andrew Cagney4-45/+76
1997-05-15Passify gcc's warnings.Andrew Cagney2-1/+5
1997-05-14Make columns line up for fpu operation tracingMichael Meissner2-7/+13
1997-05-13Make sure r0 == 0; Return EINVAL for system calls that are defined but not pr...Michael Meissner3-0/+37
1997-05-13Remove ANNULed cycle - was confusing gdb.Andrew Cagney4-56/+54
1997-05-12Fix ld/st tracingMichael Meissner2-2/+6
1997-05-12Clear cntrl-c after handling it.Andrew Cagney3-2/+8
1997-05-12c80 simulator fixes.Andrew Cagney10-70/+242
1997-05-12Match commands like `(gdb) sim a b c' against options --a-b-c.Andrew Cagney1-0/+8
1997-05-12Fix endian problems with ld.d/st.dMichael Meissner2-2/+9
1997-05-11Fix shift/lmo insns; Subu does arithmetic unsignedMichael Meissner4-24/+88
1997-05-10And short immediate instructions use unsigned immediates, not signed.Michael Meissner2-4/+9
1997-05-09Fix xor in simulatorMichael Meissner2-2/+3
1997-05-09Make cmp produce the correct resultsMichael Meissner2-18/+20
1997-05-09Update CIA as well as NIA when a 64bit insn is encountered.Andrew Cagney2-0/+6
1997-05-08Really fix the bbo/bbz instructions.Michael Meissner2-3/+6
1997-05-08reverse bit number for bbo/bbz instructions.Michael Meissner2-2/+3
1997-05-08Fix non-anulled calls so that return address is correctMichael Meissner2-2/+6
1997-05-08Change output format slightlyMichael Meissner1-1/+1
1997-05-08Change output format slightlyMichael Meissner2-73/+37
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