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2021-06-12sim: unify assert build settingsMike Frysinger131-869/+222
Move the --sim-enable-assert option up to the common dir so we only test & export it once across all ports.
2021-06-12sim: unify platform function & header testsMike Frysinger109-17440/+1478
Move the various platform tests up a level to avoid duplication across the ports. When building multiple versions, this speeds things up a bit. For now we move the obvious stuff up a level, but we don't turn own the config.h entirely just yet -- we still have some tests related to libraries that need consideration.
2021-06-09sim: cleanup obsolete NULL fallbackMike Frysinger13-42/+19
We require C11 which defines NULL, so drop the inconsistent set of fallback defines in the codebase.
2021-06-09sim: mn10300: tweak engine halt hookMike Frysinger2-1/+5
The hook is a void func, so defining it to 0 triggers warnings, and isn't really needed.
2021-06-09sim: nrun: tweak init of callback endianMike Frysinger2-5/+11
Allow ports to initialize the callback endian if they want. This will allow delegation of the logic out of common code in the future. Also switch from the CURRENT_TARGET_BYTE_ORDER macro to the underlying current_target_byte_order storage since the latter has been setup by the sim-config module based on the same macros. This will allow the nrun module to be moved to common building for sharing.
2021-06-09sim: bpf: use CURRENT_TARGET_BYTE_ORDERMike Frysinger3-3/+10
Code should be going through this macro rather than accessing the underlying value directly.
2021-06-09sim: cgen: inline cgen_init logicMike Frysinger20-89/+62
This function has done only one thing: post-process command line settings to see if profiling or tracing has been enabled, and if so, set the run_fast_p flag in the simulator state. That flag is only used in one place: to select the fast or slow cgen engine. By inlining the run_fast_p logic to the one place it's used, we can delete a good amount of logic specific to cgen ports: both the call to cgen_init and the conditional simulator state. This in turn allows us to have a single simulator state struct across all ports so we can share objects more between them, and makes the sim_open calls look more consistent.
2021-06-08sim: igen: harmonize tool variablesMike Frysinger8-20/+41
Separate the name of the igen program from the options used to run it. This allows us to avoid duplicating ../igen/igen in Makefiles and reuse the existing setting in the common Makefile. This also allows us to easily harmonize the use of EXEEXT between igen/local.mk and the common makefiles when cross-compiling for e.g. Windows.
2021-06-08sim: v850: assume chown is availableMike Frysinger5-11/+9
Now that gnulib provides a wrapper, assume it always exists.
2021-06-05sim: common: start dedicated local.mkMike Frysinger8-31/+150
This provides a space to generate things that we only need to build once per-arch. Some day that will be all of common/, but for now, we move the version.c management in.
2021-06-02sim m32c: Include defs.h in m32c.opc and r8c.opc.John Baldwin3-0/+9
gnulib can override stdio.h and/or stdlib.h in which case the gnulib headers require config.h to be included first. gdb/sim/m32c/ChangeLog: * m32c.opc: Include defs.h. * r8c.opc: Likewise.
2021-05-29sim: ppc: enable -Wno-format for mingw targetsMike Frysinger3-0/+13
This mirrors what we do for other builds already.
2021-05-29sim: ppc: avoid shadowing errnoMike Frysinger5-16/+16
If the OS headers define the "errno" symbol, it breaks some of these funcs that were using "int errno" itself. Rename local vars to "err" to avoid that, and delete the old "extern int errno".
2021-05-29sim: v850: add pointer casts for execv on WindowsMike Frysinger2-2/+6
The execv prototypes on Windows via mingw64 include extra const markings on the argv/envp pointers than what POSIX specifies. Cast them to void* as a hack to get it working on all platforms.
2021-05-29sim: mn10300: add SIGTRAP fallbackMike Frysinger2-0/+7
This is a bit of a hack, but it matches the hack we use in other places in the sim currently. This fixes building for e.g. Windows. The signal fallback logic needs a bit of love in general at some point across all sim code.
2021-05-29sim: pull in extra gnulib libs tooMike Frysinger2-1/+5
Some modules might require extra linking depending on the platform (e.g. Windows might need -lws2_32), so include the existing extra gnulib libs setting.
2021-05-29sim: mips: fix build w/out dv-sockserMike Frysinger2-3/+9
Make sure we don't fail to build when dv-socker is unavailable.
2021-05-29sim: frv: fix up a bunch of prototype warningsMike Frysinger7-6/+41
Some were missing, some were unused, and some were partially renamed.
2021-05-29sim: frv: fix compiler parentheses suggestions warningsMike Frysinger4-25/+39
Newer gcc warns when writing statements like (a && b || c && d), so add more parentheses to make it (and the reader) happy.
2021-05-29sim: sh: fix a few compiler warningsMike Frysinger2-2/+7
2021-05-29sim: m32c: rename open symbol to avoid collisionsMike Frysinger2-4/+10
If the header files define open(), make sure our local open var doesn't shadow it.
2021-05-29sim: leverage gnulibMike Frysinger5-3/+33
We use getline, so leverage gnulib to provide fallback implementation.
2021-05-28sim: bfin: fix the otp fix fixMike Frysinger2-2/+6
Need to shift the upper 32-bits and not just combine directly with the lower 32-bits.
2021-05-28sim: h8300 add special case test.Yoshinori Sato10-16/+520
* addb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg>. * andb.s: Likewise. * cmpb.s: Likewise. * orb.s: Likewise. * subb.s: Likewise. * xorb.s: Likewise. * movb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg> @reg+,@reg+ / @-reg,@-reg. * movw.s: Likewise. * movl.s: Likewise.
2021-05-28sim: h8300 Fixed different behavior in preinc/predec.Yoshinori Sato3-3/+60
* sim-main.h (h8_typecodes): Add operand type OP_REG_DEC, OP_REG_INC. * compile.c (decode): Rewrite oprand type for specific case. (fetch_1): Add handling OP_REG_DEC and OP_REG_INC. (step_once): Fix operand fetch order.
2021-05-24opcodes: cris: move desc & opc files from sim/Mike Frysinger5-3339/+13
All other cgen ports keep their generated desc & opc files under opcodes/, so move the cris files over too. The cris-opc.c file, while not generated, is already here to complement.
2021-05-23sim: cris: fix memory setup typosMike Frysinger2-1/+5
The cleanup to use BFD_VMA_FMT also adjusted this line, but used the incorrect format: while BFD_VMA_FMT needs an explicit "x", PRIx32 does not, so the spurious "x" here confused the parser and broke execution.
2021-05-23sim: bfin: fix the otp fixMike Frysinger2-1/+7
I misread the code and thought data0/... were bu64 when they were actually bu32. Fix the call to assemble the 2 64-bit values instead of passing the 2 halves of the first 64-bit value.
2021-05-23sim: bfin: fix build warnings w/newer gccMike Frysinger2-1/+5
The bfin_otp_write_page_val func wants a pointer to an bu64[2] array, but this code passes it a pointer to a single bu64. It's in a struct with a known compatible layout: bu64 data0, data1, data2, data3; But gcc doesn't allow these kinds of tricks anymore. Use the more verbose form to make the compiler happy since this is not performance sensitive code.
2021-05-23sim: rl78: rename open symbol to avoid collisionsMike Frysinger2-4/+10
If the header files define open(), make sure our local open var doesn't shadow it.
2021-05-23sim: cris: add unistd.h for environ declMike Frysinger2-0/+5
We include environ.h for the fallback, but we still need to include unistd.h in case it provides it as gnulib will detect.
2021-05-23sim: bfin: add strings.h for ffs()Mike Frysinger2-0/+6
2021-05-22sim: mips: Add shadow mappings for 32-bit memory address spaceFaraz Shahbazker2-3/+17
32-bit MIPS programs run on the 64-bit simulator model in 64-bit sign-extended space. The mapping from 64-bit sign-extended addresses to 32-bit addresses was removed by commit 26f8bf63bf36f9062a5cc1afacf71462a4abe0c8, breaking the 64-bit simulator model. Add shadow mappings from 64-bit sign extended address space to 32-bit address spaces, in lieu of the AddressTranslation function. 2021-05-04 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/mips/ChangeLog: * interp.c (sim_open): Add shadow mappings from 32-bit address space to 64-bit sign-extended address space.
2021-05-22sim: mips: Only truncate sign extension bits for 32-bit target modelsFaraz Shahbazker2-6/+11
64-bit BFD for MIPS applies a standard sign extension on all addresses assuming 64-bit target. These bits are required for 64-bit and can only be safely truncated for 32-bit target models. This partially reverts commit b36d953bced0a4fecdde1823abac70ed7038ee95 The sign-extension logic modeled by BFD is an integral part of the MIPS64 architecture spec. It appears in the virtual address map, where sign extension allows for 32-bit compatibility segments [1] with 64-bit addressing. Truncating these addresses prematurely (commit models (-DWITH_TARGET_WORD_BITSIZE=64). In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect addressing (Load-Word) both automatically sign-extend their results. These instructions regenerate the sign-extended addresses even if we don't start with one (see pr gdb/19447). Moreover, some instructions like ADD*/SUB* have unpredictable behaviour when an operand is not correctly sign extended [3]. This affects PC-relative addressing in particular, so arithmetic on the link-address generated in the return address register by a jump-and-link is no longer possible, neither is the use of the PC-relative addressing instructions provided by MIPSR6. [1] "MIPS64 Architecture for Programmers Volume III: The MIPS64 Privileged Resource Architecture", Document Number: MD00091, Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address Spaces", pp. 29-31 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf [2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64 Instruction Set Reference Manual", Document Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 321 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf [3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64 Instruction Set Reference Manual", Document Number: MD00087, Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical List of Instructions", pp. 56 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf 2021-04-23 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/mips/ChangeLog: * interp.c (sim_create_inferior): Only truncate sign extension bits for 32-bit target models .
2021-05-21sim/d10v: Use offsetof in a static assertion about structure layout.John Baldwin2-2/+7
clang 11 fails to compile the static assertion as it cannot compute the pointer value at a compile time: gdb/sim/d10v/interp.c:1149:37: error: static_assert expression is not an integral constant expression static_assert ((uintptr_t) &State == (uintptr_t) &State.regs, ~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Instead, assert that the offset of State.regs is 0. sim/d10v/ChangeLog: * interp.c (sim_create_inferior): Use offsetof in static assertion.
2021-05-20sim: ppc: fix Wpointer-sign warningTom de Vries1-1/+1
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into: ... src/sim/ppc/hw_memory.c: In function 'hw_memory_init_address': src/sim/ppc/hw_memory.c:194:75: error: pointer targets in passing \ argument 4 of 'device_find_integer_array_property' differ in signedness \ [-Werror=pointer-sign] int nr_cells = device_find_integer_array_property(me, "available", 0, &dummy); ^ ... Fix this by changing the type of dummy.
2021-05-19sim: ppc: fix some Wenum-compare warningsTom de Vries1-2/+2
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into: ... src/sim/ppc/hw_phb.c: In function 'hw_phb_attach_address': src/sim/ppc/hw_phb.c:315:12: error: comparison between \ 'attach_type {aka enum _attach_type}' and \ 'enum <anonymous>' [-Werror=enum-compare] if (type != hw_phb_normal_decode ^~ ... Fix this by casting type to hw_phb_decode.
2021-05-19sim: ppc: fix Wnonnull warningTom de Vries1-2/+1
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into: ... src/sim/ppc/emul_netbsd.c: In function 'do_gettimeofday': src/sim/ppc/emul_netbsd.c:770:16: error: null argument where non-null \ required (argument 1) [-Werror=nonnull] int status = gettimeofday((t_addr != 0 ? &t : NULL), ^~~~~~~~~~~~ ... Fix this by unconditionally passing &t as first argument.
2021-05-19sim: ppc: fix some more Wunused-function warningsTom de Vries1-2/+2
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into: ... In file included from src/sim/ppc/cpu.h:26:0, from src/sim/ppc/mon.c:25, from src/sim/ppc/inline.c:64, from idecode.c:26: src/sim/ppc/device.h:788:8: error: 'device_event_queue_deschedule' \ declared 'static' but never defined [-Werror=unused-function] (void) device_event_queue_deschedule ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ... This seems to be caused by the fact that the function is declared using INLINE_EVENT instead of INLINE_DEVICE. Fix this and a similar error in the same file.
2021-05-19sim: ppc: fix some Wunused-function warningsTom de Vries1-84/+84
When compiling with --enable-werror and CFLAGS="-O0 -g -Wall", we run into: ... In file included from src/sim/ppc/cpu.h:251:0, from src/sim/ppc/emul_generic.h:24, from src/sim/ppc/emul_generic.c:24: src/sim/ppc/cpu.c:76:1: error: 'cpu_create' defined but not used \ [-Werror=unused-function] cpu_create(psim *system, ^~~~~~~~~~ ... The function is defined as: ... INLINE_CPU\ (cpu *) cpu_create(psim *system, ... which expands to: ... static cpu * __attribute__((__unused__)) cpu_create(psim *system, ... The problem is that gcc does not associate the attribute to the function. I've filed a PR about this ( PR gcc/100670 ), which may or may not be valid. Work around/fix this by modifying the INLINE_* definitions in inline.h to move UNUSED to the start such that we have: ... __attribute__((__unused__)) static cpu * cpu_create(psim *system, ...
2021-05-17sim: fully merge sim_state_base into sim_stateMike Frysinger43-93/+154
Now that all ports have migrated to the new framework, drop support for the old sim_state_base layout.
2021-05-17sim: riscv: invert sim_state storageMike Frysinger4-12/+22
2021-05-17sim: h8300: invert sim_state storageMike Frysinger3-11/+32
2021-05-17sim: mips: invert sim_state storageMike Frysinger5-27/+27
2021-05-17sim: avr: invert sim_state storageMike Frysinger3-11/+23
2021-05-17sim: cgen: invert sim_state storage for cgen portsMike Frysinger17-74/+49
2021-05-17sim: bfin: invert sim_state storageMike Frysinger3-9/+12
2021-05-17sim: invert sim_state storageMike Frysinger33-124/+143
Currently all ports have to declare sim_state themselves in their sim-main.h and then embed the common sim_state_base & sim_cpu in it. This dynamic makes it impossible to share common object code among multiple ports because the core data structure is always different. Let's invert this relationship: common code declares sim_state, and if the port actually needs state on a per-instance basis, it can use the new arch_data field for it. Most ports don't actually use it, so they don't need to declare anything at all. This is the first in a series of changes: it adds a define to select between the old & new layouts, then converts all the ports that don't need custom state over to the new layout.
2021-05-16sim: install library header filesMike Frysinger3-37/+78
We install libsim.a for people to link against, but haven't been installing the header files to for its API. Export them!
2021-05-16sim: switch config.h usage to defs.hMike Frysinger302-169/+923
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise.
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