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2012-11-20Fix sim build when configured with --enable-pluginsH.J. Lu31-27/+225583
* common/Make-common.in: Use lt_cv_dlopen_libs under PLUGINS condition. * common/acinclude.m4: Define lt_cv_dlopen_libs. * arm/configure: Regenerate. * avr/configure: Regenerate. * bfin/configure: Regenerate. * common/configure: Regenerate. * cr16/configure: Regenerate. * cris/configure: Regenerate. * d10v/configure: Regenerate. * erc32/configure: Regenerate. * frv/configure: Regenerate. * h8300/configure: Regenerate. * igen/configure: Regenerate. * iq2000/configure: Regenerate. * lm32/configure: Regenerate. * m32c/configure: Regenerate. * m32r/configure: Regenerate. * m68hc11/configure: Regenerate. * mcore/configure: Regenerate. * microblaze/configure: Regenerate. * mips/configure: Regenerate. * mn10300/configure: Regenerate. * moxie/configure: Regenerate. * ppc/configure: Regenerate. * rl78/configure: Regenerate. * rx/configure: Regenerate. * sh/configure: Regenerate. * sh64/configure: Regenerate. * testsuite/configure: Regenerate. * v850/configure: Regenerate.
2012-11-05* MAINTAINERS: Update my email address.Stephane Carrez2-1/+5
2012-10-032012-10-04 Chao-ying Fu <fu@mips.com>Steve Ellcey2-0/+16
Steve Ellcey <sellcey@mips.com> * mips/mips3264r2.igen (rdhwr): New.
2012-09-24Forgot to include ChangeLog in last checkin.Steve Ellcey1-0/+6
2012-09-242012-09-24 Steve Ellcey <sellcey@mips.com>Steve Ellcey3-3/+11
* mips/basic.exp: Add mips*-mti-elf* target. * configure.ac: Add mips*-mti-elf* target. * configure: Regenerate.
2012-09-13 * v850.igen (W,WWWW): Correct computation of register number.Nick Clifton2-14/+19
(JR32): Remove unnecessary comma. (cmovf.s): Register 0 is an invalid source register. (maddf.s): Remove bogus intermediary rounding. (nmaddf.s): Likewise. (trncf.sl): Remove bogus initial rounding. (trncf.dw): Likewise. (trncf.sl): Likewise. (trncf.sw): Likewise.
2012-09-08Adjust for branch target encoding changeAnthony Green2-10/+15
2012-09-042012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill3-4/+7
* configure.ac: Always link against dv-sockser.o. * configure: Regenerate.
2012-09-03 PR sim/14540Nick Clifton2-1/+7
* armsupp.c (ARMul_MRC): Return 0 if access to the MRC instruction is denied.
2012-08-30sim: cr16: update syscall listMike Frysinger3-25/+34
2012-08-30sim: cr16: improve trap handlingMike Frysinger4-2/+31
2012-08-30sim: cr16: add sim_complete_command stubMike Frysinger2-0/+9
2012-08-16oops - acxidentally omitted from previous delta.Nick Clifton1-0/+10
2012-08-16 * end.c: Include config.h before system header files.Nick Clifton7-0/+7
* erc32.c: Likewise. * exec.c: Likewise. * float.c: Likewise. * func.c: Likewise. * help.c: Likewise. * interf.c: Likewise.
2012-08-01 * wrapper.c (libiberty.h): Include.Kevin Buettner2-6/+14
(sim_store_register, sim_fetch_register): On success, return length, instead of -1.
2012-08-01sim: bfin: set bfrom alias field to correct sizeMike Frysinger2-10/+17
When the sim is built w/out the bfroms, we end up passing a length of 0 when mapping the rom region which the core sim code rejects. So add an alias field equal to the length to avoid that error. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-08-01sim: bfin: update return value in bfin_reg_{fetch,store}Mike Frysinger2-4/+10
The latest gdb sim-remote.c really wants a return value from the fetch/store register functions, so update the Blackfin sim to avoid the warnings/errors. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-06-19include "config.h" instead of BFD's sysdep.h in d10v/interp.cJoel Brobecker2-1/+19
The change of include file introduces some new warnings about functions being used without a prototype. So a few more system includes have been added to compensate for that. sim/d10v/ChangeLog: * interp.c: #include "config.h" instead of "sysdep.h". Add conditional include of string.h or strings.h, as well as conditional include of stdlib.h.
2012-06-17sim: cr16: include config.h rather than sysdep.h from bfdMike Frysinger2-1/+8
2012-06-17sim: moxie: fix build by including config.h firstMike Frysinger2-0/+6
2012-06-17 * interp.c: Include config.h first. Do not include sysdep.h.Hans-Peter Nilsson2-1/+5
2012-06-15sim/erc32/sys.h: Include "config.h".Joel Brobecker2-0/+5
This file includes "gdb/callback.h", which includes "bfd.h", which itself verifies that "config.h" was included earlier. sim/erc32/ChangeLog: * sys.h: Include "config.h".
2012-06-15Define PACKAGE macro in all sims' config.h.Joel Brobecker82-10/+543
Some of the common includes in include/gdb such as callback.h include bfd.h. But there was a recent change in bfd-in.h to require that config.h be included before bfd.h can be included: /* PR 14072: Ensure that config.h is included first. */ #if !defined PACKAGE && !defined PACKAGE_VERSION #error config.h must be included before this header #endif PACKAGE_VERSION is always defined by default by the AC_INIT autoconf macro, but PACKAGE isn't. This patch updates the SIM_AC_COMMON macro to define it, and then regenerates all configure scripts and config.in files. sim/common/changeLog: * acinclude.m4 (SIM_AC_COMMON): Define PACKAGE. * config.in, configure: Regenerate. sim/ChangeLog: * configure: Regenerate. sim/arm/ChangeLog: * config.in, configure: Regenerate. sim/avr/ChangeLog: * config.in, configure: Regenerate. sim/bfin/ChangeLog: * config.in, configure: Regenerate. sim/cr16/ChangeLog: * config.in, configure: Regenerate. sim/cris/ChangeLog: * config.in, configure: Regenerate. sim/d10v/ChangeLog: * config.in, configure: Regenerate. sim/erc32/ChangeLog: * config.in, configure: Regenerate. sim/frv/ChangeLog: * config.in, configure: Regenerate. sim/h8300/ChangeLog: * config.in, configure: Regenerate. sim/iq2000/ChangeLog: * config.in, configure: Regenerate. sim/lm32/ChangeLog: * config.in, configure: Regenerate. sim/m32c/ChangeLog: * config.in, configure: Regenerate. sim/m32r/ChangeLog: * config.in, configure: Regenerate. sim/m68hc11/ChangeLog: * config.in, configure: Regenerate. sim/mcore/ChangeLog: * config.in, configure: Regenerate. sim/microblaze/ChangeLog: * config.in, configure: Regenerate. sim/mips/ChangeLog: * config.in, configure: Regenerate. sim/mn10300/ChangeLog: * config.in, configure: Regenerate. sim/moxie/ChangeLog: * config.in, configure: Regenerate. sim/ppc/ChangeLog: * configure: Regenerate. sim/rl78/ChangeLog: * config.in, configure: Regenerate. sim/rx/ChangeLog: * config.in, configure: Regenerate. sim/sh/ChangeLog: * config.in, configure: Regenerate. sim/sh64/ChangeLog: * config.in, configure: Regenerate. sim/v850/ChangeLog: * config.in, configure: Regenerate. sim/testsuite/ChangeLog: * configure: Regenerate.
2012-06-13 * wrapper.c (sim_create_inferior): Treat WMMX2 binaries as iWMMXtNick Clifton2-0/+6
binaries (for now).
2012-06-06Move config.h to start of includes.Michael Eager1-1/+1
2012-06-06Add #include "config.h".Michael Eager2-0/+5
2012-05-242012-05-24 Pedro Alves <palves@redhat.com>Pedro Alves4-3/+11
* sim-signal.h (sim_signal_to_target): Rename to ... (sim_signal_to_gdb_signal): ... this. * sim-signal.c (sim_signal_to_target): Rename to ... (sim_signal_to_gdb_signal): ... this. * sim-reason.c (sim_stop_reason): Adjust to rename.
2012-05-24gdb/Pedro Alves21-51/+111
2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. gdb/gdbserver/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. include/gdb/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 * gdb/signals.def: Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/arm/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/avr/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/common/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/cr16/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/d10v/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/erc32/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/m32c/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/ppc/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/rl78/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. sim/rx/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout.
2012-05-24gdb/Pedro Alves3-2/+8
2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace target_signal with gdb_signal throughout. gdb/gdbserver/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace target_signal with gdb_signal throughout. include/gdb/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace target_signal with gdb_signal throughout. sim/common/ 2012-05-24 Pedro Alves <palves@redhat.com> PR gdb/7205 Replace target_signal with gdb_signal throughout.
2012-05-20 PR 14072Hans-Peter Nilsson2-0/+6
* interp.c: Include config.h before system header files.
2012-05-19 PR 14072Nick Clifton21-4/+56
* wrapper.c: Include config.h before system header files. * callback.c: Include config.h before system header files. * cgen-trace.c: Likewise. * cgen-utils.c: Likewise. * gentmap.c: Likewise. * sim-if.c: Include config.h before system header files. * compile.c: Include config.h before system header files. * sim-main.h: Likewise. * gdb-if.c: Include config.h before system header files. * load.c: Likewise. * syscalls.c: Likewise. * trace.c: Likewise. * interp.c: Include config.h before system header files.
2012-04-09sim: bfin: new PINT modelMike Frysinger7-1/+386
Newer BF54x parts feature an updated GPIO block where all the interrupt handling is split off, so create a new model for the pin interrupts. This is missing the port forwarding aspects, but at least the register interface should be there. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: new GPIO modelMike Frysinger7-1/+352
Newer BF54x parts feature an updated GPIO block, so create a new model for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: add shift astat testsMike Frysinger4-0/+777
These are randomly generated tests to track down issues in ASTAT handling with shift insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: fix ASTAT issues in immediate shiftsMike Frysinger2-17/+64
More ASTAT directed fixes, but this time at the dsp32shift insns. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: fix ASTAT/correctness issues with arithmetic shiftsMike Frysinger2-10/+67
This improves some of the arithmetic shifts to better match the hardware (especially wrt ASTAT behavior). We hit areas where the published documentation is thin so we have to rely on tests run on the hardware to figure out how things should behave. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: more astat testsMike Frysinger3-0/+397
These are the randomly generated tests that directed some of the recent astat related fixes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: enable some parallel testsMike Frysinger5-4/+7
Now that we check for valid sub-insns in parallel insns, we can enable the tests that explicitly validate those code paths. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: more parallel insn checksMike Frysinger2-18/+84
Now that we keep track of the exact parallel insn slot we're in, we can make sure that the current insn being decoded is valid for that slot. This brings us much closer to the hardware in flagging invalid parallel insn combinations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: keep track of the exact position of parallel insnsMike Frysinger3-44/+75
Some insns need to know which slot they're in to determine whether they are valid. So add an enum for each slot, and check that rather than the overall insn len. This makes tracking things in the code much clearer. However, this code is functionally the same, so a follow up patch will leverage this more to properly flag invalid parallel insn combos. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-09sim: bfin: unify se_all helpers moreMike Frysinger7-54/+64
Now that we have the se_all helpers together and working, we can see what pieces are duplicated in each test and unify them in the common header file. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-08sim: bfin: drop excess space in negation insnMike Frysinger2-1/+5
The amod1 helper includes a leading space so it can expand into the empty string when need be, which means the caller need not add spacing itself. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-02sim: fix spelling typoMike Frysinger2-1/+5
2012-04-01sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slotsMike Frysinger2-0/+8
Parallel insns can only do one 32bit, then two 16bits. So if we see a 2nd 32bit insn after the first 32bit in a parallel insn, abort. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01sim: bfin: simplify field width processing and fix build warningsMike Frysinger2-10/+6
This fix the build time warning: warning: format not a string literal, argument types not checked [-Wformat-nonliteral] Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01sim: bfin: fix unused bfrom handling for BF535Mike Frysinger2-1/+5
machs.c: In function 'bfin_model_cpu_init': machs.c:1657:1: warning: 'bfrom' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-04-01sim: bfin: fix build warning/style with auxvt_sizeMike Frysinger2-2/+7
Fix warning about mixing decls and code by moving auxvt_size decl down to the scope where it is used. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31sim: bfin: fix typo in BF54x SIC initMike Frysinger2-1/+5
The current code triggers a warning: dv-bfin_sic.c: In function 'bfin_sic_finish': dv-bfin_sic.c:930:41: warning: operation on 'sic-><U78e8>.bf54x.iwr1' may be undefined [-Wsequence-point] This points out the IWR2 register was not being setup because of a typo. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-31sim: bfin: include devices.h to fix build warningsMike Frysinger2-0/+5
The place where these funcs get defined do not include the header that declares their prototypes. Add that to fix -Wmissing-prototypes: devices.c:59:1: warning: no previous prototype for 'dv_bfin_mmr_invalid' devices.c:66:1: warning: no previous prototype for 'dv_bfin_mmr_require' devices.c:99:1: warning: no previous prototype for 'dv_bfin_mmr_check' devices.c:159:14: warning: no previous prototype for 'dv_get_bus_num' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-03-29Commit gdb and sim support for v850e2 and v850e2v3 on behalf ofKevin Buettner9-26/+3235
Rathish C <Rathish.C@kpitcummins.com>.
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