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AgeCommit message (Expand)AuthorFilesLines
2015-06-11sim: m68hc11/mn10300/v850: delete redundant INLINE definesMike Frysinger7-32/+13
2015-06-11sim: microblaze: switch to common sim_resume/sim_stop_reasonMike Frysinger4-28/+27
2015-06-09Fix latest sim/common/ChangeLog entry.Joel Brobecker1-1/+0
2015-06-09Remove unnecessary empty line in sim/common/ChangeLogJoel Brobecker1-1/+0
2015-06-09Fix spelling mistakes in sim/common/sim-events.c error messages.Mike Stump2-1/+7
2015-05-17sim: erc32: restore attributionMike Frysinger8-7/+33
2015-05-08Switch erc32 simulator copyright headers to FSF.Joel Brobecker11-150/+158
2015-04-30Make RL78 disassembler and simulator respect ISA for mul/divDJ Delorie9-11/+121
2015-04-29Fix problems in the sim sources discovered by running the cppcheck static ana...Nick Clifton8-6/+29
2015-04-27sim: avr: Fix 'multiple definition of sim_{read,write}'Senthil Kumar Selvaraj2-1/+6
2015-04-24Fix typos in sim sources exposed by static analysis.Nick Clifton6-4/+23
2015-04-24Fix typo in check for valid register number in RX sim.Nick Clifton2-1/+6
2015-04-21sim: mcore: clean up printf warningsMike Frysinger2-8/+13
2015-04-21sim: mcore: convert to common memory/verbose functionsMike Frysinger2-319/+59
2015-04-21sim: mcore: drop watchpoint/dumpmem/clearstats supportMike Frysinger2-73/+12
2015-04-21sim: mcore: switch to common syscall handlingMike Frysinger6-140/+64
2015-04-21sim: gennltvals.sh: handle split out newlib source treeMike Frysinger5-17/+32
2015-04-19sim/erc32: Switched emulated memory to host endian order.Jiri Gaisler7-210/+159
2015-04-18sim: clean up duplicate sim-engine hooksMike Frysinger8-37/+17
2015-04-18sim: trim old USING_SIM_BASE_H defineMike Frysinger12-12/+24
2015-04-18sim: unify SIM_CPU definitionMike Frysinger46-57/+96
2015-04-18sim: unify sim_cia definitionMike Frysinger47-54/+101
2015-04-17sim: microblaze: switch to common memory functionsMike Frysinger4-332/+33
2015-04-17sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}Mike Frysinger64-116/+184
2015-04-17sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpersMike Frysinger13-0/+159
2015-04-16sim: avr/mcore/moxie: fill out sim-cpu pc fetch/store helpersMike Frysinger7-1/+80
2015-04-15sim: unify sim-cpu usageMike Frysinger69-139/+126
2015-04-15sim: cris/frv/h8300/iq2000/lm32/m32r/sh64: standardize cpu stateMike Frysinger15-15/+88
2015-04-13sim: ppc: fix up version scriptMike Frysinger2-2/+8
2015-04-13sim: fix the PKGVERSION defineMike Frysinger55-55/+164
2015-04-13sim: options: add --version supportMike Frysinger2-0/+18
2015-04-13sim: switch to gdb version scriptMike Frysinger3-40/+8
2015-04-13sim: mn10300: convert to sim-cpuMike Frysinger4-10/+47
2015-04-13sim: v850: convert to sim-cpuMike Frysinger4-9/+42
2015-04-13sim: mips: convert to sim-cpuMike Frysinger4-11/+44
2015-04-13sim: m68hc11: convert to sim-cpuMike Frysinger4-11/+48
2015-04-13sim: mips: fix prototype warningsMike Frysinger2-63/+43
2015-04-13sim: ft32: fix ft32_pc_get logicMike Frysinger2-1/+5
2015-04-13Do unset_currtarget_info ldscript for all simulator testsuites.Hans-Peter Nilsson4-6/+18
2015-04-12sim: arm/mips: fix sim_read/sim_write linkage errorsMike Frysinger4-2/+11
2015-04-12sim: ft32: delete sim_read/sim_write funcsMike Frysinger2-22/+4
2015-04-06sim: move sim-engine.o/sim-hrw.o to the common listMike Frysinger46-35/+100
2015-04-05sim: moxie: fix running after nrun conversionMike Frysinger7-25/+102
2015-04-05sim: mn10300: add a basic testsuiteMike Frysinger4-0/+88
2015-04-05sim: m68hc11: add a basic testsuiteMike Frysinger4-0/+78
2015-04-05sim: iq2000: add a basic testsuiteMike Frysinger4-0/+78
2015-04-05sim: lm32: add a basic testsuiteMike Frysinger4-0/+84
2015-04-02sim: d10v: fix signal updatesMike Frysinger2-8/+11
2015-04-02Regenerate configure in simH.J. Lu29-56/+88
2015-04-02sim: clean up SIM_EXTRA_OBJS referencesMike Frysinger8-21/+33
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