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2021-04-18sim: switch to AC_CHECK_FUNCS_ONCE & merge a littleMike Frysinger66-799/+1675
This avoids duplicate tests for functions between common m4, arches, and any other sources that would trigger func tests. Also manually delete known duplicate function tests between the m4, bfin, and v850 ports.
2021-04-18sim: mn10300: delete unused func & header testsMike Frysinger5-52/+6
These appear to have been blindly copied from the v850 port many years ago as the code has never been used. Just delete it all and be done.
2021-04-18sim: syscall: add getpid supportMike Frysinger6-4/+34
Hoist the Blackfin implementation up to the common one.
2021-04-18sim: d10v: fix build warningsMike Frysinger4-5/+17
The printf fix uses our PRIxTA for our sim address type. Then cast away the const (since the underlying code safely treats it as such) even if it's ugly. Finally touch up the argv iterator pointer to match the new func arg. With this tidied up, we can delete the SIM_AC_OPTION_WARNINGS(no) call to get the default common behavior where -Werror is enabled.
2021-04-18sim: cr16: fix build warningsMike Frysinger4-4/+14
The printf fix is obvious enough, but the hash one is a real bug: cr16/interp.c: In function 'sim_open': cr16/interp.c:560:17: error: 'h' may be used uninitialized in this function [-Werror=maybe-uninitialized] 560 | h = h->next; | ~~^~~~~~~~~ It happens to not cause a problem currently because the first entry in the generated table that this loop operates matches a codepath where h is initialized. Then when later entries don't match, the previous value is pointing at the end of a valid hash table already, and the rest of the code does nothing. With this tidied up, we can delete the SIM_AC_OPTION_WARNINGS(no) call to get the default common behavior where -Werror is enabled.
2021-04-15sim erc32: Add include path for readline.John Baldwin4-3/+21
Add a READLINE_CFLAGS variable which adds the include path to the in-tree readline when using the in-tree readline library. sim/erc32/ChangeLog: * Makefile.in (READLINE_SRC, READLINE_CFLAGS): Add. (SIM_EXTRA_CFLAGS): Add READLINE_CFLAGS. * configure: Rebuild. * configure.ac (READLINE_CFLAGS): Add.
2021-04-15sim mn10300: Fix igen generation.John Baldwin3-2/+9
Only pass the top-level instruction decode table (mn10300.igen) to igen via -i. The additional files passed previously caused igen to exit its getopt loop in main and exit silently without generating any output. In addition, when am33-2.igen was added, it was not included from mn10300.igen, so was never used. sim/mn10300/ChangeLog: * Makefile.in: (tmp-igen) Only pass mn10300.igen to igen. * mn10300.igen: Include am33-2.igen.
2021-04-15sim lm32: Use a known-good shell with genmloop.sh.John Baldwin2-1/+5
Explicitly use a known-good shell found by autoconf for executing additional scripts in genmloop.sh rather than the building user's shell. sim/lm32/ChangeLog: * Makefile.in: Pass -shell to genmloop.sh.
2021-04-15sim frv: Add a missing return value for frvbf_check_acc_range.John Baldwin2-1/+5
Claim that the accumulator indices are out of range without raising an exception if the CPU doesn't support media instructions. sim/frv/ChangeLog: * traps.c (frvbf_check_acc_range): Add missing return value.
2021-04-15sim: Add SIM_EXTRA_CFLAGS after CSEARCH.John Baldwin2-4/+9
The bfin sim adds include paths for the SDL libraries. These include paths might include headers for different version of binutils. Move SIM_EXTRA_CFLAGS after CSEARCH to ensure local includes are always preferred to external includes. sim/common/ChangeLog: * Make-common.in (CONFIG_CFLAGS): Remove SIM_EXTRA_CFLAGS. (ALL_CLAGS, COMMON_DEP_CFLAGS): Add SIM_EXTRA_CFLAGS after CSEARCH.
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger57-35/+156
Every arch handles this the same way, so move it to the common code. This will also make unifying the sim_cpu structure easier.
2021-04-09Add missing ChangeLog entry for sim/rx change.Luis Machado1-0/+4
2021-04-09[sim,rx] Silence warning that turns into a build errorLuis Machado1-1/+1
On a 32-bit build, I ran into the following: sim/rx/fpu.c:789:6: error: "*((void *)&a+8)" may be used uninitialized in this function [-Werror=maybe-uninitialized] rv = fp_implode (&a); To silence this, just initialize the struct with 0's. sim/rx/ChangeLog: 2021-04-09 Luis Machado <luis.machado@linaro.org> * fpu.c (rxfp_itof): Initialize structure.
2021-04-08Avoid sequence point warning in h8300 simTom Tromey2-1/+6
GCC gives a -Wsequence-point warning for this code in the h8300 sim. The bug is that memory_size is both assigned and used in the same expression. The fix is to assign after the print. sim/h8300/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * compile.c (init_pointers): Fix sequence point warning.
2021-04-08Add system includes in simTom Tromey20-0/+48
This updates various parts of the sim to include missing system headers. I made the includes unconditional, because other parts of the tree are already doing this. 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * cris-tmpl.c: Include stdlib.h. sim/erc32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * func.c: Include sys/time.h. sim/frv/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * registers.c: Include stdlib.h. * profile.c: Include stdlib.h. * memory.c: Include stdlib.h. * interrupts.c: Include stdlib.h. * frv.c: Include stdlib.h. * cache.c: Include stdlib.h. sim/iq2000/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * iq2000.c: Include stdlib.h. sim/m32r/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * traps.c: Include stdlib.h. * m32r.c: Include stdlib.h. sim/ppc/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * emul_unix.c: Include time.h.
2021-04-08Do not use old-style definitions in simTom Tromey23-298/+191
This changes all the non-generated (hand-written) code in sim to use "new" (post-K&R) style function definitions. 2021-04-08 Tom Tromey <tom@tromey.com> * bpf.c (bpf_def_model_init): Use new-style declaration. sim/common/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use new-style declaration. sim/erc32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sis.c (run_sim, main): Use new-style declaration. * interf.c (run_sim, sim_open, sim_close, sim_load) (sim_create_inferior, sim_store_register, sim_fetch_register) (sim_info, sim_stop_reason, flush_windows, sim_do_command): Use new-style declaration. * help.c (usage, gen_help): Use new-style declaration. * func.c (batch, set_regi, set_rega, disp_reg, limcalc) (reset_stat, show_stat, init_bpt, int_handler, init_signals) (disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event) (init_event, set_int, advance_time, now, wait_for_irq, check_bpt) (reset_all, sys_reset, sys_halt): Use new-style declaration. * float.c (get_accex, clear_accex, set_fsr): Use new-style declaration. * exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec) (chk_asi, execute_trap, check_interrupts, init_regs): Use new-style declaration. * erc32.c (init_sim, reset, decode_ersr, mecparerror) (error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt) (close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq) (set_sfsr, mec_read, mec_write, init_stdio, restore_stdio) (port_init, read_uart, write_uart, flush_uart, uarta_tx) (uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr) (wdog_start, rtc_intr, rtc_start, rtc_counter_read) (rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start) (gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl) (memory_read, memory_write, get_mem_ptr, sis_memory_write) (sis_memory_read): Use new-style declaration. sim/frv/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use new-style declaration. sim/h8300/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * compile.c (cmdline_location): Use new-style declaration. sim/iq2000/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. * iq2000.c (fetch_str): Use new-style declaration. sim/lm32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. sim/m32r/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration.
2021-04-08Fix DTB generation mechanism and build failureLuis Machado3-3/+19
I ran into a build failure with --enable-targets=all due to the fact that the moxie sim expects to be able to use the dtc tool. If it isn't available, the builds fails. The following patch adds a prebuilt dtb file to the tree. That file is the one that is used for installations. The patch also enables (re-)generation of the dtb file through maintainer mode, if it needs to be updated due to a change in the dts file. Tested on aarch64-linux/x86_64-linux. sim/moxie/ChangeLog: 2021-04-08 Luis Machado <luis.machado@linaro.org> * Makefile.in (moxie-gdb.dtb): Add maintainer mode dependency. (install-dtb): Install prebuilt dtb file. * moxie-gdb.dtb: New prebuilt file.
2021-04-08sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2cSimon Marchi11-16/+52
The igen/dgen and opc2c tools leak their heap-allocated memory (on purpose) at program exit, which makes AddressSanitizer fail the tool execution. This breaks the build, as it makes the tool return a non-zero exit code. Fix that by disabling leak detection through the setting of that environment variable. I also changed the opc2c rules for m32c to go through a temporary file. What happened is that the failing opc2c would produce an incomplete file (probably because ASan exits the process before stdout is flushed). This meant that further make attempts didn't try to re-create the file, as it already existed. A "clean" was therefore necessary. This can also happen in regular builds if the user interrupts the build (^C) in the middle of the opc2c execution and tries to resume it. Going to a temporary file avoids this issue. sim/m32c/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running opc2c. sim/mips/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/mn10300/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/ppc/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. sim/v850/ChangeLog: * Makefile.in: Set ASAN_OPTIONS when running igen. Change-Id: I00f21d4dc1aff0ef73471925d41ce7c23e83e082
2021-04-08sim: testsuite: support exit 77 for unsupported testsMike Frysinger2-1/+8
Exit status 77 is common (including the autotools world) to indicate "skip this test". Add support for mapping that to "unsupported" as that's the closest in the dejagnu world.
2021-04-08sim: testsuite: skip tests when the port is disabledMike Frysinger2-0/+10
If the port hasn't been enabled, don't try to run its tests. Making this dynamic simplifies the test harnesses and avoids duplicating a bunch of target tuple checks.
2021-04-08sim: testsuite: calculate $arch from $subdirMike Frysinger72-180/+142
Since we require ports to use a matching subdir name in the testsuite tree, we can use that to calculate the $arch value.
2021-04-07Aarch64 sim fix for gcc-10 miscompilation.Jim Wilson2-2/+8
This fixes a problem that occurs when compiled by gcc-10, as the code is relying on undefined overflow behavior. This is fixed by replacing compares between 32-bit and 64-bit results with compares that just use the 64-bit results with a cast. PR sim/27483 * simulator.c (set_flags_for_add32): Compare uresult against itself. Compare sresult against itself.
2021-04-07sim: m32c: opc2c: remove unused vlist variableSimon Marchi2-3/+4
When building with AddressSanitizer, sim/m32c fails with: ./opc2c -l r8c.out /home/simark/src/binutils-gdb/sim/m32c/r8c.opc > r8c.c sim_log: r8c.out ================================================================= ==3919390==ERROR: LeakSanitizer: detected memory leaks Direct leak of 4 byte(s) in 1 object(s) allocated from: #0 0x7ffff7677459 in __interceptor_malloc /build/gcc/src/gcc/libsanitizer/asan/asan_malloc_linux.cpp:145 #1 0x55555555b3df in main /home/simark/src/binutils-gdb/sim/m32c/opc2c.c:658 #2 0x7ffff741fb24 in __libc_start_main (/usr/lib/libc.so.6+0x27b24) Fix the leak in main by removing the vlist variable, which seems unused.
2021-04-05Adjust location of readline in sim/erc32Tom Tromey3-2/+7
sim/erc32 uses an obsolete path to the in-tree build of readline. readline was moved into a subdirectory some time ago. This patch fixes the problem. Tested by rebuilding. sim/erc32/ChangeLog 2021-04-05 Tom Tromey <tromey@adacore.com> * configure: Rebuild. * configure.ac (READLINE): Adjust in-tree value.
2021-04-04sim: mips: Add handlers to simulator monitor for unlink, lseek and statFaraz Shahbazker2-1/+75
sim/mips/ChangeLog * interp.c (sim_monitor): Add switch entries for unlink (13), lseek (14), and stat (15). Derived from patch authored by Steve Ellcey <sellcey@mips.com>
2021-04-03sim: example-synacor: a simple implementation for referenceMike Frysinger34-1/+16037
Provide a simple example simulator for people porting to new targets to use as a reference. This one has the advantage of being used by people and having a fun program available for it. It doesn't require a special target -- the example simulators can be built for any existing port.
2021-04-03sim: testsuite: integrate common tests into buildMike Frysinger7-71/+662
Now that we have the common automake build with support for build-time programs working, we can integrate the common tests into the default `make check` flow.
2021-04-03sim: add preliminary support for --enable-targetsMike Frysinger9-131/+389
This doesn't actually create one `run` program like other projects, but creates multiple `run-$arch` targets. While it might not seem that useful initially, this has some nice properties: - Allows us to quickly build all sim targets in a single tree. - Positions us better for converting targets over to a proper multitarget build+install. We don't have the ability to actually run tests against them, but that's due to a limitation in gas: it doesn't support multitarget. If that ever changes, we should be able to turn on our tests too. We can improve the test framework to fallback to a system toolchain if available to help mitigate that.
2021-04-02sim: igen: merge build into top levelMike Frysinger17-5489/+451
This simplifies the build a bit (especially for deps in port subdirs), and avoids recursive make. This in turn speeds up the build, and sets us up for multi-target.
2021-04-02sim: unify toolchain settingsMike Frysinger104-6382/+7842
The toplevel, common, and igen dirs all have their own code for setting up toolchain settings. Unify all of that in a new macro.
2021-04-01Fix microblaze sim build errorMartin Liska2-1/+5
I see the following error for --target=microblaze-elf: ../../../sim/microblaze/interp.c: In function 'sim_engine_run': ../../../sim/microblaze/interp.c:147:39: error: passing argument 2 of 'get_insn_microblaze' from incompatible pointer type [-Werror=incompatible-pointer-types] 147 | op = get_insn_microblaze (inst, &imm_unsigned, &insn_type, | ^~~~~~~~~~~~~ | | | int * In file included from ../../bfd/bfd.h:45, from ../../../sim/microblaze/interp.c:24: ../../../sim/microblaze/../../opcodes/microblaze-dis.h:34:57: note: expected '_Bool *' but argument is of type 'int *' 34 | extern enum microblaze_instr get_insn_microblaze (long, bool *, | ^ sim/microblaze/ChangeLog: * interp.c (sim_engine_run): Use bool instead of int.
2021-03-13sim: rename BUILD_LDFLAGS to LDFLAGS_FOR_BUILDMike Frysinger8-5/+31
The rest of the binutils tree renamed this variable many years ago.
2021-03-13sim: introduce {COMPILE,LINK}_FOR_BUILDMike Frysinger16-49/+111
These use the same pattern as seen in the opcodes/ dir and in automake in general (ish). This helps simplify the boilerplate for building and linking build-time code, and fixes some inconsistency in flag usage. For rules that were compiling+linking in a single step, split them into separate steps so we can apply the correct set of options. This matches automake behavior too.
2021-03-08Enable maintainer mode for simTom Tromey5-16/+80
The sim's recently switch to using Automake caused a build failure for me, because I didn't have the correct auto* tools in my path. However, the rule in the tree is that this is not needed in general. This patch adds a call to AM_MAINTAINER_MODE, to align the sim with the way the rest of the tree works here. sim/ChangeLog 2021-03-08 Tom Tromey <tromey@adacore.com> * aclocal.m4, configure, Makefile.in: Rebuild. * configure.ac: Use AM_MAINTAINER_MODE.
2021-03-08sim: delete unused BUILD_LIBS settingMike Frysinger10-16/+38
This hasn't been initialized anywhere for years. It used to be for passing in the path to libiberty, but that stopped happening long ago. Delete it to simplify the build logic.
2021-03-07sim: igen: update options APIMike Frysinger4-3/+9
This local macro doesn't take any args, so adjust the API to match. No one really noticed as this is behind code that is not normally built, only when a dev specifically tries to compile it.
2021-03-07RegeneratedJeff Law2-6/+19
2021-03-07sim: testsuite: merge into toplevel automakeMike Frysinger11-201/+142
This allows us to delete most of our custom test logic, and avoids a recursive make for minor speed up.
2021-03-07sim: switch top level to automakeMike Frysinger10-520/+3101
This doesn't gain us much by itself, but it sets us up for using more features as we try to unify ports and avoid recursive make.
2021-02-28sim: igen: drop config.h & header checkingMike Frysinger12-1125/+58
While the configure script was checking for a bunch of headers, only one of them was conditionally included in the source (unistd.h). The rest were always included. Based on those usage this whole time, we can reasonably assume that the build also has unistd.h. All the other files including config.h never actually used any defines from the header.
2021-02-28sim: igen: delete more unused toolchain settingsMike Frysinger4-122/+7
This package doesn't build any archives or install programs.
2021-02-28sim: igen: delete unused FOR_BUILD varsMike Frysinger4-24/+7
2021-02-28sim: set up build-time compiler settingsMike Frysinger32-277/+313
Some sim dirs were already setting up CFLAGS_FOR_BUILD in inconsistent ways. Move it to a common place for reuse.
2021-02-28sim: use AC_CHECK_TOOL to find arMike Frysinger32-93/+2793
Rather than require $AR be set and then default to `ar`, use the standard AC_CHECK_TOOL helper to find a good prefixed tool. In practice this shouldn't change much as we seem to have macros in the tree that were already setting it up, but we shouldn't rely on that implicitly.
2021-02-28sim: require AC_PROG_CPP explicitlyMike Frysinger62-4206/+4359
All the scripts were using this implicitly already, so there's no real change for them, but we want to call it explicitly as the CPP tool is used to generate nltvals.def.
2021-02-28sim: delete unused SIM_EXTRA_LIBDEPSMike Frysinger6-8/+14
This was last used 15 years ago, so clearly not important enough to keep around. Punt it.
2021-02-27sim: delete redundant SIM_EXTRA_ALLMike Frysinger10-9/+26
We don't need a variable to add a dependency to the "all" target, and having one doesn't really add value. Switch to the target directly for the few ports that actually use this.
2021-02-21sim: common: split up acinclude.m4 into individual m4 filesMike Frysinger144-1197/+2156
This file is quite large and is getting unmanageable. Split it apart to follow aclocal best practices by putting one-macro-per-file. There shouldn't be any real functional changes here as can be seen in the configure script regens.
2021-02-20sim: merge configure.tgt into configure.acMike Frysinger4-324/+207
One fewer file to worry about & manage.
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-3/+8
* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types, [VALID/EXTRACT/ENCODE macros] BTYPE_IMM: Renamed from SBTYPE_IMM. JTYPE_IMM: Renamed from UJTYPE_IMM. CITYPE_IMM: Renamed from RVC_IMM. CITYPE_LUI_IMM: Renamed from RVC_LUI_IMM. CITYPE_ADDI16SP_IMM: Renamed from RVC_ADDI16SP_IMM. CITYPE_LWSP_IMM: Renamed from RVC_LWSP_IMM. CITYPE_LDSP_IMM: Renamed from RVC_LDSP_IMM. CIWTYPE_IMM: Renamed from RVC_UIMM8. CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM. CSSTYPE_IMM: Added for .insn without special encoding. CSSTYPE_SWSP_IMM: Renamed from RVC_SWSP_IMM. CSSTYPE_SDSP_IMM: Renamed from RVC_SDSP_IMM. CLTYPE_IMM: Added for .insn without special encoding. CLTYPE_LW_IMM: Renamed from RVC_LW_IMM. CLTYPE_LD_IMM: Renamed from RVC_LD_IMM. RVC_SIMM3: Unused and removed. CBTYPE_IMM: Renamed from RVC_B_IMM. CJTYPE_IMM: Renamed from RVC_J_IMM. * Added new operands and removed the unused ones, C5: Unsigned CL(CS) immediate, added for .insn directive. C6: Unsigned CSS immediate, added for .insn directive. Ci: Unused and removed. C<: Unused and removed. bfd/ PR 27158 * elfnn-riscv.c (perform_relocation): Updated encoding macros. (_bfd_riscv_relax_call): Likewise. (_bfd_riscv_relax_lui): Likewise. * elfxx-riscv.c (howto_table): Likewise. gas/ PR 27158 * config/tc-riscv.c (riscv_ip): Updated encoding macros. (md_apply_fix): Likewise. (md_convert_frag_branch): Likewise. (validate_riscv_insn): Likewise. Also arranged operands, including added C5 and C6 operands, and removed unused Ci and C< operands. * doc/c-riscv.texi: Updated and added CSS/CL/CS types. * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions. * testsuite/gas/riscv/insn.s: Likewise. gdb/ PR 27158 * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros. (decode_j_type_insn): Likewise. (decode_cj_type_insn): Likewise. (decode_b_type_insn): Likewise. (decode): Likewise. include/ PR 27158 * opcode/riscv.h: Updated encoding macros. opcodes/ PR 27158 * riscv-dis.c (print_insn_args): Updated encoding macros. * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM. (match_c_addi16sp): Updated encoding macros. (match_c_lui): Likewise. (match_c_lui_with_hint): Likewise. (match_c_addi4spn): Likewise. (match_c_slli): Likewise. (match_slli_as_c_slli): Likewise. (match_c_slli64): Likewise. (match_srxi_as_c_srxi): Likewise. (riscv_insn_types): Added .insn css/cl/cs. sim/ PR 27158 * riscv/sim-main.c (execute_i): Updated encoding macros.
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