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AgeCommit message (Expand)AuthorFilesLines
2023-12-07sim: m32r: add more cgen prototypes for trapsMike Frysinger1-0/+12
2023-12-07sim: m32r: add more cgen prototypes to enable -Werror in most filesMike Frysinger3-24/+27
2023-12-07sim: warnings: disable -Wenum-conversion fow now [PR sim/29752]Mike Frysinger2-0/+4
2023-12-06sim: support dlopen in -lcMike Frysinger2-2/+2
2023-12-06sim: cris: move generated file to right placeMike Frysinger2-14121/+1
2023-12-06sim: warnings: add more flagsMike Frysinger2-8/+37
2023-12-05sim: warnings: sync some build logic from gdbsupportMike Frysinger2-15/+65
2023-12-05sim: mips: fix sim_fpu usageMike Frysinger1-4/+4
2023-12-05sim: sh: trim trailing whitespace in generated codeMike Frysinger1-15/+15
2023-12-05sim: mn10300: fix sim_engine_halt callMike Frysinger1-1/+2
2023-12-05sim: m32c: use UTF-8 encodingMike Frysinger1-1/+1
2023-12-04sim: rx: mark unused static var as unusedMike Frysinger1-0/+1
2023-12-04sim: rx: constify some read-only global varsMike Frysinger1-3/+3
2023-12-04sim: warnings: enable only for development buildsMike Frysinger5-5/+13
2023-12-04sim: ppc: fix implicit enum conversionMike Frysinger1-3/+3
2023-12-04sim: ppc: fix -Wmisleading-indentation warningsMike Frysinger1-1/+1
2023-12-04sim: ppc: cleanup getrusage declsMike Frysinger3-17/+2
2023-12-01Fix right shifts in mcore simulator on 64 bit hosts.Jeff Law3-2/+55
2023-11-28sim: bpf: do not use semicolon to begin commentsJose E. Marchesi11-292/+292
2023-11-16sim: mips: Change E_MIPS_* to EF_MIPS_*Ying Huang1-2/+2
2023-10-18sim/riscv: fix JALR instruction simulationJaydeep Patil3-4/+32
2023-10-15sim: mips: fix printf stringMike Frysinger1-1/+1
2023-10-11[RFA] Fix for mcore simulatorJeff Law3-4/+56
2023-08-26Simplify definition of GUILETom Tromey3-6/+2
2023-08-24sim: or1k: Eliminate dangerous RWX load segmentsStafford Horne5-8/+10
2023-08-21sim: bpf: remove negi, neg32i insnsDavid Faust1-8/+0
2023-08-19Placate -Wmissing-declarations in sim/crisTom Tromey1-0/+10
2023-08-19Remove extraneous '%' from sim/cris/local.mkTom Tromey2-2/+2
2023-08-19sim regenAlan Modra70-357/+14594
2023-08-19sim regen preparationAlan Modra2-11/+11
2023-08-19sim --enable-cgen-maintAlan Modra9-30/+36
2023-08-19sim prune_warningsAlan Modra1-0/+19
2023-08-17Re: sim frv: Add a missing return value for frvbf_check_acc_range.Alan Modra1-1/+1
2023-08-12regen configAlan Modra1-21/+52
2023-08-09Rename bfd_bread and bfd_bwriteAlan Modra4-8/+8
2023-07-31bpf: sim: do not overflow instruction immediates in testsJose E. Marchesi5-11/+11
2023-07-26bpf: fix neg and neg32 BPF instructions in simulatorJose E. Marchesi3-7/+7
2023-07-21sim/bpf: desCGENization of the BPF simulatorJose E. Marchesi28-11474/+1608
2023-04-26sim: bpf: update to new BPF relocationsJose E. Marchesi1-1/+1
2023-01-18sim: info: convert verbose field to a boolMike Frysinger20-28/+28
2023-01-18sim: unify sim-signal.o buildingMike Frysinger3-8/+14
2023-01-18sim: v850: reduce extra header inclusion to igen filesMike Frysinger1-0/+4
2023-01-18sim: v850: drop redundant defineMike Frysinger1-4/+0
2023-01-19sim: mn10300: minimize mn10300-sim.h include in sim-main.hMark Wielaard4-0/+17
2023-01-17sim: ppc: drop local psim linkMike Frysinger2-34/+12
2023-01-16sim: assume sys/stat.h always exists (via gnulib)Mike Frysinger7-46/+4
2023-01-16sim: formally assume unistd.h always exists (via gnulib)Mike Frysinger31-67/+4
2023-01-16sim: build: stop probing system extensions (ourselves)Mike Frysinger3-189/+3
2023-01-15sim: modules.c: fix generation after recent refactorsMike Frysinger32-0/+155
2023-01-15sim: microblaze, mn10300: remove signal.h include in interp.cMark Wielaard2-3/+0
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