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2022-12-25sim: cpu: change default init to handle all cpusMike Frysinger1-1/+1
All the runtimes were only initializing a single CPU. When SMP is enabled, things quickly crash as none of the other CPU structs are setup. Change the default from 0 to the compile time value.
2022-12-23sim: v850: standardize the arch-specific settings a littleMike Frysinger1-1/+1
Rename v850_sim.h to v850-sim.h to match other ports, and move most of the arch-specific content out of sim-main.h to it. This isn't a big win though as we still have to include the header in sim-main.h due to the igen interface: it hardcodes including sim-main.h in its files. So until we can fix that, we have to keep bleeding these settings into the common codes.
2022-12-21sim: v850: invert sim_cpu storageMike Frysinger1-6/+9
2022-11-02sim: common: change sim_{fetch,store}_register helpers to use void* buffersMike Frysinger1-4/+4
When reading/writing arbitrary data to the system's memory, the unsigned char pointer type doesn't make that much sense. Switch it to void so we align a bit with standard C library read/write functions, and to avoid having to sprinkle casts everywhere.
2022-10-31sim: reg: constify store helperMike Frysinger1-2/+2
These functions only read from memory, so mark the pointer as const.
2022-01-06sim: v850: migrate to standard uintXX_t typesMike Frysinger1-3/+3
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2021-11-28sim: v850: switch to new target-newlib-syscallMike Frysinger1-0/+3
Use the new target-newlib-syscall module. This is needed to merge all the architectures into a single build, and v850 has a custom syscall table for its newlib/libgloss port. This allows cleaning up the syscall ifdef logic. We know these will always exist now.
2021-11-15sim: split program path out of argv vectorMike Frysinger1-5/+1
We use the program argv to both find the program to run (argv[0]) and to hold the arguments to the program. Most of the time this is fine, but if we want to let programs specify argv[0] independently (which is possible in standard *NIX programs), this double duty doesn't work. So let's split the path to the program to run out into a separate field by itself. This simplifies the various sim_open funcs too. By itself, this code is more of a logical cleanup than something that is super useful. But it will open up customization of argv[0] in a follow up commit. Split the changes to make it easier to review.
2021-06-17sim: overhaul & unify endian settings managementMike Frysinger1-0/+3
The m4 macro has 2 args: the "wire" settings (which represents the hardwired port behavior), and the default settings (which are used if nothing else is specified). If none are specified, the arch is expected to support both, and the value will be probed based on the user runtime options or the input program. Only two arches today set the default value (bpf & mips). We can probably let this go as it only shows up in one scenario: the sim is invoked, but with no inputs, and no user endian selection. This means bpf will not behave like the other arches: an error is shown and forces the user to make a choice. If an input program is used though, we'll still switch the default to that. This allows us to remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting. For the ports that set a "wire" endian, move it to the runtime init of the respective sim_open calls. This allows us to change the WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting if they want to force a specific endianness. With all the endian logic moved to runtime selection, we can move the configure call up to the common dir so we only process it once across all ports. The ppc arch was picking the wire endian based on the target used, but since we weren't doing that for other biendian arches, we can let this go too. We'll rely on the input selecting the endian, or make the user decide.
2021-05-16sim: switch config.h usage to defs.hMike Frysinger1-0/+3
The defs.h header will take care of including the various config.h headers. For now, it's just config.h, but we'll add more when we integrate gnulib in. This header should be used instead of config.h, and should be the first include in every .c file. We won't rely on the old behavior where we expected files to include the port's sim-main.h which then includes the common sim-basics.h which then includes config.h. We have a ton of code that includes things before sim-main.h, and it sometimes needs to be that way. Creating a dedicated header avoids the ordering mess and implicit inclusion that shows up otherwise.
2021-05-03sim: add ATTRIBUTE_PRINTF / ATTRIBUTE_NULL_PRINTF where necessarySimon Marchi1-2/+2
I finally got the all-targets sim building with Clang, these are all the instances where an ATTRIBUTE_PRINTF or ATTRIBUTE_NULL_PRINTF attribute needed to be added to avoid errors like: /home/simark/src/binutils-gdb/sim/aarch64/../common/sim-profile.c:464:19: error: format string is not a string literal [-Werror,-Wformat-nonliteral] vfprintf (fp, fmt, ap); ^~~ There are more fixes needed to get everything building, but adding these attributes is trivial enough, so I send them all in a single patch. Adding the format attributes introduces some format string errors when building with GCC (because now format strings are checked), so corresponding changes are needed to avoid breaking the build. Other than simple format string specified changes, there is this one: /home/simark/src/binutils-gdb/sim/aarch64/../common/hw-events.c: In function 'hw_event_queue_schedule': /home/simark/src/binutils-gdb/sim/aarch64/../common/hw-events.c:95:15: error: too many arguments for format [-Werror=format-extra-args] 95 | NULL, dummy); | ^~~~~ We can fix it and avoid using a dummy variable by simply calling hw_event_queue_schedule_tracef instead of hw_event_queue_schedule_vtracef. sim/arm/ChangeLog: * armdefs.h (ARMul_ConsolePrint): Use format attribute. * wrapper.c (op_printf): Likewise. sim/bfin/ChangeLog: * interp.c (sim_open): Adjust format string specifier. sim/common/ChangeLog: * hw-events.h (hw_event_queue_schedule_tracef): Use format attribute. (hw_event_queue_schedule_vtracef): Likewise. * hw-tree.h (hw_tree_vparse): Likewise. * sim-profile.c (profile_vprintf): Likewise. * sim-trace.c (dis_printf): Likewise. * sim-trace.h (trace_printf): Likewise. (trace_vprintf): Likewise. * sim-utils.h (sim_do_commandf): Likewise. * hw-events.c (hw_event_queue_schedule): Use hw_event_queue_schedule_tracef. sim/rx/ChangeLog: * trace.c (op_printf): Likewise. sim/v850/ChangeLog: * interp.c (sim_open): Adjust format string specifier. Change-Id: I1445115ce57db15bb8e35dca93014555e7555794
2021-04-12sim: cgen: move cgen_cpu_max_extra_bytes logic into the common codeMike Frysinger1-1/+1
Every arch handles this the same way, so move it to the common code. This will also make unifying the sim_cpu structure easier.
2021-02-06sim: watchpoints: use common sim_pc_getMike Frysinger1-1/+0
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement sim_pc_get. Lets switch the sim-watch core for monitoring pc events to the sim_pc_get API so this module works for all ports, and then we can delete this old back channel of snooping in the port's cpu state -- the code needs the pointer to the pc storage so that it can read out bytes and compare them to the watchrange. This also fixes the logic on multi-cpu sims by removing the limitation of only being able to watch CPU0's state.
2021-01-30sim: watchpoints: change sizeof_pc to sizeof(sim_cia)Mike Frysinger1-1/+0
Existing ports already have sizeof_pc set to the same size as sim_cia, so simply make that part of the core code. We already assume this in places by way of sim_pc_{get,set}, and this is how it's documented in the sim-base.h API. There is code to allow sims to pick different register word sizes from address sizes, but most ports use the defaults for both (32-bits), and the few that support multiple register sizes never change the address size (so address defaults to register). I can't think of any machine where the register hardware size would be larger than the address word size either. We have ABIs that behave that way (e.g. x32), but the hardware is still equivalent register sized.
2021-01-11sim: clean up C11 header includesMike Frysinger1-9/+0
Since we require C11 now, we can assume many headers exist, and clean up all of the conditional includes. It's not like any of this code actually accounted for the headers not existing, just whether we could include them. The strings.h cleanup is a little nuanced: it isn't in C11, but every use of it in the codebase will include strings.h only if string.h doesn't exist. Since we now assume the C11 string.h exists, we'll never include strings.h, so we can delete it.
2016-01-06sim: sim_{create_inferior,open,parse_args}: constify argv/env slightlyMike Frysinger1-3/+3
2016-01-03 Mike Frysinger <vapier@gentoo.org> * sim-options.c (sim_parse_args): Mark argv array const. * sim-options.h (sim_parse_args): Likewise.
2016-01-03sim: parse_args: display getopt error ourselvesMike Frysinger1-3/+1
Fix a long standing todo where we let getopt write directly to stderr when an invalid option is passed. Use the sim io funcs instead as they go through the filtered callbacks that gdb wants.
2015-12-30sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert ↵Mike Frysinger1-11/+10
to common sim_{fetch,store}_register
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger1-7/+0
Other than the nice advantage of all sims having to declare one fewer common function, this also fixes leakage in pretty much every sim. Many were not freeing any resources, and a few were inconsistent as to the ones they did. Now we have a single module that takes care of all the logic for us. Most of the non-cgen based ones could be deleted outright. The cgen ones required adding a callback to the arch-specific cleanup func. The few that still have close callbacks are to manage their internal state. We do not convert erc32, m32c, ppc, rl78, or rx as they do not use the common sim core.
2015-06-11sim: m68hc11/mn10300/v850: delete redundant INLINE definesMike Frysinger1-8/+0
The sim-inline.h header already takes care of this for us, so punt the local definitions.
2015-04-13sim: v850: convert to sim-cpuMike Frysinger1-6/+25
Make cpu allocation fully dynamic so we can leverage the common sim-cpu and its APIs.
2015-03-24sim: m68hc11/mips/mn10300/v850: add basic sim_pc_getMike Frysinger1-0/+6
The previous profile change broke these sims that use sim-profile but not sim-cpu (due to missing model support). Add simple funcs until we can convert these over properly.
2015-02-27Fixes problems building the V850 simulator introduced with the previous delta.Nick Clifton1-32/+23
* sim-main.h (reg64_t): New type. (v850_regs): Add selID_sregs field. (VR, SAT16, SAT32, ABS16, ABS32 ): New macros. * v850-dc: Add fields for v850e3v5 instructions. * v850.igen (cvtf.dl): Use correctly signed local value. (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw): Likewise. * interp.c: Fix old style function declarations. * simops.c: Likewise.
2013-01-28 * simops.c (v850_rotl): New function.Nick Clifton1-0/+1
(v850_bins): New function. * simops.h: Add prototypes fir v850_rotl and v850_bins. * v850-dc: Add entries for V850e3v5. * v850.igen: Add support for v850e3v5. (ld.dw, st.dw, rotl, bins): New patterns.
2013-01-10 * interp.c (sim_open): Add support for bfd_arch_v850_rh850Nick Clifton1-1/+4
architecture type. Add support for bfd_mach_v850e2 and bfd_mach_v850e2v3 machine numbers. * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG. (cmpf.d): Correct order of operands. (cmpf.s): Likewise. (trncf.dul): New pattern. (trncf.duw): New pattern. (trncf.sul): New pattern. (trncf.suw): New pattern. * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW.
2011-07-05sim: start a unified sim_do_commandMike Frysinger1-19/+0
Since sim_do_command for many people simply calls sim_args_command, start a unified version of it. For people who handle their own options, they could switch to this by using sim_add_option_table instead. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-01-11http://sourceware.org/ml/gdb-patches/2010-11/msg00112.htmlAndrew Burgess1-1/+1
gdb/ChangeLog * remote-sim.c (gdbsim_store_register): Update API to sim_store_register to check more error conditions. include/gdb/ChangeLog * remote-sim.h (sim_store_register): Update the API documentation for this function. sim/erc32/ChangeLog sim/h8300/ChangeLog sim/m32c/ChangeLog sim/mn10300/ChangeLog sim/ppc/ChangeLog sim/rx/ChangeLog sim/v850/ChangeLog * ???.c (sim_store_register): Update return value to match new API.
2010-03-30sim: v850: fix build failure after watchpoint constificationMike Frysinger1-2/+2
2003-09-05Add support for v850e1 instructionsNick Clifton1-0/+1
2003-02-27Index: arm/ChangeLogAndrew Cagney1-2/+2
2003-02-27 Andrew Cagney <cagney@redhat.com> * wrapper.c (sim_create_inferior, sim_open): Rename _bfd to bfd. Index: common/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-utils.h (sim_analyze_program, sim_load_file): Rename _bfd to bfd. * sim-hload.c (sim_load), sim-base.h (sim_state_base): Ditto. * nrun.c (main): Ditto. Index: d10v/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: erc32/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interf.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: h8500/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * compile.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: i960/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m32r/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim-if.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: m68hc11/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_prepare_for_program, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: mcore/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mips/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open): (sim_create_inferior): Index: mn10200/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: mn10300/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior, sim_open) (sim_create_inferior): Rename _bfd to bfd. Index: ppc/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * sim_calls.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: sh/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (init_dsp, sim_open, sim_create_inferior): Rename _bfd to bfd. Index: v850/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. Index: z8k/ChangeLog 2003-02-27 Andrew Cagney <cagney@redhat.com> * iface.c (sim_open, sim_create_inferior): Rename _bfd to bfd.
2002-09-19Remove v850ea referencesNick Clifton1-11/+0
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+360
1999-04-16Initial creation of sourceware repositoryStan Shebs1-357/+0
1998-02-28Add generic sim-info.c:sim_info() function using module mechanism.Andrew Cagney1-21/+17
Clean up compile probs in mips/vr5400.
1997-09-17Clean up more tracing.Andrew Cagney1-172/+78
FIX interrupt delivery - was zapping PSW before it had been saved. FIX interrupt return, was one instruction out.
1997-09-16Restrict ldsr (load system register) to modifying just non-reserved PSW bits.Andrew Cagney1-22/+26
For v850eq, include PSW[US] in bits that can be modified.
1997-09-15For v850eq start up with US bit set.Andrew Cagney1-6/+7
Let sim_analyze_program determine the architecture. Fix various sanitizations.
1997-09-12Check reserved bits before executing instructions.Andrew Cagney1-0/+6
Make v850[eq] the the default simulator. Report illegal instructions. Include v850e instructions in v850eq.
1997-09-12Add profiling support to v850*.Andrew Cagney1-8/+4
1997-09-10o Wordwrap usage messages from sim-optionsAndrew Cagney1-1/+3
o Clarify how to use alias options o use in sim-watch (better usage message) o Don't pass something on the stack into the watch-point interrupt hander.
1997-09-08Add multi-sim support to v850/v850e/v850eq simulators.Andrew Cagney1-339/+120
1997-09-04Replace memory model with one from sim/common directory.Andrew Cagney1-279/+31
1997-09-03Pacify gcc-current -Wall.Andrew Cagney1-15/+15
1997-09-03Add real SIM_DESC arg to v850 simulator.Andrew Cagney1-193/+179
Add --enable-sim-warnings, use/fix errors. Add --enable-sim-endian, don't use. Add common modules. Don't yet use most.
1997-08-27Add ABFD argument to sim_create_inferior. Document.Andrew Cagney1-2/+6
Add file sim-hload.c - generic load for hardware only simulators. Review each simulators sim_open, sim_load, sim_create_inferior so that they more closely match required behavour.
1997-08-26Flush defunct sim_kill.Andrew Cagney1-7/+0
1997-08-25Add ABFD argument to sim_open call. Pass through to sim_config soAndrew Cagney1-159/+45
that image properties such as endianness can be checked. More strongly document the expected behavour of each of the sim_* interfaces. Add default endian argument to simulator config macro SIM_AC_OPTION_ENDIAN. Use in sim_config.
1997-04-18Ref gdb/11763 - can't stop a running simulator:Andrew Cagney1-0/+7
o Provide poll_quit callback to simulators so that they can poll for SIGINT on clueless OS's. o Add sim_stop to simulators so that clients can request a halt (eg gdbtk's STOP button) Works for PPC! o Re-arange remote-sim.c so that the hard work is moved from gdbsim_resume() to gdbsim_wait() (where it should be).
1997-04-17 * Makefile.in (SIM_OBJS): Add sim-load.o.David Edelsohn1-111/+640
* interp.c (sim_kind, myname): New static locals. (sim_open): Set sim_kind, myname. Ignore -E arg. (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to load file into simulator. Set start address from bfd. (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1996-09-28 * gencode.c (write_opcodes): Output hex values for opcode maskStu Grossman1-4/+8
and patterns. * interp.c (sim_resume): Save and restore PC from the appropriate register. * (sim_fetch_register sim_store_register): Fix byte-order problem with reading and writing registers. * simops.c (OP_FFFF): Implement pseudo-breakpoint insn.
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