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We only do the common code as automake simplifies the logic.
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* addb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg>.
* andb.s: Likewise.
* cmpb.s: Likewise.
* orb.s: Likewise.
* subb.s: Likewise.
* xorb.s: Likewise.
* movb.s: Add special case reg,<@reg+ / @reg- / @+reg / @-reg>
@reg+,@reg+ / @-reg,@-reg.
* movw.s: Likewise.
* movl.s: Likewise.
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On a host without installed libbfd, this patch fixes the following
"make check-sim" errors for both pru cross target, and native x86_64:
In file included from ../../../binutils/sim/common/sim-basics.h:131,
from testsuite/common/bits32m0.c:13:../../../binutils/sim/../include/gdb/callback.h:55:10: fatal error: bfd.h: No such file or directory
55 | #include "bfd.h"
| ^~~~~~~
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
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In "mov. [bwl] reg, @ -reg", added a special case test
using the same register.
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When in the virtual environment, have brki 8 trigger libgloss syscalls
like other ports. This also matches the ABI that Linux uses for its
syscalls (ignoring the syscall table differences).
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Hoist the Blackfin implementation up to the common one.
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Exit status 77 is common (including the autotools world) to indicate
"skip this test". Add support for mapping that to "unsupported" as
that's the closest in the dejagnu world.
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If the port hasn't been enabled, don't try to run its tests. Making
this dynamic simplifies the test harnesses and avoids duplicating a
bunch of target tuple checks.
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Since we require ports to use a matching subdir name in the testsuite
tree, we can use that to calculate the $arch value.
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Provide a simple example simulator for people porting to new targets
to use as a reference. This one has the advantage of being used by
people and having a fun program available for it.
It doesn't require a special target -- the example simulators can be
built for any existing port.
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Now that we have the common automake build with support for build-time
programs working, we can integrate the common tests into the default
`make check` flow.
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This allows us to delete most of our custom test logic,
and avoids a recursive make for minor speed up.
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This is needed to move to automake & its dejagnu-provided logic,
and eventually by the unified sim logic. The $arch is used only
to figure out which `run` program to use when running tests, and
as we move to a single top-level build, we can delete this and
use sim/run directly.
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This is a hand-written implementation that should have fairly complete
coverage for the base integer instruction set ("i"), and for the atomic
("a") and integer multiplication+division ("m") extensions. It also
covers 32-bit & 64-bit targets.
The unittest coverage is a bit weak atm, but should get better.
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This wasn't supposed to be in here when it was first merged as we
had specifically disabled it for all the tests (and ADI has papers
in place w/the FSF). Clean up this one.
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Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.
We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim". Since we have no
other dirs in this tree, and no plans to add any, should be fine.
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Now that we've moved all ports to dejagnu & testsuite/sim/, the only
thing the testsuite/configure script has been doing is filling in the
sim_arch field in the testsuite/Makefile. We can simply let the top
sim/configure script do that for us now. This simplifies & speeds up
the build a bit by killing an entire configure script.
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This is the only target using a dir directly under testsuite/. All
others use sim/<arch>/ instead. Relocate it so all targets look the
same, and so we can leverage the common test harness.
We drop loop.s in the process because it was never referenced and
was just 2 lines of code.
All other test files are moved & have directives added to the top so
that the test harness can invoke them correctly.
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No tests were ever added in here in the ~22 years since it was first
created. Seems unlikely any tests will be added at this rate, and
the sim/mips/ testdir already has some (light) coverage for this
target. So punt the tree.
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The frv-elf subdir contained five tests:
* cache: A cache test of some sort.
* exit47: A program to test exit status of 47 from sim.
* grloop: Some basic limited loop test program.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
The cache.s code isn't referenced anywhere because it requires some
custom args to the run program, and when this testcase was added, we
didn't have any support for that. We do now, so we can add a header
to enable that. Turns out the code crashes even with those, so turn
around and mark it xfail. Maybe someone someday will care.
That leaves the small exit47, grloop, and hello tests. Now that the
sim test harness supports testing for custom exit status, we can move
them all to sim/frv/ to maintain test coverage.
The remaining differences between frv-elf & sim/frv are:
* frv-elf/ runs for frv-*-elf while sim/frv/ runs for frv*-*-*.
* frv-elf/ runs "*.s" files while sim/frv/ only has .cgs and such.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in frv-elf/.
* The ".s" suffix is the standard "this is an assembly file" suffix.
Since FRV is a CGEN target, we can reuse the existing convention of
".ms" to mean "miscellaneous .s" as in "this is an assembly file,
and run/bucket its test results in the miscellaneous category".
So moving frv-elf/{cache,exit47,grloop,hello}.s to sim/frv/*.ms makes
sense and simplifies things quite a bit for the target while also
slightly increasing the coverage for some tuples.
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The m32r-elf subdir contained three tests:
* exit47: A program to test exit status of 47 from sim.
* hello: Standard "hello world" output program.
* loop: An infinite loop program.
There's already a sim/m32r/hello.ms test that does exactly the same
thing as m32r-elf/hello.s, so we can delete that.
The loop.s test is never referenced anywhere, and is all of 2 lines.
Anyone who really needs a while(1); test case and re-implement it
themselves locally.
That leaves the single exit47 test. Now that the sim test harness
supports testing for custom exit status, we can easily move that to
sim/m32r/exit47.ms to maintain test coverage.
The remaining differences between m32r-elf & sim/m32r are:
* m32r-elf/ runs for m32r-*-elf while sim/m32r/ runs for m32r*-*-*.
* m32r-elf/ runs "*.s" files while sim/m32r/ runs "*.ms" files.
On closer inspection, these are also meaningless distinctions:
* There is nothing specific to the tests that require an *-elf
target. Normally that would mean newlib+libgloss type stuff,
but there's no such requirement in m32r-elf/.
* The ".s" suffix is the standard "this is an assembly file"
suffix. Turns out ".ms" is just how sim/m32r/ (and a few other
CGEN based targets) categorize/bucket test cases. It simply
means "miscellaneous .s" as in "this is an assembly file, and
run/bucket its test results in the miscellaneous category".
So moving m32r-elf/exit47.s to sim/m32r/exit47.ms makes sense and
simplifies things quite a bit for the target while also slightly
increasing the coverage for some tuples.
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Some tests want to verify they can control the exit status, and
allowing any non-zero value would allow tests to silently fail:
if it crashed & exited 1, or forced all non-zero to 1, then we
wouldn't be able to differentiate with a test exiting with a
status like 47.
Extend the test harness to allow tests to declare their expected
exit status that would be defined as a "pass". This requires a
small tweak to the sim_run API to return the status directly, but
that shouldn't be a big deal as it's only used by sim code.
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These were written with 32-bit host assumptions baked into it.
Simplify the printf formats to use ll length modifier as it's
in C11 rather than trying to manually break it up into two,
and cleanup some of the casts to stop assuming sizeof(long) is
the same as sizeof(int).
We also have to add a few more includes for the various funcs
used in here.
The tests aren't compiled automatically still. We can figure
that out later with more work.
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Support for sh64 was dropped from bfd et al in 2018. Without
that, the sim port is useless. So clean up this code too.
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We don't want arch-specific entries in the common ChangeLog files.
Most arches do this already, so clean up the recent additions, and
move some older entries down to help avoid confusing newcomers.
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PR ld/13900
Linking this test crashes the linker, so disable it. The crash
was reported about 9 years ago but haven't made progress, so lets
avoid the failures in test runs.
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Building the C tests with a cris-elf toolchain (gcc-10.2 &
newlib-4.1.0) currently fail due to warnings it emits:
cris-elf-ld: libc.a(lib_a-closer.o): in function `_close_r':
newlib/libc/reent/closer.c:47: warning: _close is not implemented and will always fail
This is because the default target for cris-elf is bare metal, not
the simulator. For that, we need -sim. So add it for elf targets.
We don't add it for all targets as the simulator (and testsuite)
run both libgloss programs as well as Linux userspace programs.
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Make sure we include unistd.h for getpid prototypes to fix build
warnings/errors with newer compilers & C libraries.
Doing that for close in openpf highlights these were using the
wrong function -- need to use fclose on FILE*, not close.
These tests pass again with a cris-elf toolchain.
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Looking through the history, it doesn't seem like the fr30 port was
ever merged. There used to be a testsuite/fr30-elf/ dir, but that
was punted back in 2005 as being dead too. Since there's no refs
and the dir hasn't been touched since 1999, lets assume no one will
ever notice or care.
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This seems like it was meant to unify arch test Makefiles, but
that never happened, and we've instead unified using dejagnu.
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These tests all fail to assemble when targeting the h8300 or h8300h
cpu variants with errors like:
rotl.s:242: Warning: Opcode `rotl.b' with these operand types not available in H8/300H mode
rotl.s:242: Error: invalid operands
It's been this way for years and no one seems to care, so disable
them for those targets since the assembler thinks it's impossible.
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We don't need to manually enumerate every test. Use a glob function
like every other port and rely on the (already existing) #mach headers
in each file to filter out targets we don't care about.
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Make sure the files using abs() include stdlib.h for its prototype.
These files were relying on it being included implicitly by others
which isn't guaranteed, and newer toolchains produce warnings.
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This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...
gdb/ChangeLog
Update copyright year range in copyright header of all GDB files.
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Binutils support for LMBD instruction was merged [1]. So add it also
to simulator.
LMBD instruction does left-most-bit-detection. It returns 32 if
the given bit value is not found in the provided word value.
[1] https://sourceware.org/pipermail/binutils/2020-October/113901.html
sim/pru/ChangeLog:
* pru.h (RS1SEL): New macro.
(RS1_WIDTH): New macro.
* pru.isa: Describe the LMBD instruction.
sim/testsuite/sim/pru/ChangeLog:
* lmbd.s: New test.
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Run autoreconf in sim/ directory and you'll see some errors. The
problem is that autoreconf (a perl script) does not evaluate the value
passed as an argument to AC_CONFIG_AUX_DIR, so something like:
AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../..)
does not do the right thing inside autoreconf, my understanding is
that changing to something like this is fine:
AC_CONFIG_AUX_DIR(../..)
the generated configure seems to check the value passed, and the value
passed relative to the source directory, so I think we get basically
the same behaviour as before.
sim/testsuite/ChangeLog:
* configure: Regnerate.
* configure.ac (AC_CONFIG_AUX_DIR): Update.
sim/testsuite/d10v-elf/ChangeLog:
* configure: Regnerate.
* configure.ac (AC_CONFIG_AUX_DIR): Update.
sim/testsuite/frv-elf/ChangeLog:
* configure: Regnerate.
* configure.ac (AC_CONFIG_AUX_DIR): Update.
sim/testsuite/m32r-elf/ChangeLog:
* configure: Regnerate.
* configure.ac (AC_CONFIG_AUX_DIR): Update.
sim/testsuite/mips64el-elf/ChangeLog:
* configure: Regnerate.
* configure.ac (AC_CONFIG_AUX_DIR): Update.
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The div and mod eBPF instructions are unsigned, but the semantic
specification for the simulator incorrectly used signed operators.
Correct them to unsigned versions, and correct the ALU tests in
the simulator (which incorrectly assumed signed semantics).
Tested in bpf-unknown-none.
cpu/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf.cpu (define-alu-instructions): Correct semantic operators
for div, mod to unsigned versions.
sim/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* bpf/sem-be.c: Regenerate.
* bpf/sem-le.c: Likewise.
sim/testsuite/ChangeLog:
2020-09-08 David Faust <david.faust@oracle.com>
* sim/bpf/alu.s: Correct div and mod tests.
* sim/bpf/alu32.s: Likewise.
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Operand sizes used for simulation of MSP430 hardware multiply
operations are not aligned with the sizes used on the target, resulting
in the simulator storing signed operands with too much precision.
Additionally, simulation of unsigned multiplication is missing explicit
casts to prevent any implicit sign extension.
gcc.c-torture/execute/pr91450-1.c uses unsigned widening multiplication
of 32-bit operands -4 and 2, to produce a 64-bit result:
0xffff fffc * 0x2 = 0x1 ffff fff8
If -4 is stored in 64-bit precision, then the multiplication is
essentially signed and the result is -8 in 64-bit precision
(0xffff ffff ffff fffc), which is not correct.
sim/msp430/ChangeLog:
* msp430-sim.c (put_op): For unsigned multiplication, explicitly cast
operands to the unsigned type before multiplying.
* msp430-sim.h (struct msp430_cpu_state): Fix types used to store hwmult
operands.
sim/testsuite/sim/msp430/ChangeLog:
* mpyull_hwmult.s: New test.
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This patch introduces the basics of an instruction-simulator for eBPF.
The simulator is based on CGEN.
gdb/ChangeLog:
2020-08-04 Jose E. Marchesi <jose.marchesi@oracle.com>
* configure.tgt: Set gdb_sim for bpf-*-* targets.
sim/ChangeLog:
2020-08-04 Jose E. Marchesi <jose.marchesi@oracle.com>
David Faust <david.faust@oracle.com>
* configure.tgt (sim_arch): Add entry for bpf-*-*.
* configure: Regenerate.
* MAINTAINERS: Add maintainer for the BPF simulator.
* bpf/Makefile.in: New file.
* bpf/bpf-helpers.c: Likewise.
* bpf/bpf-helpers.def: Likewise.
* bpf/bpf-helpers.h: Likewise.
* bpf/bpf-sim.h: Likewise.
* bpf/bpf.c: Likewise.
* bpf/config.in: Likewise.
* bpf/configure.ac: Likewise.
* bpf/decode.h: Likewise.
* bpf/eng.h: Likewise.
* bpf/mloop.in: Likewise.
* bpf/sim-if.c: Likewise.
* bpf/sim-main.h: Likewise.
* bpf/traps.c: Likewise.
* bpf/configure: Generate.
* bpf/aclocal.m4: Likewise.
sim/testsuite/ChangeLog:
2020-08-04 David Faust <david.faust@oracle.com>
Jose E. Marchesi <jose.marchesi@oracle.com>
* configure: Regenerate.
* sim/bpf/allinsn.exp: New file.
* sim/bpf/alu.s: Likewise.
* sim/bpf/alu32.s: Likewise.
* sim/bpf/endbe.s: Likewise.
* sim/bpf/endle.s: Likewise.
* sim/bpf/jmp.s: Likewise.
* sim/bpf/jmp32.s: Likewise.
* sim/bpf/ldabs.s: Likewise.
* sim/bpf/mem.s: Likewise.
* sim/bpf/mov.s: Likewise.
* sim/bpf/testutils.inc: Likewise.
* sim/bpf/xadd.s: Likewise.
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I ran
for i in $(find . -name configure.ac); do pushd $(dirname $i); autoreconf -vf; popd; done
to re-generate all automake/autoconf files throughout the repo (with
upstream autoconf 2.69 and automake 1.15.1). These were the changes
that came out. I am pushing this as obvious.
libdecnumber/ChangeLog:
* aclocal.m4, configure: Re-generate.
sim/bfin/ChangeLog:
* aclocal.m4, configure: Re-generate.
sim/erc32/ChangeLog:
* configure: Re-generate.
sim/mips/ChangeLog:
* configure: Re-generate.
sim/testsuite/ChangeLog:
* configure: Re-generate.
Change-Id: I97335c09972d25cc5f6fd8da4db4ffe4a0348787
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The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.
Ensure the carry flag is ignored when the ZC bit is set.
sim/msp430/ChangeLog:
2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
an RRC instruction, if the ZC bit of the extension word is set.
sim/testsuite/sim/msp430/ChangeLog:
2020-01-22 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* rrux.s: New test.
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gdb/ChangeLog:
Update copyright year range in all GDB files.
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PR build/24572 notes that "make install-strip" fails. For me, it
works in every directory except "sim", so this patch adds
install-strip targets to the Makefiles that appear there.
sim/ChangeLog
2019-12-19 Tom Tromey <tromey@adacore.com>
PR build/24572:
* Makefile.in (install-strip): New target.
sim/common/ChangeLog
2019-12-19 Tom Tromey <tromey@adacore.com>
PR build/24572:
* Makefile.in (install-strip): New target.
sim/igen/ChangeLog
2019-12-19 Tom Tromey <tromey@adacore.com>
PR build/24572:
* Makefile.in (install-strip): New target.
sim/ppc/ChangeLog
2019-12-19 Tom Tromey <tromey@adacore.com>
PR build/24572:
* Makefile.in (install-strip): New target.
sim/testsuite/ChangeLog
2019-12-19 Tom Tromey <tromey@adacore.com>
PR build/24572:
* Makefile.in (install-strip): New target.
Change-Id: I76613bc5c7e7812284f33826f8a5d914477fcdc5
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sim/testsuite/ChangeLog:
* configure: Regenerate.
sim/testsuite/sim/pru/ChangeLog:
* add.s: New test.
* allinsn.exp: New file.
* dmem-zero-pass.s: New test.
* dmem-zero-trap.s: New test.
* dram.s: New test.
* jmp.s: New test.
* loop-imm.s: New test.
* loop-reg.s: New test.
* mul.s: New test.
* subreg.s: New test.
* testutils.inc: New file.
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Add tests for 32-bit and 64-bit unordered compare instructions.
sim/testsuite/sim/or1k/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* fpu-unordered.S: New file.
* fpu64a32-unordered.S: New file.
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This is a simple test to ensure that the l.adrp instruction can be assembled and
simulated correctly.
sim/testsuite/sim/or1k/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* adrp.S: New file.
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This is a very basic test but it ensure the machine is wired up
correctly and that the assembler works.
sim/testsuite/sim/or1k/ChangeLog:
yyyy-mm-dd Stafford Horne <shorne@gmail.com>
* fpu64a32.S: New file.
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