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2011-01-11http://sourceware.org/ml/gdb-patches/2010-11/msg00112.htmlAndrew Burgess2-3/+8
gdb/ChangeLog * remote-sim.c (gdbsim_store_register): Update API to sim_store_register to check more error conditions. include/gdb/ChangeLog * remote-sim.h (sim_store_register): Update the API documentation for this function. sim/erc32/ChangeLog sim/h8300/ChangeLog sim/m32c/ChangeLog sim/mn10300/ChangeLog sim/ppc/ChangeLog sim/rx/ChangeLog sim/v850/ChangeLog * ???.c (sim_store_register): Update return value to match new API.
2011-01-01run copyright.sh for 2011.Joel Brobecker21-21/+34
2010-12-14(decode_opcode): RXO_branchrel is relative to the opcode's PC, notDJ Delorie2-2/+4
the address following the opcode.
2010-12-14* rx.c (decode_opcode): For "MVFC PC,", use the address of theDJ Delorie2-0/+13
opcode, not the address following the opcode.
2010-11-12* rx.c (lsb_count): New.DJ Delorie2-7/+94
(divu_cycles): New. (div_cycles): New. (decode_opcode): Fix cycle count math for div, divu, suntil, and swhile.
2010-09-30 * mem.c (rx_mem_ptr): When invalidating the decode cache, accountKevin Buettner2-3/+15
for the fact that the instruction decoder never uses swapped addresses.
2010-09-29 * rx.c (decode_opcode: RXO_int): Only break out of the emulationNick Clifton2-1/+8
loop if rx_syscall() does not return a RX_STEPPED result.
2010-09-24 * rx.c (decode_opcode): Add cycle information for RXO_smovu.Kevin Buettner2-0/+8
2010-09-24Fix typo in ChangeLog entry.Kevin Buettner1-1/+1
2010-09-23 * cpu.h (reset_decoder): Declare.Kevin Buettner4-0/+15
* load.c (rx_load): Call `reset_decoder'. * rx.c (reset_decoder): New function.
2010-09-23 * rx.c (decode_opcode): Declare `rx' as unsigned.Kevin Buettner2-1/+3
2010-09-23 * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include.Kevin Buettner6-0/+9
2010-07-29[include/opcode]DJ Delorie7-204/+240
* rx.h (RX_Operand_Type): Add TwoReg. (RX_Opcode_ID): Remove ediv and ediv2. [opcodes] * rx-decode.opc (SRR): New. (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov r0,r0) and NOP3 (max r0,r0) special cases. * rx-decode.c: Regenerate. [sim/rx] * rx.c (decode_cache_base): New. (id_names): Remove ediv and edivu. (optype_names): Add TwoReg. (maybe_get_mem_page): New. (rx_get_byte): Call it. (get_op): Add TwoReg support. (put_op): Likewise. (PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode" is a pointer now. (DO_RETURN): New. We use longjmp to return an exception result. (decode_opcode): Make opcode a pointer to the decode cache. Save decoded opcode information and re-use. Call DO_RETURN instead of return throughout. Remove ediv and edivu. * mem.c (ptdc): New. Adds decode cache. (rx_mem_ptr): Support it. (rx_mem_decode_cache): New. * mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE. (rx_mem_decode_cache): Declare. * gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here... * main.c (main): ...and here. Use a fast loop if neither trace nor disassemble is given. * cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED, RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a valid code for anything.
2010-07-28[sim/rx]DJ Delorie12-748/+2359
* README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-07 * gdb-if.c (sim_store_register): Add case for sim_rx_acc_regnum.Kevin Buettner2-0/+8
2010-06-24Add "acc" register. Revise register order and names.Kevin Buettner2-0/+12
2010-06-08oops - omitted from previous deltaNick Clifton1-0/+5
2010-06-08 * reg.c (set_oszc): Use unsigned int for the mask.Nick Clifton1-4/+4
(set_szc, set_osz, set_sz): Likewise.
2010-05-28Revert accidentally committed changes that aren't ready yet.Kevin Buettner1-7/+0
2010-05-28 * gdb-if.c (sim_do_command): Add a "sim verbose noisy" command.Kevin Buettner2-1/+14
2010-04-14sim: constify sim_write source buffer (part 2)Mike Frysinger2-1/+5
As pointed out by Sandra Loosemore, a bunch of targets define sim_write themselves instead of using the common/ code. So constify them too. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-02-14 * configure.in: Check if the host has getopt.h.Masaki Muranaka5-0/+138
* configure: Regenerate. * config.in: Regenerate. * main.c: Include config.h. Use HAVE_STDLIB_H, HAVE_UNISTD_H, HAVE_GETOPT_H. Include getopt.h in case HAVE_GETOPT_H is defined.
2010-01-09Sync Libtool from GCC.Ralf Wildenhues1-1/+24
/: * libtool.m4: Sync from git Libtool. * ltmain.sh: Likewise. * ltoptions.m4: Likewise. * ltversion.m4: Likewise. * lt~obsolete.m4: Likewise. sim/iq2000/: * configure: Regenerate. sim/d10v/: * configure: Regenerate. sim/m32r/: * configure: Regenerate. sim/frv/: * configure: Regenerate. sim/: * avr/configure: Regenerate. * cris/configure: Regenerate. * microblaze/configure: Regenerate. sim/h8300/: * configure: Regenerate. sim/mn10300/: * configure: Regenerate. sim/erc32/: * configure: Regenerate. sim/arm/: * configure: Regenerate. sim/m68hc11/: * configure: Regenerate. sim/lm32/: * configure: Regenerate. sim/sh64/: * configure: Regenerate. sim/v850/: * configure: Regenerate. sim/cr16/: * configure: Regenerate. sim/moxie/: * configure: Regenerate. sim/m32c/: * configure: Regenerate. sim/mips/: * configure: Regenerate. sim/mcore/: * configure: Regenerate. sim/sh/: * configure: Regenerate. gprof/: * Makefile.in: Regenerate. * configure: Regenerate. opcodes/: * Makefile.in: Regenerate. * configure: Regenerate. gas/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. ld/: * configure: Regenerate. gdb/testsuite/: * gdb.cell/configure: Regenerate. binutils/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. bfd/: * Makefile.in: Regenerate. * configure: Regenerate. bfd/doc/: * Makefile.in: Regenerate.
2010-01-01Update copyright notices to add year 2010.Joel Brobecker21-21/+21
2009-12-23* rx/rx.c (decode_opcode): btst bit address mask fix.DJ Delorie2-1/+5
2009-11-30* rx/rx.c (decode_opcode): fix SWHILE logic.DJ Delorie2-3/+7
2009-11-24[sim]DJ Delorie25-0/+11860
* rx: New directory. * configure.ac: Add entry for Renesas RX. * configure: Regenerate. [include/gdb] * sim-rx.h: New.
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