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2003-08-28Index: common/ChangeLogAndrew Cagney1-0/+9
2003-02-27Index: arm/ChangeLogAndrew Cagney1-0/+5
2003-02-26Index: common/ChangeLogAndrew Cagney1-0/+4
2003-02-262003-02-26 David Carlton <carlton@math.stanford.edu>David Carlton1-0/+7
2002-11-282002-11-28 Andrew Cagney <cagney@redhat.com>Andrew Cagney1-0/+5
2002-06-16Import current --enable-gdb-build-warnings.Andrew Cagney1-0/+4
2002-06-09Move include/callback.h and include/remote-sim.h to include/gdb/.Andrew Cagney1-0/+6
2001-05-07*** empty log message ***Jim Blandy1-0/+4
2001-04-26* Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):Alexandre Oliva1-0/+5
2001-04-15* Makefile.in (simops.o): Add simops.h to dependency list.J.T. Conklin1-0/+4
2000-08-09* am33.igen: Warning clean-up.Alexandre Oliva1-0/+9
2000-05-24Change profiling so that it is enabled by default. Re-generate everything.Andrew Cagney1-0/+4
2000-05-22* am33.igen: Fix leading comments of SP-relative offset insns thatAlexandre Oliva1-0/+5
2000-05-18* mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,Alexandre Oliva1-0/+8
2000-04-25* am33.igen (inc4 Rn): Use genericAdd so as to modify flags.Alexandre Oliva1-0/+4
2000-04-09* am33.igen: Make SP-relative offsets unsigned. Add `*am33' forAlexandre Oliva1-0/+5
2000-03-03* build fixFrank Ch. Eigler1-0/+4
1999-12-07import gdb-1999-12-06 snapshotJason Molenda1-0/+74
1999-09-09import gdb-1999-09-08 snapshotStan Shebs1-0/+4
1999-07-19import gdb-1999-07-19 snapshotJason Molenda1-0/+4
1999-05-11import gdb-1999-05-10Stan Shebs1-0/+4
1999-04-26import gdb-19990422 snapshotStan Shebs1-0/+25
1999-04-16Initial creation of sourceware repositorygdb-4_18-branchpointStan Shebs1-0/+815
1999-04-16Initial creation of sourceware repositoryStan Shebs1-883/+0
1998-08-26Regress yesterday's change to jmp instn implementation in mn10300.igen.Joyce Janczyn1-5/+0
1998-08-26Regress yesterday's change to jmp instruction -- it has deceiving syntax.Joyce Janczyn1-0/+5
1998-08-25* mn10300.igen (OP_F0F4): Need to load contents of register AN0Joyce Janczyn1-0/+5
1998-08-24* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.Joyce Janczyn1-0/+14
1998-07-27 * am33.igen: Detect cases where two operands must not match inJeff Law1-0/+7
1998-07-24Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+10
1998-07-24 * am33.igen (translate_xreg): New function. Use it as needed.Jeff Law1-0/+4
1998-07-23 * am33.igen: Add some missing instructions.Jeff Law1-0/+2
1998-07-23 * am33.igen: Autoincrement loads/store fixes.Jeff Law1-0/+6
1998-07-21 * am33.igen: Add most am33 DSP instructions.Jeff Law1-0/+10
1998-07-09 * am33.igen: Fix Z bit for remaining addc/subc instructions.Jeff Law1-0/+6
1998-07-09 * mn10300.igen: Fix Z bit for addc and subc instructions.Jeff Law1-1/+11
1998-07-09 * am33.igen: Add remaining non-DSP instructions.Jeff Law1-0/+4
1998-07-09 * am33.igen (translate_rreg): New function. Use it as appropriate.Jeff Law1-0/+2
1998-07-08 * am33.igen: More am33 instructions. Fix "div".Jeff Law1-0/+4
1998-07-06 * mn10300.igen: Add am33 support.Jeff Law1-0/+2
1998-07-06 * Makefile.in: Use multi-sim to support both a mn10300 and am33Jeff Law1-0/+3
1998-07-06 * am33.igen: Add many more am33 instructions.Jeff Law1-0/+6
1998-07-01 * am33.igen: New file with some am33 support.Jeff Law1-0/+2
1998-07-01 * mn10300_sim.h (FETCH24): Define.Jeff Law1-0/+7
1998-06-30 * mn10300_sim.h: Include bfd.hJeff Law1-0/+8
1998-06-25Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+12
1998-06-19Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+5
1998-06-18Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-2/+15
1998-06-16Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>Joyce Janczyn1-0/+4
1998-06-14Updates to dv-mn103iop.c, dv-mn103ser.c and inter.cJoyce Janczyn1-0/+5
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